@@ -96,7 +96,6 @@ pub fn new_params<I: InnerCircuit>(
9696 num_public_inputs : usize ,
9797 inner_params : & I :: Params ,
9898) -> Result < RecursiveParams > {
99- // println!("DBG new_params");
10099 let ( _, circuit_data) =
101100 RecursiveCircuit :: < I > :: target_and_circuit_data ( arity, num_public_inputs, inner_params) ?;
102101 let common_data = circuit_data. common . clone ( ) ;
@@ -157,7 +156,6 @@ impl<I: InnerCircuit> RecursiveCircuit<I> {
157156
158157 /// builds the targets and returns also a ProverCircuitData
159158 pub fn build ( params : & RecursiveParams , inner_params : & I :: Params ) -> Result < Self > {
160- // println!("DBG build");
161159 let config = CircuitConfig :: standard_recursion_config ( ) ;
162160 let mut builder = CircuitBuilder :: new ( config. clone ( ) ) ;
163161
@@ -185,10 +183,6 @@ impl<I: InnerCircuit> RecursiveCircuit<I> {
185183 common_data : & CommonCircuitData < F , D > ,
186184 inner_params : & I :: Params ,
187185 ) -> Result < RecursiveCircuitTarget < I > > {
188- // println!("DBG build_targets");
189- // builder.add_gate_to_gate_set(plonky2::gates::gate::GateRef::new(
190- // plonky2::gates::constant::ConstantGate::new(common_data.config.num_constants),
191- // ));
192186 // proof verification
193187 let verifier_datas_targ: Vec < VerifierCircuitTarget > = ( 0 ..arity)
194188 . map ( |_| builder. add_virtual_verifier_data ( builder. config . fri_config . cap_height ) )
@@ -252,7 +246,6 @@ impl<I: InnerCircuit> RecursiveCircuit<I> {
252246 num_public_inputs : usize ,
253247 inner_params : & I :: Params ,
254248 ) -> Result < ( RecursiveCircuitTarget < I > , CircuitData < F , C , D > ) > {
255- // println!("DBG circuit_data");
256249 let rec_common_data = timed ! (
257250 "common_data_for_recursion" ,
258251 common_data_for_recursion:: <I >( arity, num_public_inputs, inner_params) ?
@@ -278,7 +271,6 @@ impl<I: InnerCircuit> RecursiveCircuit<I> {
278271 common_data : & CommonCircuitData < F , D > ,
279272 inner_params : & I :: Params ,
280273 ) -> Result < ( RecursiveCircuitTarget < I > , CircuitData < F , C , D > ) > {
281- // println!("DBG circuit_data_padded");
282274 // build the actual RecursiveCircuit circuit data
283275 let config = CircuitConfig :: standard_recursion_config ( ) ;
284276 let mut builder = CircuitBuilder :: new ( config) ;
@@ -322,7 +314,6 @@ pub fn common_data_for_recursion<I: InnerCircuit>(
322314 num_public_inputs : usize ,
323315 inner_params : & I :: Params ,
324316) -> Result < CommonCircuitData < F , D > > {
325- // println!("DBG common_data_for_recursion");
326317 let config = CircuitConfig :: standard_recursion_config ( ) ;
327318
328319 let mut builder = CircuitBuilder :: < F , D > :: new ( config. clone ( ) ) ;
@@ -413,7 +404,6 @@ pub fn common_data_for_recursion<I: InnerCircuit>(
413404 + 1
414405 + MAX_CONSTANT_GATES ;
415406 if total_num_gates < ( 1 << degree_bits) {
416- // println!("DBG estimation num_gates={}", total_num_gates);
417407 break ;
418408 }
419409 degree_bits = log2_ceil ( total_num_gates) ;
@@ -422,13 +412,11 @@ pub fn common_data_for_recursion<I: InnerCircuit>(
422412 let mut common_data = circuit_data. common . clone ( ) ;
423413 common_data. fri_params . degree_bits = degree_bits;
424414 common_data. fri_params . reduction_arity_bits = vec ! [ 4 , 4 , 4 ] ;
425- // println!("DBG common_data for recursion degree_bits={}", degree_bits);
426415 Ok ( common_data)
427416}
428417
429418/// Pad the circuit to match a given `CommonCircuitData`.
430419pub fn pad_circuit ( builder : & mut CircuitBuilder < F , D > , common_data : & CommonCircuitData < F , D > ) {
431- // println!("DBG pad_circuit degree_bits={}", common_data.degree_bits());
432420 assert_eq ! ( common_data. config, builder. config) ;
433421 assert_eq ! ( common_data. num_public_inputs, builder. num_public_inputs( ) ) ;
434422 // TODO: We need to figure this out once we enable zero-knowledge
@@ -450,19 +438,12 @@ pub fn pad_circuit(builder: &mut CircuitBuilder<F, D>, common_data: &CommonCircu
450438 builder. num_gates( ) ,
451439 num_gates,
452440 ) ;
453- // println!(
454- // "DBG pad {} -> {} with noop gates",
455- // builder.num_gates(),
456- // num_gates
457- // );
458441 while builder. num_gates ( ) < num_gates {
459442 builder. add_gate ( NoopGate , vec ! [ ] ) ;
460443 }
461- // println!("DBG pad set gates");
462444 for gate in & common_data. gates {
463445 builder. add_gate_to_gate_set ( gate. clone ( ) ) ;
464446 }
465- // println!("DBG pad_circuit END");
466447}
467448
468449#[ cfg( test) ]
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