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pldm: PLDM sensors and effecters on Multi Node platforms
Enable PLDM sensors and effecters on Multi Node platforms. Each proocessor has its own set of sensors and effecters. Signed-off-by: Shirish Pargaonkar <Shirish.Pargaonkar@amd.com>
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{
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"effecterAuxiliaryNamesPDR": [
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{
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"pdr_type": 13,
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"effecter_id": 2,
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"effecter_count": 1,
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"effecter_names": [
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["en", "PkgPwrLimit"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 8,
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"effecter_count": 1,
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"effecter_names": [
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["en", "ReadBIOSBoostFmax"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 9,
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"effecter_count": 1,
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"effecter_names": [
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["en", "ReadAPMLBoostLimit"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 10,
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"effecter_count": 1,
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"effecter_names": [
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["en", "WriteAPMLBoostLimit"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 11,
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"effecter_count": 1,
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"effecter_names": [
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["en", "WriteAPMLBoostLimitAllCores"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 13,
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"effecter_count": 1,
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"effecter_names": [
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["en", "WriteDramThrottle"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 20,
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"effecter_count": 1,
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"effecter_names": [
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["en", "CCDBistResult"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 21,
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"effecter_count": 1,
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"effecter_names": [
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["en", "CCXBistResult"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 29,
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"effecter_count": 1,
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"effecter_names": [
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["en", "FuseSamplingInit"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 32,
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"effecter_count": 1,
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"effecter_names": [
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["en", "PostCode"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 34,
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"effecter_count": 1,
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"effecter_names": [
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["en", "DiePublicSerialNumber"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 66,
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"effecter_count": 1,
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"effecter_names": [
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["en", "BmcRasPCIeConfigSpace"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 69,
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"effecter_count": 1,
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"effecter_names": [
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["en", "BmcRasFchResetReason"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 70,
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"effecter_count": 1,
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"effecter_names": [
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["en", "DimmTempRangeAndRefreshRate"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 71,
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"effecter_count": 1,
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"effecter_names": [
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["en", "DIMMPowerConsumption"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 72,
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"effecter_count": 1,
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"effecter_names": [
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["en", "DIMMThermalSensor"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 74,
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"effecter_count": 1,
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"effecter_names": [
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["en", "ActiveFrequencyLimitCore"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 76,
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"effecter_count": 1,
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"effecter_names": [
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["en", "SocketFrequencyRange"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 77,
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"effecter_count": 1,
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"effecter_names": [
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["en", "CurrentBandWidthIOLink"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 78,
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"effecter_count": 1,
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"effecter_names": [
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["en", "CurrentBandWidthXGMILink"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 80,
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"effecter_count": 1,
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"effecter_names": [
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["en", "XGMILinkWidthRange"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 81,
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"effecter_count": 1,
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"effecter_names": [
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["en", "APBState"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 82,
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"effecter_count": 1,
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"effecter_names": [
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["en", "APBDisable"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 84,
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"effecter_count": 1,
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"effecter_names": [
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["en", "LCLKDPMLevelRange"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 93,
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"effecter_count": 1,
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"effecter_names": [
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["en", "PwrEfficiencyModeSelection"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 94,
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"effecter_count": 1,
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"effecter_names": [
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["en", "DFPStateRange"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 95,
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"effecter_count": 1,
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"effecter_names": [
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["en", "MaxMinLCLKDPMLevel"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 99,
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"effecter_count": 1,
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"effecter_names": [
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["en", "BMCRasSetErrThreshold"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 100,
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"effecter_count": 1,
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"effecter_names": [
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["en", "BMCRasSetOOBConfig"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 102,
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"effecter_count": 1,
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"effecter_names": [
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["en", "BMCSetRasAction"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 103,
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"effecter_count": 1,
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"effecter_names": [
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["en", "BMCGetRasActionStatus"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 104,
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"effecter_count": 1,
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"effecter_names": [
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["en", "BMCPcieConfigWrite"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 106,
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"effecter_count": 1,
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"effecter_names": [
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["en", "BMCRasDelayResetOnSyncfloodOverride"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 107,
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"effecter_count": 1,
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"effecter_names": [
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["en", "ResetOnSyncFloodStatus"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 112,
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"effecter_count": 1,
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"effecter_names": [
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["en", "SpdSidebandRead"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 113,
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"effecter_count": 1,
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"effecter_names": [
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["en", "SpdSidebandWrite"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 115,
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"effecter_count": 1,
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"effecter_names": [
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["en", "XGMIPStateRange"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 116,
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"effecter_count": 1,
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"effecter_names": [
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["en", "CpuRailISOFreqPolicy"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 117,
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"effecter_count": 1,
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"effecter_names": [
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["en", "PC6Enable"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 118,
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"effecter_count": 1,
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"effecter_names": [
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["en", "DFCEnable"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 119,
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"effecter_count": 1,
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"effecter_names": [
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["en", "CC6Enable"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 120,
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"effecter_count": 1,
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"effecter_names": [
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["en", "DRAMThrottle"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 121,
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"effecter_count": 1,
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"effecter_names": [
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["en", "PCIeLinkTraining"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 122,
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"effecter_count": 1,
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"effecter_names": [
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["en", "CCDPowerConsumption"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 124,
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"effecter_count": 1,
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"effecter_names": [
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["en", "SVI3VRTemp"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 125,
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"effecter_count": 1,
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"effecter_names": [
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["en", "HSMPCommands"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 126,
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"effecter_count": 1,
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"effecter_names": [
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["en", "APMLFloorFrequencyLimit"]
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]
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},
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{
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"pdr_type": 13,
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"effecter_id": 256,
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"effecter_count": 1,
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"effecter_names": [
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["en", "CPUId"]
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]
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}
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]
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}

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