Merge pull request #5 from gowthamsiddarthd/main

RME DA Issue vB.a ACS EAC Release

Author: jk-arm

CMakeLists.txt

@@ -0,0 +1,89 @@
+## @file
+ # Copyright (c) 2025, Arm Limited or its affiliates. All rights reserved.
+ # SPDX-License-Identifier : Apache-2.0
+ #
+ # Licensed under the Apache License, Version 2.0 (the "License");
+ # you may not use this file except in compliance with the License.
+ # You may obtain a copy of the License at
+ #
+ #  http://www.apache.org/licenses/LICENSE-2.0
+ #
+ # Unless required by applicable law or agreed to in writing, software
+ # distributed under the License is distributed on an "AS IS" BASIS,
+ # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ # See the License for the specific language governing permissions and
+ # limitations under the License.
+ ##
+
+# Set the minimum required version of CMake for the project
+cmake_minimum_required(VERSION 3.17)
+project(rme-acs LANGUAGES)
+
+# Tool dependency check
+get_filename_component(ROOT_DIR . ABSOLUTE)
+set(VAL_DIR "${ROOT_DIR}/val/" CACHE INTERNAL "Setting VAL directory to ${VAL_DIR}" FORCE)
+set(PAL_DIR "${ROOT_DIR}/platform/pal_baremetal/" CACHE INTERNAL "Setting PAL directory to ${PAL_DIR}" FORCE)
+set(TEST_DIR "${ROOT_DIR}/test_pool/" CACHE INTERNAL "Setting TEST directory to ${TEST_DIR}" FORCE)
+
+# Set internal build directory variable
+set(BUILD ${CMAKE_CURRENT_BINARY_DIR} CACHE INTERNAL "Setting build directory to ${BUILD}" FORCE)
+file(MAKE_DIRECTORY ${BUILD}/output/)
+
+# Set global compile list variable
+set(COMPILE_LIST "")
+
+# Include cmake support module
+include(${ROOT_DIR}/tools/cmake/toolchain/default.cmake)
+include(${ROOT_DIR}/tools/cmake/toolchain/utils.cmake)
+
+# Valid value range for command line argument
+list(APPEND ARM_ARCH_MAJOR_LIST 8 9)
+
+# Check for valid targets
+_get_sub_dir_list(TARGET_LIST ${ROOT_DIR}/platform/pal_baremetal/)
+if(NOT DEFINED TARGET)
+    set(TARGET ${TARGET_DFLT} CACHE INTERNAL "Defaulting target to ${TARGET}" FORCE)
+else()
+    set(TARGET ${TARGET} CACHE INTERNAL "TARGET is set to ${TARGET}" FORCE)
+endif()
+
+if(NOT ${TARGET} IN_LIST TARGET_LIST)
+    message(FATAL_ERROR "[ACS] : Error: Unspported value for -DTARGET=, supported targets are : ${TARGET_LIST}")
+else()
+    message(STATUS "[ACS] : TARGET is set to ${TARGET}")
+endif()
+
+# Check for ARM_ARCH_MAJOR
+if(NOT DEFINED ARM_ARCH_MAJOR)
+    set(ARM_ARCH_MAJOR "${ARM_ARCH_MAJOR_DFLT}" CACHE INTERNAL "Default ARM_ARCH_MAJOR value" FORCE)
+        message(STATUS "[ACS] : Defaulting ARM_ARCH_MAJOR to ${ARM_ARCH_MAJOR}")
+else()
+    if(NOT ${ARM_ARCH_MAJOR} IN_LIST ARM_ARCH_MAJOR_LIST)
+        message(FATAL_ERROR "[ACS] : Error: Unspported value for -DARM_ARCH_MAJOR=, supported values are : ${ARM_ARCH_MAJOR_LIST}")
+    endif()
+    message(STATUS "[ACS] : ARM_ARCH_MAJOR is set to ${ARM_ARCH_MAJOR}")
+endif()
+
+# Check for ARM_ARCH_MINOR
+if(NOT DEFINED ARM_ARCH_MINOR)
+    set(ARM_ARCH_MINOR "${ARM_ARCH_MINOR_DFLT}" CACHE INTERNAL "Default ARM_ARCH_MINOR value" FORCE)
+        message(STATUS "[ACS] : Defaulting ARM_ARCH_MINOR to ${ARM_ARCH_MINOR}")
+else()
+    message(STATUS "[ACS] : ARM_ARCH_MINOR is set to ${ARM_ARCH_MINOR}")
+endif()
+
+# Setup toolchain parameters for compilation and link
+include(${ROOT_DIR}/tools/cmake/toolchain/common.cmake)
+
+# CMake clean target
+list(APPEND CLEAN_LIST
+        ${CMAKE_CURRENT_BINARY_DIR}/${OUTPUT_HEADER}
+        ${CMAKE_CURRENT_BINARY_DIR}/output
+)
+
+# Include the files for make clean
+foreach(clean_item ${CLEAN_LIST})
+        set_property(DIRECTORY APPEND PROPERTY ADDITIONAL_MAKE_CLEAN_FILES ${clean_item})
+endforeach()
+
+add_subdirectory(${ROOT_DIR}/tools/cmake/rme)

Docs/Arm_RME_System_Architecture_Compliance_Suite_Bare-metal_User_Guide.pdf

@@ -19,7 +19,7 @@ This suite includes a set of examples of the invariant behaviors that are provid
 Most of the tests are executed from UEFI Shell by executing the RME UEFI shell application.
 
 ## Release details
-  - Code Quality: Beta
+  - Code Quality: EAC
   - The tests are written for version B.a of the Arm Realm Management Extension (RME) System Architecture.
   - The compliance suite is not a substitute for design verification.
 
@@ -77,38 +77,6 @@ To start the ACS build, perform the following steps:
    - Add  RmeValLib|ShellPkg/Application/rme-acs/val/RmeValLib.inf
    - Add  RmePalLib|ShellPkg/Application/rme-acs/platform/pal_uefi/RmePalLib.inf
    - Add ShellPkg/Application/rme-acs/uefi_app/RmeAcs.inf in the [components] section of ShellPkg/ShellPkg.dsc <br>
-    If Baremetal platform, checkout to ACS tag v23.12_REL1.0 then add the following to [LibraryClasses.common] section in ShellPkg/ShellPkg.dsc
-   - Add  RmeValLib|ShellPkg/Application/rme-acs/val/RmeValLib.inf
-   - Add  RmePalBaremetalLib|ShellPkg/Application/rme-acs/platform/pal_baremetal/RmePalBaremetalLib.inf
-   - Add  RmePalFVPLib|ShellPkg/Application/rme-acs/platform/pal_baremetal/FVP/RmePalFVPLib.inf
-   - Modify CC Flags in the [BuildOptions] section of ShellPkg/ShellPkg.dsc
-```
-      *_*_*_CC_FLAGS = -DENABLE_OOB
-
-      !include StdLib/StdLib.inc
-```
-   - Modify the following in the edk2-libc/StdLib/LibC/Main/Main.c
-```
-      -extern int main( int, char**);
-      +extern int ShellAppMainrme( int, char**);
-```
-   - Modify the following in ShellAppMain() of edk2-libc/StdLib/LibC/Main/Main.c
-```
-      -ExitVal = (INTN)main( (int)Argc, gMD->NArgV);
-      +ExitVal = (INTN)ShellAppMainrme( (int)Argc, gMD->NArgV);
-```
-   - Comment the map[] variable in edk2-libc/StdLib/LibC/Main/Arm/flt_rounds.c to avoid -werror=unused-variable
-```
-      +#if 0
-      static const int map[] = {
-      1,  /* round to nearest */
-      2,  /* round to positive infinity */
-      3,  /* round to negative infinity */
-      0   /* round to zero */
-      };
-      +#endif
-```
-   - Add ShellPkg/Application/rme-acs/baremetal_app/RmeAcs.inf in the [components] section of ShellPkg/ShellPkg.dsc
 
 ### Linux build environment
 If the build environment is Linux, perform the following steps:
@@ -193,10 +161,12 @@ Below tests are not qualified in model. These are expected to pass in any valid
   - test_pool/legacy_system/test_ls002.c - Require Legacy TZ Support.
   - test_pool/legacy_system/test_ls003.c - Require Legacy TZ Support.
   - test_pool/legacy_system/test_ls004.c - Require Legacy TZ Support.
-  - test_pool/rme/test_rme029.c - Reference Validation Platform Issue.
+  - test_pool/rme/test_rme029.c - Model Issue.
   - test_pool/rme/test_rme022.c - Require NS encryption to be programmable.
-  - test_pool/rme/test_rme015.c - Reference Validation Platform limitation.
-  - test_pool/da/test_da008.c - Reference Validation Platform Issue.
+  - test_pool/gic/test_g001.c -   Model issue.
+  - test_pool/rme/test_rme015.c - Model limitation.
+  - test_pool/da/test_da019.c - ImpDef RP write-protect and full-protect registers not present in Model.
+  - test_pool/da/test_da020.c - ImpDef interconnect registers not present in Model.
 
 ## License
 RME System ACS is distributed under Apache v2.0 License.
@@ -208,4 +178,4 @@ RME System ACS is distributed under Apache v2.0 License.
 
 --------------
 
-*Copyright (c) 2022-2024, Arm Limited and Contributors. All rights reserved.*
+*Copyright (c) 2022-2025, Arm Limited and Contributors. All rights reserved.*

Docs/Arm_RME_System_Architecture_Compliance_Suite_Scenario_Document.pdf

@@ -1,5 +1,5 @@
 /** @file
- * Copyright (c) 2022-2024, Arm Limited or its affiliates. All rights reserved.
+ * Copyright (c) 2022-2025, Arm Limited or its affiliates. All rights reserved.
  * SPDX-License-Identifier : Apache-2.0
 
  * Licensed under the Apache License, Version 2.0 (the "License");
@@ -18,14 +18,49 @@
 #ifndef __RME_ACS_LEVEL_H__
 #define __RME_ACS_LEVEL_H__
 
-  #define SIZE_4K 0x100
+#include "platform_image_def.h"
+#include "platform_override_fvp.h"
 
-  #define RME_MIN_LEVEL_SUPPORTED 3
-  #define RME_MAX_LEVEL_SUPPORTED 6
+#define SIZE_4K 0x1000
 
-  #ifdef _AARCH64_BUILD_
+#define RME_ACS_MAJOR_VER  1
+#define RME_ACS_MINOR_VER  0
+
+#define RME_MIN_LEVEL_SUPPORTED 3
+#define RME_MAX_LEVEL_SUPPORTED 6
+
+#define INVALID_MPIDR       0xffffffff
+#define STACK_SIZE          0x1000
+
+#define PAGE_SIZE_4K        0x1000
+#define PAGE_SIZE_16K       (4 * 0x1000)
+#define PAGE_SIZE_64K       (16 * 0x1000)
+
+#define PLATFORM_CPU_COUNT PLATFORM_OVERRIDE_PE_CNT
+
+#if (PLATFORM_PAGE_SIZE == PAGE_SIZE_4K)
+ #define PAGE_SIZE           PAGE_SIZE_4K
+#elif (PLATFORM_PAGE_SIZE == PAGE_SIZE_16K)
+ #define PAGE_SIZE           PAGE_SIZE_16K
+#elif (PLATFORM_PAGE_SIZE == PAGE_SIZE_64K)
+ #define PAGE_SIZE           PAGE_SIZE_64K
+#endif
+
+/*******************************************************************************
+ * Used to align variables on the biggest cache line size in the platform.
+ * This is known only to the platform as it might have a combination of
+ * integrated and external caches.
+ ******************************************************************************/
+#define CACHE_WRITEBACK_SHIFT     6
+#define CACHE_WRITEBACK_GRANULE   (1 << CACHE_WRITEBACK_SHIFT)
+
+#ifdef _AARCH64_BUILD_
   unsigned long __stack_chk_guard = 0xBAAAAAAD;
   unsigned long __stack_chk_fail =  0xBAAFAAAD;
-  #endif
+#endif
+
+#define SCTLR_I_BIT         (1 << 12)
+#define SCTLR_M_BIT         (1 << 0)
+#define DISABLE_MMU_BIT     (0xFFFFFFFFFFFFFFFE)
 
 #endif

Docs/Arm_RME_System_Architecture_Compliance_Suite_Testcase_Checklist.rst

@@ -1,5 +1,5 @@
 /** @file
- * Copyright (c) 2022-2024, Arm Limited or its affiliates. All rights reserved.
+ * Copyright (c) 2022-2025, Arm Limited or its affiliates. All rights reserved.
  * SPDX-License-Identifier : Apache-2.0
 
  * Licensed under the Apache License, Version 2.0 (the "License");
@@ -19,12 +19,10 @@
 #include "val/include/rme_acs_pe.h"
 #include "val/include/rme_acs_val.h"
 #include "val/include/rme_acs_memory.h"
-#include "platform/pal_baremetal/FVP/include/platform_override_fvp.h"
 #include "RmeAcs.h"
 
 uint32_t  g_enable_pcie_tests;
 uint32_t  g_print_level;
-uint32_t  g_execute_nist;
 uint32_t  g_print_mmio;
 uint32_t  g_curr_module;
 uint32_t  g_enable_module;
@@ -34,10 +32,10 @@ uint32_t  g_rme_tests_fail;
 uint64_t  g_stack_pointer;
 uint64_t  g_exception_ret_addr;
 uint64_t  g_ret_addr;
-uint32_t  g_skip_test_num[MAX_TEST_SKIP_NUM] = {10000, 10000, 10000, 10000, 10000,
-                                                 10000, 10000, 10000, 10000, 10000};
-uint32_t  g_single_test = SINGLE_TEST_SENTINEL;
-uint32_t  g_single_module = SINGLE_MODULE_SENTINEL;
+
+extern uint32_t g_skip_test_num[];
+extern uint32_t g_single_test;
+extern uint32_t g_single_module;
 
 uint32_t
 createPeInfoTable(
@@ -102,12 +100,18 @@ createPcieVirtInfoTable(
 {
   uint64_t   *PcieInfoTable;
   uint64_t   *IoVirtInfoTable;
+  uint64_t   *RegisterInfoTable;
 
   PcieInfoTable = val_aligned_alloc(SIZE_4K, sizeof(PCIE_INFO_TABLE)
                   + (PLATFORM_OVERRIDE_NUM_ECAM * sizeof(PCIE_INFO_BLOCK)));
 
   val_pcie_create_info_table(PcieInfoTable);
 
+  RegisterInfoTable = val_aligned_alloc(SIZE_4K, sizeof(REGISTER_INFO_TABLE)
+                  + (PLATFORM_OVERRIDE_RP_REG_NUM_ENTRIES * sizeof(REGISTER_INFO_TABLE)));
+
+  val_register_create_info_table(RegisterInfoTable);
+
   IoVirtInfoTable = val_aligned_alloc(SIZE_4K, sizeof(IOVIRT_INFO_TABLE)
                     + ((NUM_ITS_COUNT + IOVIRT_SMMUV3_COUNT + IOVIRT_RC_COUNT
                     + IOVIRT_SMMUV2_COUNT + IOVIRT_NAMED_COMPONENT_COUNT + IOVIRT_PMCG_COUNT)
@@ -168,8 +172,16 @@ ShellAppMainrme(
       g_print_level = ACS_PRINT_ERR;
   }
 
+#ifdef TARGET_BM_BOOT
+  /* Write page tables */
+  if (val_setup_mmu())
+      return ACS_STATUS_FAIL;
+
+  /* Enable Stage-1 MMU */
+  if (val_enable_mmu())
+      return ACS_STATUS_FAIL;
+#endif
 
-  g_execute_nist = FALSE;
   g_print_mmio = FALSE;
   g_enable_pcie_tests = 1;
 
@@ -181,7 +193,7 @@ ShellAppMainrme(
   g_rme_tests_fail  = 0;
 
   val_print(g_print_level, "\n\n RME Architecture Compliance Suite \n", 0);
-  val_print(g_print_level, "    Version: Issue B.a ACS BETA  \n", 0);
+  val_print(g_print_level, "    Version: Issue B.a ACS EAC   \n", 0);
 
   val_print(g_print_level, " (Print level is %2d)\n\n", g_print_level);
 
@@ -212,6 +224,11 @@ ShellAppMainrme(
   */
   configureGicIts();
 
+  /* Configure SMMUs, PCIe and Exerciser tables required for the ACS */
+  Status = val_configure_acs();
+  if (Status)
+    return Status;
+
   val_print(ACS_PRINT_TEST, "\n  *** Starting RME tests ***  \n", 0);
   Status |= val_rme_execute_tests(val_pe_get_num());
 
@@ -224,6 +241,8 @@ ShellAppMainrme(
   val_print(ACS_PRINT_TEST, "\n   *** Starting IO Virtualization tests ***      \n", 0);
   Status |= val_smmu_execute_tests(val_pe_get_num());
 
+  val_print(ACS_PRINT_TEST, "\n      *** Starting RME DA tests ***  \n", 0);
+  Status = val_rme_da_execute_tests(val_pe_get_num());
 
 print_test_status:
   val_print(ACS_PRINT_TEST, "\n     ------------------------------------------------------- \n", 0);
@@ -237,6 +256,7 @@ ShellAppMainrme(
   val_print(g_print_level, "\n      *** RME tests complete. Reset the system. *** \n\n", 0);
 
   val_pe_context_restore(AA64WriteSp(g_stack_pointer));
+  while (1);
 
   return 0;
 }

Docs/Arm_RME_System_Architecture_Compliance_Suite_User_Guide.pdf

@@ -1,3 +1,13 @@
+vB.a_EAC_25.01
+
+Baremetal Boot Framework:
+* Introduced a Baremetal Boot Framework that eliminates the requirement for UEFI in running the RME ACS suite.
+* This new framework simplifies deployment in environments where UEFI support is unavailable or not preferred.
+* Added comprehensive instructions on setting up and using the Baremetal Boot Framework.
+Test Updates:
+* Expanded test coverage incorporating the feedback received, adding new tests for the rules.
+
+
 vB.a_BETA_24.12
 
 Release Highlights: