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feat(pre-si): add more EL3 parameters to configure ACS
- Add more run time parameters similar to UEFI that can be passed from EL3 to configure the ACS. Signed-off-by: sapthagiri padmanabhan <sapthagiri.padmanabhan@arm.com> Change-Id: I68a0104135f940d0f34a0b358b92d2a6c90855e1
1 parent 5b0d0be commit 0eb26b6

6 files changed

Lines changed: 154 additions & 32 deletions

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CMakeLists.txt

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -122,8 +122,8 @@ if(DEFINED ACS_VERBOSE_LEVEL)
122122
message(STATUS "[ACS] : ACS_VERBOSE_LEVEL (compile defs) = ${ACS_VERBOSE_LEVEL}")
123123
add_compile_definitions(ACS_VERBOSE_LEVEL=${ACS_VERBOSE_LEVEL})
124124
if("${ACS_VERBOSE_LEVEL}" MATCHES "^[0-9]+$")
125-
if(${ACS_VERBOSE_LEVEL} GREATER 5)
126-
message(WARNING "[ACS] : ACS_VERBOSE_LEVEL=${ACS_VERBOSE_LEVEL} is above the expected range; would be ceiled to 5")
125+
if(${ACS_VERBOSE_LEVEL} GREATER 6)
126+
message(WARNING "[ACS] : ACS_VERBOSE_LEVEL=${ACS_VERBOSE_LEVEL} is above the expected range; would be ceiled to 6")
127127
elseif(${ACS_VERBOSE_LEVEL} LESS 1)
128128
message(WARNING "[ACS] : ACS_VERBOSE_LEVEL=${ACS_VERBOSE_LEVEL} is below the expected range; would be floored to 1")
129129
endif()

apps/baremetal/acs.h

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -99,6 +99,8 @@ extern uint32_t g_skip_modules_arr[];
9999
extern uint32_t g_num_skip_modules;
100100
extern uint32_t g_level_filter_mode;
101101
extern uint32_t g_sys_last_lvl_cache;
102+
extern uint32_t g_timeout_pass;
103+
extern uint32_t g_timeout_fail;
102104

103105
/* Globals from apps/baremetal/acs_globals.c */
104106
extern RULE_ID_e *g_rule_tests;
@@ -107,6 +109,10 @@ extern RULE_ID_e *g_rule_list;
107109
extern RULE_ID_e *g_skip_rule_list;
108110
extern uint32_t *g_execute_modules;
109111
extern uint32_t *g_skip_modules;
112+
extern uint32_t g_pcie_cache_present;
113+
extern uint32_t g_el1physkip;
114+
extern uint32_t g_pcie_p2p;
115+
extern uint32_t g_crypto_support;
110116
extern uint32_t g_print_level;
111117
extern uint32_t g_print_mmio;
112118
extern uint32_t g_curr_module;

apps/baremetal/acs_common.c

Lines changed: 50 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,7 @@
2020
#include <stdbool.h>
2121
#include "val/include/val_interface.h"
2222
#include "val/include/acs_el3_param.h"
23+
#include "val/include/rule_based_execution_enum.h"
2324

2425
extern uint64_t g_el3_param_magic;
2526
extern uint64_t g_el3_param_addr;
@@ -38,17 +39,9 @@ acs_is_module_enabled(uint32_t module_base)
3839
if (g_num_modules) {
3940
return acs_list_contains(g_execute_modules, g_num_modules, module_base);
4041
}
41-
42-
#if ACS_HAS_ENABLED_MODULE_LIST
43-
/* Build-time default list */
44-
return acs_list_contains(acs_build_module_array,
45-
acs_build_module_count,
46-
module_base);
47-
#else
4842
/* No overrides: enable everything */
4943
(void)module_base;
5044
return true;
51-
#endif
5245
}
5346

5447
bool
@@ -85,7 +78,7 @@ acs_apply_el3_params(void)
8578
params = (acs_el3_params *)(uintptr_t)g_el3_param_addr;
8679

8780
/* Optional: version check (kept minimal, versioned for future proofing) */
88-
if (params->version != ACS_EL3_PARAM_VERSION) {
81+
if ((params->version < 0x1) || (params->version > ACS_EL3_PARAM_VERSION)) {
8982
val_print(WARN,
9083
"Unsupported EL3 param version %ld, ignoring\n", params->version);
9184
return;
@@ -110,10 +103,55 @@ acs_apply_el3_params(void)
110103
}
111104

112105
/* Override skip list if provided */
113-
if (params->skip_rule_array_addr && params->skip_rule_array_count) {
106+
if ((params->version >= 0x2) && params->skip_rule_array_addr
107+
&& params->skip_rule_array_count)
108+
{
114109
g_skip_rule_list = (RULE_ID_e *)(uintptr_t)params->skip_rule_array_addr;
115110
g_skip_rule_count = (uint32_t)params->skip_rule_array_count;
116111
}
112+
113+
if ((params->version >= 0x3))
114+
{
115+
if (params->skip_module_array_addr && params->skip_module_array_count) {
116+
g_skip_modules = (uint32_t *)(uintptr_t)params->skip_module_array_addr;
117+
g_num_skip_modules = (uint32_t)params->skip_module_array_count;
118+
}
119+
120+
/* global parameter override by el3 parameter*/
121+
g_pcie_p2p = params->p2p;
122+
g_pcie_skip_dp_nic_ms = params->skip_dp_nic_ms;
123+
g_print_mmio = params->mmio;
124+
g_crypto_support = params->no_crypto_ext;
125+
g_el1skiptrap_mask = params->el1skiptrap_mask;
126+
g_bsa_sw_view_mask = params->software_view_filter;
127+
g_pcie_cache_present = params->cache;
128+
g_sys_last_lvl_cache = params->sys_cache;
129+
g_level_value = params->level;
130+
131+
if (params->level_selection >= LVL_FILTER_NONE &&
132+
params->level_selection <= LVL_FILTER_FR)
133+
g_level_filter_mode = params->level_selection;
134+
else
135+
val_print(WARN,
136+
"Override skipped for level filter mode %d\n", params->level_selection);
137+
138+
if (params->verbose >= TRACE && params->verbose <= FATAL)
139+
g_print_level = params->verbose;
140+
else
141+
val_print(WARN,
142+
"Override skipped for verbose %d\n", params->verbose);
143+
144+
if (params->timeout >= TIMEOUT_THRESHOLD
145+
&& params->timeout <= TIMEOUT_MAX_THRESHOLD)
146+
{
147+
g_timeout_pass = params->timeout;
148+
g_timer_timeout_us = params->timeout;
149+
g_timeout_fail = g_timeout_pass * WAKEUP_WD_FAILSAFE_TIMEOUT_MULTIPLIER;
150+
}
151+
else
152+
val_print(WARN,
153+
"Override skipped for timeout %d\n", params->timeout);
154+
}
117155
}
118156

119157
void
@@ -132,8 +170,8 @@ acs_apply_compile_params(void)
132170

133171
if (g_print_level < TRACE)
134172
g_print_level = TRACE;
135-
else if (g_print_level > ERROR)
136-
g_print_level = ERROR;
173+
else if (g_print_level > FATAL)
174+
g_print_level = FATAL;
137175
#endif
138176

139177
return;

apps/baremetal/acs_globals.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -22,6 +22,7 @@
2222

2323
/* Global Variables */
2424
bool g_pcie_skip_dp_nic_ms = 0;
25+
uint32_t g_pcie_p2p;
2526
uint32_t g_print_level;
2627
uint32_t g_print_mmio;
2728
uint32_t g_curr_module;
@@ -32,6 +33,7 @@ uint32_t g_acs_tests_fail;
3233
uint32_t g_build_sbsa = 0;
3334
uint32_t g_build_pcbsa = 0;
3435
uint32_t g_its_init = 0;
36+
uint32_t g_pcie_cache_present;
3537
uint64_t g_stack_pointer;
3638
uint64_t g_exception_ret_addr;
3739
uint64_t g_ret_addr;

pal/baremetal/run_time_params.rst

Lines changed: 66 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -40,27 +40,57 @@ The structure layout is defined in ``acs_el3_param.h`` as:
4040
4141
#define ACS_EL3_PARAM_MAGIC 0x425341454C335031ULL /* 'BSAEL3P1' */
4242
43-
typedef struct {
44-
uint64_t version; /* 0 or 1 */
45-
46-
/* Optional: rule selection override */
47-
uint64_t rule_array_addr; /* RULE_ID_e[] of test IDs (can be 0) */
48-
uint64_t rule_array_count; /* number of entries in rule_array_addr */
49-
50-
/* Optional: module selection override */
51-
uint64_t module_array_addr; /* uint32_t[] of module IDs (can be 0) */
52-
uint64_t module_array_count; /* number of entries in module_array_addr */
53-
54-
/* Optional: rules to skip */
55-
uint64_t skip_rule_array_addr; /* RULE_ID_e[] of rule IDs to skip (can be 0) */
56-
uint64_t skip_rule_array_count; /* number of entries in skip_rule_array_addr */
57-
} acs_el3_params;
43+
typedef struct {
44+
uint64_t version; /*1, 2 or 3 */
45+
46+
/* Optional: rule selection override */
47+
uint64_t rule_array_addr; /* RULE_ID_e[] rule IDs (can be 0) */
48+
uint64_t rule_array_count; /* number of entries in rule_array_addr */
49+
50+
/* Optional: module selection override */
51+
uint64_t module_array_addr; /* uint32_t[] of module IDs (can be 0) */
52+
uint64_t module_array_count; /* number of entries in module_array_addr */
53+
54+
/* Optional: rules to skip */
55+
uint64_t skip_rule_array_addr; /* RULE_ID_e[] of rule IDs to skip (can be 0) */
56+
uint64_t skip_rule_array_count; /* number of entries in skip_rule_array_addr */
57+
58+
/* Optional: rules to skip */
59+
uint64_t skip_module_array_addr; /* uint32_t[] of module IDs (can be 0) */
60+
uint64_t skip_module_array_count; /* number of entries in module_array_addr */
61+
62+
uint64_t cache :1; /*Pass this flag to indicate that if the test system supports
63+
PCIe address translation cache\n*/
64+
uint64_t el1skiptrap_mask :1; /*Skips EL1 register checks*/
65+
uint64_t mmio :1; /*enable pal_mmio_read/write prints use with **verbose** */
66+
uint64_t no_crypto_ext :1; /*cryptography extension not supported*/
67+
uint64_t software_view_filter :3; /*b0 : OS software view test b1 : Hypervisior view test
68+
b2:platform security view test (can be used in combination)*/
69+
uint64_t p2p :1; /* PCIe Hierarchy Supports Peer-to-Peer*/
70+
uint64_t skip_dp_nic_ms :1; /*Skip PCIe tests for DisplayPort, Network,
71+
and Mass Storage devices*/
72+
uint64_t verbose :3; /*Verbosity of the prints*/
73+
uint64_t timeout :32; /*Set pass timeout (in us) for wakeup tests (500 us - 2 sec)*/
74+
uint64_t level_selection :3; /*
75+
0: Level none
76+
1: run test till input level
77+
2: run test only for that level
78+
3:future requirement level*/
79+
uint64_t level :4; /*Input level use along with level_selection*/
80+
uint64_t sys_cache :2; /*Specify SLC cache type 0-unknown
81+
1-PPTT PE-side LLC
82+
2 - HMAT mem-side LLC */
83+
uint64_t reserved :11;
84+
} acs_el3_params;
5885

5986
Notes:
6087

6188
* The structure must live in memory that NS-EL2 / ACS can read.
6289
* Only the **address** of the structure is passed in X20.
63-
* ``version`` is used by ACS to check compatibility (currently 0 or 1).
90+
* ``version`` is used by ACS to check compatibility (currently the version is at 3).
91+
* version 1 supports module and rule selection
92+
* version 2 includes rule skip
93+
* version 3 includes module skip and other global variable overrides
6494
* Any combination of tests, modules, or skip list may be provided.
6595

6696
Module and Rule IDs
@@ -70,7 +100,7 @@ Module IDs are the **existing ENUMs**. For example:
70100

71101
.. code-block:: c
72102
typedef enum {
73-
PE,
103+
PE = 2,
74104
GIC,
75105
PERIPHERAL,
76106
MEM_MAP,
@@ -85,6 +115,10 @@ typedef enum {
85115
ETE,
86116
TPM,
87117
POWER_WAKEUP,
118+
PFDI,
119+
CXL,
120+
RME,
121+
GPU
88122
} MODULE_NAME_e;
89123

90124

@@ -112,6 +146,21 @@ At boot, ACS:
112146
- Overrides ``g_rule_list`` / ``g_rule_count`` if test override is given.
113147
- Overrides ``g_execute_modules`` / ``g_num_modules`` if module override is given.
114148
- Overrides ``g_skip_rule_list`` / ``g_skip_rule_count`` if a skip list is given.
149+
- Overrides ``g_skip_modules`` / ``g_num_skip_modules`` if a skip module overide is given.
150+
151+
**global parameter override by el3 parameter**
152+
153+
- overrides ``g_pcie_p2p `` if p2p is set
154+
- overrides ``g_pcie_skip_dp_nic_ms `` if pcie skip is set
155+
- overrides ``g_print_level `` if print level is set
156+
- overrides ``g_wakeup_timeout `` if wakeup timeout is set
157+
- overrides ``g_print_mmio `` if print mmio is set
158+
- overrides ``g_crypto_support `` if crypto support is set
159+
- overrides ``g_bsa_sw_view_mask `` if software view mask is set
160+
- overrides ``g_pcie_cache_present `` if pcie cache is set
161+
- overrides ``g_sys_last_lvl_cache `` if system level cache is set
162+
- overrides ``g_level_filter_mode `` if level filter mode is set
163+
- overrides ``g_level_value `` if level value is set
115164
3. Uses the (possibly overridden) ``g_execute_modules`` / ``g_num_modules`` to
116165
compute ``g_enabled_modules``, and then:
117166
* Creates only the required information tables.

val/include/acs_el3_param.h

Lines changed: 28 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -30,7 +30,7 @@
3030

3131
/* Example magic: "BSAEL3P1" in ASCII */
3232
#define ACS_EL3_PARAM_MAGIC 0x425341454C335031ULL /* 'BSAEL3P1' */
33-
#define ACS_EL3_PARAM_VERSION 0x1
33+
#define ACS_EL3_PARAM_VERSION 0x3
3434

3535
/* Versioned parameter block from EL3 */
3636
typedef struct {
@@ -47,6 +47,33 @@ typedef struct {
4747
/* Optional: rules to skip */
4848
uint64_t skip_rule_array_addr; /* RULE_ID_e[] of rule IDs to skip (can be 0) */
4949
uint64_t skip_rule_array_count; /* number of entries in skip_rule_array_addr */
50+
51+
/* Optional: rules to skip */
52+
uint64_t skip_module_array_addr; /* uint32_t[] of module IDs (can be 0) */
53+
uint64_t skip_module_array_count; /* number of entries in skip_module_array_addr */
54+
55+
uint64_t cache :1; /*Pass this flag to indicate that if the test system supports
56+
PCIe address translation cache\n*/
57+
uint64_t el1skiptrap_mask :1; /*Skips EL1 register checks*/
58+
uint64_t mmio :1; /*enable pal_mmio_read/write prints use with **verbose** */
59+
uint64_t no_crypto_ext :1; /*cryptography extension not supported*/
60+
uint64_t software_view_filter :3; /*b0 : OS software view test b1 : Hypervisior view test
61+
b2:platform security view test (can be used in combination)*/
62+
uint64_t p2p :1; /* PCIe Hierarchy Supports Peer-to-Peer*/
63+
uint64_t skip_dp_nic_ms :1; /*Skip PCIe tests for DisplayPort, Network,
64+
and Mass Storage devices*/
65+
uint64_t verbose :3; /*Verbosity of the prints*/
66+
uint64_t timeout :32; /*Set pass timeout (in us) for wakeup tests (500 us - 2 sec)*/
67+
uint64_t level_selection :3; /*
68+
0: Level none
69+
1: run test till input level
70+
2: run test only for that level
71+
3:future requirement level*/
72+
uint64_t level :4; /*Input level use along with level_selection*/
73+
uint64_t sys_cache :2; /*Specify SLC cache type 0-unknown
74+
1-PPTT PE-side LLC
75+
2 - HMAT mem-side LLC */
76+
uint64_t reserved :11;
5077
} acs_el3_params;
5178

5279
void acs_apply_el3_params(void);

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