fix(timer): remove obselete counter frequency tests

SrikarJosyula · chetan-rathore · commit 1413d33451b0 · 2026-05-06T20:29:36.000+05:30
- CNTFRQ_EL0 cannot be relied on to determine the base frequency
 - Drop timer tests t006 and t007 along with their declarations and entry IDs.
 - Remove the related rule-to-test mappings and direct execution hooks from BSA/SBSA paths.
 - Clean up UEFI/CMake build inputs so the deleted timer tests are no longer referenced.
 - Update the testcase checklist and test scenario documents

Signed-off-by: Srikar Josyula &lt;srikar.josyula@arm.com&gt;
Change-Id: Ib0a1822db4d569829132d2adf68998770b0c47ef
diff --git a/apps/uefi/Bsa.inf b/apps/uefi/Bsa.inf
@@ -83,7 +83,6 @@
   ../../test_pool/timer/t003.c
   ../../test_pool/timer/t004.c
   ../../test_pool/timer/t005.c
-  ../../test_pool/timer/t006.c
   ../../test_pool/timer/t008.c
   ../../test_pool/watchdog/w001.c
   ../../test_pool/watchdog/w002.c
diff --git a/apps/uefi/Sbsa.inf b/apps/uefi/Sbsa.inf
@@ -86,7 +86,6 @@
   ../../test_pool/timer/t003.c
   ../../test_pool/timer/t004.c
   ../../test_pool/timer/t005.c
-  ../../test_pool/timer/t006.c
   ../../test_pool/timer/t008.c
   ../../test_pool/watchdog/w001.c
   ../../test_pool/watchdog/w002.c
diff --git a/apps/uefi/SbsaNist.inf b/apps/uefi/SbsaNist.inf
@@ -80,7 +80,6 @@
   ../../test_pool/gic/g014.c
   ../../test_pool/gic/g015.c
   ../../test_pool/gic/g016.c
-  ../../test_pool/timer/t006.c
   ../../test_pool/watchdog/w003.c
   ../../test_pool/smmu/i008.c
   ../../test_pool/smmu/i009.c
diff --git a/apps/uefi/Vbsa.inf b/apps/uefi/Vbsa.inf
@@ -85,7 +85,6 @@
   ../../test_pool/timer/t003.c
   ../../test_pool/timer/t004.c
   ../../test_pool/timer/t005.c
-  ../../test_pool/timer/t006.c
   ../../test_pool/timer/t008.c
   ../../test_pool/watchdog/w001.c
   ../../test_pool/watchdog/w002.c
diff --git a/apps/uefi/pc_bsa.inf b/apps/uefi/pc_bsa.inf
@@ -86,7 +86,6 @@
   ../../test_pool/timer/t003.c
   ../../test_pool/timer/t004.c
   ../../test_pool/timer/t005.c
-  ../../test_pool/timer/t006.c
   ../../test_pool/timer/t008.c
   ../../test_pool/watchdog/w001.c
   ../../test_pool/watchdog/w002.c
diff --git a/apps/uefi/xbsa_acpi.inf b/apps/uefi/xbsa_acpi.inf
@@ -192,7 +192,6 @@
   ../../test_pool/gic/g014.c
   ../../test_pool/gic/g015.c
   ../../test_pool/gic/g016.c
-  ../../test_pool/timer/t006.c
   ../../test_pool/timer/t008.c
   ../../test_pool/watchdog/w003.c
   ../../test_pool/smmu/i008.c
diff --git a/docs/bsa/arm_bsa_testcase_checklist.md b/docs/bsa/arm_bsa_testcase_checklist.md
@@ -630,11 +630,11 @@ The checklist provides information about:
       <td>L1</td>
       <td>B_TIME_02</td>
       <td>B_TIME_02</td>
-      <td>407</td>
-      <td>Check System Counter Frequency</td>
-      <td>Yes</td>
-      <td>Yes</td>
-      <td>No</td>
+      <td>Not Covered</td>
+      <td></td>
+      <td></td>
+      <td></td>
+      <td></td>
       <td></td>
     </tr>
     <tr>
diff --git a/docs/sbsa/arm_sbsa_testcase_checklist.md b/docs/sbsa/arm_sbsa_testcase_checklist.md
@@ -3266,11 +3266,11 @@ The checklist provides information about:
       <td>Version 8.0</td>
       <td>S_L8TI_01</td>
       <td>S_L8TI_01</td>
-      <td>406</td>
-      <td>Check Minimum Counter Frequency 50MHz</td>
-      <td>Yes</td>
-      <td>Yes</td>
-      <td>No</td>
+      <td>Not Covered</td>
+      <td></td>
+      <td></td>
+      <td></td>
+      <td></td>
       <td></td>
     </tr>
     <tr>
diff --git a/docs/vbsa/arm_vbsa_architecture_compliance_test_scenario.md b/docs/vbsa/arm_vbsa_architecture_compliance_test_scenario.md
@@ -176,8 +176,7 @@ Purpose: capture ACS scenario outlines for each VBSA rule. Each section:
 ### V_L1TM_02 — Check Virt and Phy counter min freq
 **Rationale**: Virtual Counter (CNTVCT_EL0) = Physical counter (CNTPCT_EL0) - Virtual offset (CNTVOFF_EL2). As the offset is a constant provided by the hypervisor, the virtual counter advances at the same effective frequency as the physical counter.
 
-**Scenario**: Execute the same test used to validate B_TIME_02, which verifies physical counter runs at atleast 10MHz.
-- see section 2.6 in [BSA ACS Scenario Document](../bsa/arm_bsa_architecture_compliance_test_scenario.pdf#page18&search=B_TIME_02)
+**Rationale for not implementing** - The base frequency should be obtained from the CNTFID registers, which are implemented in Secure space. At present, ACS does not provide a mechanism for accessing Secure registers from Non-secure (NS) space.
 
 ---
 
diff --git a/docs/vbsa/arm_vbsa_testcase_checklist.md b/docs/vbsa/arm_vbsa_testcase_checklist.md
@@ -347,10 +347,10 @@ The checklist provides information about:
       <td>L1</td>
       <td><a href="arm_vbsa_architecture_compliance_test_scenario.md#v_l1tm_02--check-virt-and-phy-counter-min-freq">V_L1TM_02</td>
       <td></td>
-      <td>402</td>
-      <td>Check Virt and Phy counter min freq</td>
-      <td>✅</td>
-      <td>❌</td>
+      <td>Not Covered</td>
+      <td></td>
+      <td></td>
+      <td></td>
       <td>Related rules from other specifications: B_TIME_02 (BSA)</td>
     </tr>
     <tr>
diff --git a/test_pool/timer/t001.c b/test_pool/timer/t001.c
@@ -22,10 +22,6 @@
 #define TEST_RULE  "B_TIME_01"
 #define TEST_DESC  "Check for Generic System Counter      "
 
-#define TEST_NUM1   (ACS_TIMER_TEST_NUM_BASE + 7)
-#define TEST_RULE1  "B_TIME_02"
-#define TEST_DESC1  "Check System Counter Frequency        "
-
 /* This test checks for presence of Generic System Counter */
 static
 void
@@ -49,46 +45,6 @@ payload_check_system_counter_presence()
   }
 }
 
-/* This test checks if Generic System Counter frequency is greater than 10Mhz */
-static
-void
-payload_check_system_timer_freq()
-{
-  uint64_t counter_freq, print_freq = 0;
-  uint32_t index = val_pe_get_index_mpid(val_pe_get_mpid());
-  uint32_t print_mhz = 0;
-
-  /* Read CNTFRQ_EL0 register for counter frequency */
-  counter_freq = val_timer_get_info(TIMER_INFO_CNTFREQ, 0);
-
-  /* Convert frequency into MHz or KHz unit */
-  print_freq = counter_freq/1000;
-  if (print_freq > 1000) {
-      print_freq = print_freq/1000;
-      print_mhz = 1;
-  }
-
-  /* Print counter frequency in DEBUG verbosity */
-  if (print_mhz)
-      val_print(DEBUG, "\n       Counter frequency is %ld MHz", print_freq);
-  else
-      val_print(DEBUG, "\n       Counter frequency is %ld KHz", print_freq);
-
-  /* Check if Generic system counter frequency is greater than 10MHz */
-  if (counter_freq > 10*1000*1000) {
-      val_set_status(index, RESULT_PASS);
-      return;
-  }
-
-  /* If 10Mhz check fails, print frequency in ERROR verbosity */
-  if (print_mhz)
-      val_print(ERROR, "\n       Counter frequency is %ld MHz", print_freq);
-  else
-      val_print(ERROR, "\n       Counter frequency is %ld KHz", print_freq);
-
-  val_set_status(index, RESULT_FAIL(1));
-}
-
 uint32_t
 t001_entry(uint32_t num_pe)
 {
@@ -109,24 +65,3 @@ t001_entry(uint32_t num_pe)
 
   return status;
 }
-
-uint32_t
-t007_entry(uint32_t num_pe)
-{
-
-  uint32_t status = ACS_STATUS_FAIL;
-
-  num_pe = 1;  //This Timer test is run on single processor
-
-  val_log_context((char8_t *)__FILE__, (char8_t *)__func__, __LINE__);
-  status = val_initialize_test(TEST_NUM1, TEST_DESC1, num_pe);
-  if (status != ACS_STATUS_SKIP)
-      val_run_test_payload(TEST_NUM1, num_pe, payload_check_system_timer_freq, 0);
-
-  /* get the result from all PE and check for failure */
-  status = val_check_for_error(TEST_NUM1, num_pe, TEST_RULE1);
-
-  val_report_status(0, ACS_END(TEST_NUM1), NULL);
-
-  return status;
-}
diff --git a/test_pool/timer/t006.c b/test_pool/timer/t006.c
diff --git a/tools/cmake/infra/sbsa_test.txt b/tools/cmake/infra/sbsa_test.txt
@@ -41,7 +41,6 @@ g013.c
 g014.c
 g015.c
 g016.c
-t006.c
 w003.c
 i008.c
 i009.c
diff --git a/val/include/acs_timer.h b/val/include/acs_timer.h
@@ -47,7 +47,5 @@ uint32_t t002_entry(uint32_t num_pe);
 uint32_t t003_entry(uint32_t num_pe);
 uint32_t t004_entry(uint32_t num_pe);
 uint32_t t005_entry(uint32_t num_pe);
-uint32_t t006_entry(uint32_t num_pe);
-uint32_t t007_entry(uint32_t num_pe);
 uint32_t t008_entry(uint32_t num_pe);
 #endif // __ACS_TIMER_H__
diff --git a/val/include/rule_based_execution_enum.h b/val/include/rule_based_execution_enum.h
@@ -759,12 +759,10 @@ typedef enum {
     I028_ENTRY,
     I031_ENTRY,
     T001_ENTRY,
-    T007_ENTRY,
     T002_ENTRY,
     T003_ENTRY,
     T004_ENTRY,
     T005_ENTRY,
-    T006_ENTRY,
     T008_ENTRY,
     W001_ENTRY,
     W002_ENTRY,
diff --git a/val/src/bsa_execute_test.c b/val/src/bsa_execute_test.c
@@ -352,7 +352,6 @@ val_bsa_timer_execute_tests(uint32_t num_pe, uint32_t *g_sw_view)
           status |= t003_entry(num_pe);
           status |= t004_entry(num_pe);
           status |= t005_entry(num_pe);
-          status |= t007_entry(num_pe);
       }
   }
 
diff --git a/val/src/rule_metadata.c b/val/src/rule_metadata.c
diff --git a/val/src/sbsa_execute_test.c b/val/src/sbsa_execute_test.c
