diff --git a/CMakeLists.txt b/CMakeLists.txt index ade7ed3c..c6264104 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -47,7 +47,7 @@ include(${ROOT_DIR}/tools/cmake/toolchain/default.cmake) ### Valid value range for command line argument ### list(APPEND ARM_ARCH_MAJOR_LIST 8 9) -list(APPEND ACS_LIST "bsa" "sbsa" "pc_bsa") +list(APPEND ACS_LIST "bsa" "sbsa" "pc_bsa" "mpam") ### # Prefer the toolchain file to validate and set `CROSS_COMPILE`. diff --git a/CMakePresets.json b/CMakePresets.json index 2b21ec94..0806926b 100644 --- a/CMakePresets.json +++ b/CMakePresets.json @@ -44,6 +44,16 @@ "CMAKE_EXPORT_COMPILE_COMMANDS": true } }, + { + "name": "mpam", + "displayName": "Configure: aarch64-none-elf (mpam)", + "binaryDir": "${sourceDir}/build/${presetName}_build", + "inherits": ["baremetal"], + "cacheVariables": { + "ACS": "mpam", + "CMAKE_EXPORT_COMPILE_COMMANDS": true + } + }, { "name": "acs_all", "displayName": "Configure: aarch64-none-elf (for make acs_all)", @@ -70,6 +80,11 @@ "configurePreset": "pc_bsa", "jobs": 8 }, + { + "name": "mpam", + "configurePreset": "mpam", + "jobs": 8 + }, { "name": "acs_all", "displayName": "Build: all baremetal ACS", diff --git a/apps/baremetal/acs_runtime_init.c b/apps/baremetal/acs_runtime_init.c index 3f5a6250..f926f138 100644 --- a/apps/baremetal/acs_runtime_init.c +++ b/apps/baremetal/acs_runtime_init.c @@ -35,6 +35,7 @@ const uint32_t acs_build_module_count = sizeof(acs_build_module_array) / sizeof(acs_build_module_array[0]); #endif +#ifdef COMPILE_RB_EXE static bool acs_list_contains(const uint32_t *list, uint32_t count, uint32_t value) { @@ -111,6 +112,36 @@ acs_is_module_enabled(uint32_t module_base) return false; } +#else +bool +acs_is_module_enabled(uint32_t module_base) +{ + uint32_t i; + + /* Explicit module include list */ + if (g_num_modules) { + for (i = 0; i < g_num_modules; i++) { + if (g_execute_modules[i] == module_base) + return true; + } + } + + /* Explicit test list */ + if (g_num_tests) { + for (i = 0; i < g_num_tests; i++) { + if ((g_execute_tests[i] >= module_base) && + (g_execute_tests[i] < module_base + 100)) + return true; + } + } + + /* No filters: enable all */ + if (g_num_modules == 0 && g_num_tests == 0) + return true; + + return false; +} +#endif void acs_load_execution_policy_defaults(acs_execution_policy_t *policy) @@ -216,6 +247,7 @@ acs_load_run_request_defaults(acs_run_request_t *ctx) } } +#ifdef COMPILE_RB_EXE void acs_apply_el3_params(acs_run_request_t *ctx, acs_execution_policy_t *policy) { @@ -317,6 +349,52 @@ acs_apply_el3_params(acs_run_request_t *ctx, acs_execution_policy_t *policy) "Override skipped for timeout %d\n", params->timeout); } } +#else +void +acs_apply_el3_params(acs_run_request_t *ctx, acs_execution_policy_t *policy) +{ + acs_el3_params *params; + + if (ctx == NULL || policy == NULL) + return; + + /* If magic doesn't match, ignore X20 completely */ + if (g_el3_param_magic != ACS_EL3_PARAM_MAGIC) + return; + + if (!g_el3_param_addr) { + val_print(WARN, + "EL3 param magic set but param address is 0, ignoring\n"); + return; + } + + params = (acs_el3_params *)(uintptr_t)g_el3_param_addr; + + if ((params->version < 0x1) || (params->version > ACS_EL3_PARAM_VERSION)) { + val_print(WARN, + "Unsupported EL3 param version %ld, ignoring\n", params->version); + return; + } + + if (params->test_array_addr && params->test_array_count) { + g_execute_tests = (uint32_t *)(uintptr_t)params->test_array_addr; + g_num_tests = (uint32_t)params->test_array_count; + } + + if (params->module_array_addr && params->module_array_count) { + g_execute_modules = (uint32_t *)(uintptr_t)params->module_array_addr; + g_num_modules = (uint32_t)params->module_array_count; + } + + if (params->skip_test_array_addr && params->skip_test_array_count) { + g_skip_test_num = (uint32_t *)(uintptr_t)params->skip_test_array_addr; + g_num_skip = (uint32_t)params->skip_test_array_count; + } + + if (params->verbose >= TRACE && params->verbose <= FATAL) + policy->print_level = params->verbose; +} +#endif void acs_apply_compile_params(acs_run_request_t *ctx, acs_execution_policy_t *policy) diff --git a/apps/baremetal/mpam_main.c b/apps/baremetal/mpam_main.c new file mode 100644 index 00000000..7b771b6a --- /dev/null +++ b/apps/baremetal/mpam_main.c @@ -0,0 +1,223 @@ +/** @file + * Copyright (c) 2026, Arm Limited or its affiliates. All rights reserved. + * SPDX-License-Identifier : Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. +**/ + +#include "val/include/val_interface.h" +#include "val/include/pal_interface.h" +#include "val/include/acs_val.h" +#include "val/include/acs_pe.h" +#include "val/include/acs_mpam.h" +#include "val/include/acs_memory.h" +#include "acs.h" + +/* + * Build-time selection arrays for the MPAM bare-metal (non rule-based) path. + */ +extern uint32_t g_skip_array[]; +extern const uint32_t g_skip_array_len; +extern uint32_t g_test_array[]; +extern const uint32_t g_test_array_len; +extern uint32_t g_module_array[]; +extern const uint32_t g_module_array_len; + +/* MPAM bare-metal globals local. */ +uint32_t *g_skip_test_num; +uint32_t g_num_skip; +uint32_t *g_execute_tests; +uint32_t g_num_tests; +uint32_t *g_execute_modules; +uint32_t g_num_modules; +uint32_t g_execute_secure = 0; + +static void +free_mpam_mem(void) +{ + val_free_shared_mem(); + val_mpam_free_info_table(); + val_pcc_free_info_table(); + + if (acs_is_module_enabled(ACS_MPAM_MEMORY_TEST_NUM_BASE)) { + val_srat_free_info_table(); + val_hmat_free_info_table(); + } + + if (acs_is_module_enabled(ACS_MPAM_CACHE_TEST_NUM_BASE) || + acs_is_module_enabled(ACS_MPAM_MONITOR_TEST_NUM_BASE)) + val_cache_free_info_table(); + + if (acs_is_module_enabled(ACS_MPAM_ERROR_TEST_NUM_BASE) || + acs_is_module_enabled(ACS_MPAM_CACHE_TEST_NUM_BASE) || + acs_is_module_enabled(ACS_MPAM_MONITOR_TEST_NUM_BASE) || + acs_is_module_enabled(ACS_MPAM_MEMORY_TEST_NUM_BASE)) { + val_iovirt_free_info_table(); + val_gic_free_info_table(); + } + + val_pe_free_info_table(); +} + +static uint32_t +apply_mpam_defaults(acs_run_request_t *ctx, acs_execution_policy_t *policy) +{ + if (ctx == NULL || policy == NULL) + return ACS_STATUS_FAIL; + + acs_load_run_request_defaults(ctx); + acs_load_execution_policy_defaults(policy); + + policy->print_level = PLATFORM_OVERRIDE_PRINT_LEVEL; + policy->print_mmio = 0; + ctx->arch_selection = ARCH_NONE; + + /* Use build-time selection arrays (legacy non-rulebase mechanism). */ + g_skip_test_num = g_skip_array; + g_num_skip = g_skip_array_len; + g_execute_tests = g_test_array; + g_num_tests = g_test_array_len; + g_execute_modules = g_module_array; + g_num_modules = g_module_array_len; + g_acs_tests_total = 0; + g_acs_tests_pass = 0; + g_acs_tests_fail = 0; + g_execute_secure = 0; + + return ACS_STATUS_PASS; +} + +int32_t +ShellAppMainmpam(void) +{ + uint32_t status = ACS_STATUS_PASS; + uint32_t msc_node_cnt; + void *branch_label; + uint32_t context_saved = 0; + acs_run_request_t *ctx; + acs_execution_policy_t *policy; + + acs_reset_run_request(); + ctx = acs_get_run_request_mut(); + policy = acs_get_execution_policy_mut(); + + status = apply_mpam_defaults(ctx, policy); + if (status != ACS_STATUS_PASS) { + val_print(ERROR, "\napply_mpam_defaults() failed, Exiting...\n"); + goto exit_acs; + } + + acs_apply_compile_params(ctx, policy); + acs_apply_el3_params(ctx, policy); + + val_print(INFO, "\n\n MPAM Architecture Compliance Suite\n"); + val_print(INFO, " Version %d.", MPAM_ACS_MAJOR_VER); + val_print(INFO, "%d.", MPAM_ACS_MINOR_VER); + val_print(INFO, "%d\n", MPAM_ACS_SUBMINOR_VER); + val_print(INFO, " Built for target: %s\n", ACS_TARGET); + val_print(INFO, "(Print level is %2d)\n\n", acs_policy_get_print_level()); + +#if ACS_ENABLE_MMU + val_print(INFO, " Enabling MMU\n"); + + if (val_setup_mmu()) { + status = ACS_STATUS_FAIL; + goto exit_acs; + } + + if (val_enable_mmu()) { + status = ACS_STATUS_FAIL; + goto exit_acs; + } +#else + val_print(INFO, "Skipping MMU setup/enable (ACS_ENABLE_MMU=0)\n"); +#endif + + if (!acs_is_module_enabled(ACS_MPAM_REGISTER_TEST_NUM_BASE) && + !acs_is_module_enabled(ACS_MPAM_CACHE_TEST_NUM_BASE) && + !acs_is_module_enabled(ACS_MPAM_MONITOR_TEST_NUM_BASE) && + !acs_is_module_enabled(ACS_MPAM_ERROR_TEST_NUM_BASE) && + !acs_is_module_enabled(ACS_MPAM_MEMORY_TEST_NUM_BASE)) { + val_print(INFO, "\n No MPAM modules selected. Skipping table init/tests.\n"); + goto print_test_status; + } + + val_print(INFO, " Creating Platform Information Tables\n"); + + status = createPeInfoTable(); + if (status) + goto exit_acs; + + if (val_pe_feat_check(PE_FEAT_MPAM)) { + val_print(INFO, + "\n PE MPAM extension unimplemented. Skipping all MPAM tests\n"); + goto print_test_status; + } + + status = createGicInfoTable(); + if (status) + goto exit_acs; + + if (acs_is_module_enabled(ACS_MPAM_ERROR_TEST_NUM_BASE) || + acs_is_module_enabled(ACS_MPAM_CACHE_TEST_NUM_BASE) || + acs_is_module_enabled(ACS_MPAM_MONITOR_TEST_NUM_BASE) || + acs_is_module_enabled(ACS_MPAM_MEMORY_TEST_NUM_BASE)) + createIoVirtInfoTable(); + + if (acs_is_module_enabled(ACS_MPAM_CACHE_TEST_NUM_BASE) || + acs_is_module_enabled(ACS_MPAM_MONITOR_TEST_NUM_BASE)) + createCacheInfoTable(); + + createPccInfoTable(); + + if (acs_is_module_enabled(ACS_MPAM_MEMORY_TEST_NUM_BASE)) { + createHmatInfoTable(); + createSratInfoTable(); + } + createMpamInfoTable(); + val_mpam_update_msc_device_names(); + + msc_node_cnt = val_mpam_get_msc_count(); + if (msc_node_cnt == 0) { + val_print(INFO, "\n *** Exiting suite - No MPAM nodes *** \n"); + goto print_test_status; + } + + val_allocate_shared_mem(); + + branch_label = &&print_test_status; + val_pe_context_save(AA64ReadSp(), (uint64_t)branch_label); + context_saved = 1; + val_pe_initialize_default_exception_handler(val_pe_default_esr); + + status |= val_mpam_execute_register_tests(); + status |= val_mpam_execute_cache_tests(); + status |= val_mpam_execute_error_tests(); + status |= val_mpam_execute_membw_tests(); + +print_test_status: + val_print(ERROR, "\n ------------------------------------------------------- \n"); + val_print(ERROR, " Total Tests run = %4d;", g_acs_tests_total); + val_print(ERROR, " Tests Passed = %4d", g_acs_tests_pass); + val_print(ERROR, " Tests Failed = %4d\n", g_acs_tests_fail); + val_print(ERROR, " --------------------------------------------------------- \n"); + + val_print(INFO, "\n *** MPAM tests complete. Reset the system. *** \n\n"); + +exit_acs: + free_mpam_mem(); + acs_release_run_request(ctx); + if (context_saved) + val_pe_context_restore(AA64WriteSp(g_stack_pointer)); + return val_exit_acs(); +} diff --git a/apps/uefi/mpam_main.c b/apps/uefi/mpam_main.c index bbb0dbac..27e8fec2 100644 --- a/apps/uefi/mpam_main.c +++ b/apps/uefi/mpam_main.c @@ -446,13 +446,13 @@ execute_tests() val_pe_initialize_default_exception_handler(val_pe_default_esr); FlushImage(); - Status |= val_mpam_execute_register_tests(val_pe_get_num()); + Status |= val_mpam_execute_register_tests(); - Status |= val_mpam_execute_cache_tests(val_pe_get_num()); + Status |= val_mpam_execute_cache_tests(); - Status |= val_mpam_execute_error_tests(val_pe_get_num()); + Status |= val_mpam_execute_error_tests(); - Status |= val_mpam_execute_membw_tests(val_pe_get_num()); + Status |= val_mpam_execute_membw_tests(); FreeMpamAcsMem(); diff --git a/docs/baremetal/README.md b/docs/baremetal/README.md index e17494be..9f73ed62 100644 --- a/docs/baremetal/README.md +++ b/docs/baremetal/README.md @@ -21,7 +21,7 @@ Description of each directory are as follows: >Note: If you want to build ACS for the reference model(s) provided as part of ACS (for example, RDN2), you can directly follow the build steps below. If you want to build ACS for your own platform, you must first complete the PAL porting for your platform (refer to the Baremetal [PAL Porting Overview](porting-pal/overview.md)) and fill platform-specific knobs using: [Platform override guides](porting-pal/platform-override-guides/README.md). Once the PAL porting is complete, execute the build steps below. -> Note: .bin stands for either bsa.bin or sbsa.bin or pc_bsa.bin. Any platform specific changes can be done by using `TARGET_BAREMETAL` macro definition. The baremetal reference code is located in [baremetal](../../pal/baremetal/). +> Note: .bin stands for either bsa.bin or sbsa.bin or pc_bsa.bin or mpam.bin. Any platform specific changes can be done by using `TARGET_BAREMETAL` macro definition. The baremetal reference code is located in [baremetal](../../pal/baremetal/). Run the command - `cd sysarch-acs` @@ -48,6 +48,12 @@ Run the command   3.3 `cmake --preset pc_bsa -DTARGET="Target platform"`\   3.4 `cmake --build --preset pc_bsa` +4. To compile MPAM, perform the following steps\ +  4.1 `cd sysarch-acs`\ +  4.2 `export CROSS_COMPILE=/bin/aarch64-none-elf-`\ +  4.3 `cmake --preset mpam -DTARGET="Target platform"`\ +  4.4 `cmake --build --preset mpam` +
> **Note:** @@ -64,7 +70,7 @@ CMake Command Line Options: `-DARM_ARCH_MINOR` = Arch minor version. Default value is 6. `-DCROSS_COMPILE` = Cross compiler path `-DTARGET` = Target platform. Should be same as folder under baremetal/target/ - `-DACS` = To compile ACS + `-DACS` = To compile ACS ```
diff --git a/pal/baremetal/README.md b/pal/baremetal/README.md index 0fc938af..f345128b 100644 --- a/pal/baremetal/README.md +++ b/pal/baremetal/README.md @@ -18,7 +18,7 @@ Description of each directory are as follows: ### Pre-requisite -> Note: .bin stands for either bsa.bin or sbsa.bin or pc_bsa.bin. Any platform specific changes can be done by using `TARGET_BAREMETAL` macro definition. The baremetal reference code is located in [baremetal](.). +> Note: .bin stands for either bsa.bin or sbsa.bin or pc_bsa.bin or mpam.bin. Any platform specific changes can be done by using `TARGET_BAREMETAL` macro definition. The baremetal reference code is located in [baremetal](.). Run the command - `cd sysarch-acs` @@ -45,6 +45,12 @@ Run the command   3.3 `cmake --preset pc_bsa -DTARGET="Target platform"`\   3.4 `cmake --build --preset pc_bsa` +4. To compile MPAM, perform the following steps\ +  4.1 `cd sysarch-acs`\ +  4.2 `export CROSS_COMPILE=/bin/aarch64-none-elf-`\ +  4.3 `cmake --preset mpam -DTARGET="Target platform"`\ +  4.4 `cmake --build --preset mpam` +
> **Note:** @@ -61,7 +67,7 @@ CMake Command Line Options: `-DARM_ARCH_MINOR` = Arch minor version. Default value is 6. `-DCROSS_COMPILE` = Cross compiler path `-DTARGET` = Target platform. Should be same as folder under baremetal/target/ - `-DACS` = To compile ACS + `-DACS` = To compile ACS ```
diff --git a/pal/baremetal/base/src/pal_mpam.c b/pal/baremetal/base/src/pal_mpam.c index 0b1f7420..ec8d4a97 100644 --- a/pal/baremetal/base/src/pal_mpam.c +++ b/pal/baremetal/base/src/pal_mpam.c @@ -150,6 +150,10 @@ pal_mpam_create_info_table(MPAM_INFO_TABLE *MpamTable) curr_entry->intrf_type = platform_mpam_cfg.msc_node[Index].intrf_type; curr_entry->msc_base_addr = platform_mpam_cfg.msc_node[Index].msc_base_addr; curr_entry->msc_addr_len = platform_mpam_cfg.msc_node[Index].msc_addr_len; + curr_entry->of_intr = platform_mpam_cfg.msc_node[Index].of_intr; + curr_entry->of_intr_flags = platform_mpam_cfg.msc_node[Index].of_intr_flags; + curr_entry->err_intr = platform_mpam_cfg.msc_node[Index].err_intr; + curr_entry->err_intr_flags = platform_mpam_cfg.msc_node[Index].err_intr_flags; curr_entry->max_nrdy = platform_mpam_cfg.msc_node[Index].max_nrdy; { uint32_t j = 0; diff --git a/pal/baremetal/run_time_params.rst b/pal/baremetal/run_time_params.rst index 40fb940b..7cbf1039 100644 --- a/pal/baremetal/run_time_params.rst +++ b/pal/baremetal/run_time_params.rst @@ -93,6 +93,10 @@ Notes: * version 2 includes rule skip * version 3 includes module skip and other global variable overrides * Any combination of tests, modules, or skip list may be provided. +* Non rule-based binaries (for example the MPAM bare-metal build) use a + reduced ``acs_el3_params`` layout: ``version``, ``test_array_*``, + ``module_array_*``, ``skip_test_array_*``, and ``verbose``. Arrays are + interpreted as legacy test or module numbers rather than ``RULE_ID_e`` IDs. Module and Rule IDs ------------------- diff --git a/pal/baremetal/target/RDN2/src/platform_cfg_fvp.c b/pal/baremetal/target/RDN2/src/platform_cfg_fvp.c index 7abc21f6..1f5f3f91 100644 --- a/pal/baremetal/target/RDN2/src/platform_cfg_fvp.c +++ b/pal/baremetal/target/RDN2/src/platform_cfg_fvp.c @@ -20,6 +20,31 @@ #include "platform_override_struct.h" #include "rule_based_execution_enum.h" +/* + * MPAM-only, non-rulebase selection arrays. + * + * To run specific modules: + * - Put module base numbers in g_module_array (see val/include/bsa_acs_common.h). + * - Example: {300} runs only MPAM memory tests (ACS_MPAM_MEMORY_TEST_NUM_BASE). + * + * To run specific tests: + * - Put test numbers in g_test_array (see test_pool//test.c). + * - Example: {101} runs only the first MPAM cache test (ACS_MPAM_CACHE_TEST_NUM_BASE + 1). + * + * To skip tests/modules: + * - Put test numbers or module bases in g_skip_array. + * - Tests run = g_test_array + g_module_array - entries in g_skip_array. + */ +#ifndef COMPILE_RB_EXE +uint32_t g_skip_array[] = {}; +uint32_t g_test_array[] = {}; +uint32_t g_module_array[] = {}; + +const uint32_t g_skip_array_len = sizeof(g_skip_array) / sizeof(g_skip_array[0]); +const uint32_t g_test_array_len = sizeof(g_test_array) / sizeof(g_test_array[0]); +const uint32_t g_module_array_len = sizeof(g_module_array) / sizeof(g_module_array[0]); +#endif + /* Following global variables can be edited by user before compilation to pass hints to framework as well as run compliance against subset of rules. diff --git a/pal/baremetal/target/RDV3/src/platform_cfg_fvp.c b/pal/baremetal/target/RDV3/src/platform_cfg_fvp.c index 6462354c..fd555b0c 100644 --- a/pal/baremetal/target/RDV3/src/platform_cfg_fvp.c +++ b/pal/baremetal/target/RDV3/src/platform_cfg_fvp.c @@ -20,6 +20,31 @@ #include "platform_override_struct.h" #include "rule_based_execution_enum.h" +/* + * MPAM-only, non-rulebase selection arrays. + * + * To run specific modules: + * - Put module base numbers in g_module_array (see val/include/bsa_acs_common.h). + * - Example: {300} runs only MPAM memory tests (ACS_MPAM_MEMORY_TEST_NUM_BASE). + * + * To run specific tests: + * - Put test numbers in g_test_array (see test_pool//test.c). + * - Example: {101} runs only the first MPAM cache test (ACS_MPAM_CACHE_TEST_NUM_BASE + 1). + * + * To skip tests/modules: + * - Put test numbers or module bases in g_skip_array. + * - Tests run = g_test_array + g_module_array - entries in g_skip_array. + */ +#ifndef COMPILE_RB_EXE +uint32_t g_skip_array[] = {}; +uint32_t g_test_array[] = {}; +uint32_t g_module_array[] = {}; + +const uint32_t g_skip_array_len = sizeof(g_skip_array) / sizeof(g_skip_array[0]); +const uint32_t g_test_array_len = sizeof(g_test_array) / sizeof(g_test_array[0]); +const uint32_t g_module_array_len = sizeof(g_module_array) / sizeof(g_module_array[0]); +#endif + /* Following global variables can be edited by user before compilation to pass hints to framework as well as run compliance against subset of rules. diff --git a/pal/baremetal/target/RDV3CFG1/include/platform_image_def.h b/pal/baremetal/target/RDV3CFG1/include/platform_image_def.h index 5cfdf19c..d8283374 100644 --- a/pal/baremetal/target/RDV3CFG1/include/platform_image_def.h +++ b/pal/baremetal/target/RDV3CFG1/include/platform_image_def.h @@ -1,5 +1,5 @@ /** @file - * Copyright (c) 2025, Arm Limited or its affiliates. All rights reserved. + * Copyright (c) 2025-2026, Arm Limited or its affiliates. All rights reserved. * SPDX-License-Identifier : Apache-2.0 * Licensed under the Apache License, Version 2.0 (the "License"); @@ -23,7 +23,7 @@ */ #define PLATFORM_NORMAL_WORLD_IMAGE_SIZE 0x4000000 #define PLATFORM_HOST_IMAGE_SIZE (PLATFORM_NORMAL_WORLD_IMAGE_SIZE / 2) -#define PLATFORM_MEMORY_POOL_SIZE (250 * 0x100000) +#define PLATFORM_MEMORY_POOL_SIZE (300 * 0x100000) #define PLATFORM_SHARED_REGION_SIZE 0x100000 #define PLATFORM_HEAP_REGION_SIZE (PLATFORM_MEMORY_POOL_SIZE \ - PLATFORM_SHARED_REGION_SIZE) diff --git a/pal/baremetal/target/RDV3CFG1/include/platform_override_fvp.h b/pal/baremetal/target/RDV3CFG1/include/platform_override_fvp.h index 5206b1bd..78d946bc 100644 --- a/pal/baremetal/target/RDV3CFG1/include/platform_override_fvp.h +++ b/pal/baremetal/target/RDV3CFG1/include/platform_override_fvp.h @@ -1128,6 +1128,10 @@ #define PLATFORM_MPAM_MSC0_BASE_ADDR 0x102A41000 /* MPAM MSC Base address */ #define PLATFORM_MPAM_MSC0_ADDR_LEN 0x1008 /* MPAM MSC MMIO address length */ #define PLATFORM_MPAM_MSC0_MAX_NRDY 0 /* Max time (in ms) NRDY signal asserts*/ +#define PLATFORM_MPAM_MSC0_OF_INTR 0x0 /* MSC overflow interrupt ID */ +#define PLATFORM_MPAM_MSC0_OF_INTR_FLAGS 0x0 /* MSC overflow interrupt flags */ +#define PLATFORM_MPAM_MSC0_ERR_INTR 0x0 /* MSC error interrupt ID */ +#define PLATFORM_MPAM_MSC0_ERR_INTR_FLAGS 0x0 /* MSC error interrupt flags */ #define PLATFORM_MPAM_MSC0_RSRC_COUNT 0x1 /* Resources described by MSC0 */ #define PLATFORM_MPAM_MSC0_NAME "MSC0" #define PLATFORM_MPAM_MSC0_RSRC0_RIS_INDEX 0x0 /* RIS0: Index */ @@ -1140,6 +1144,10 @@ #define PLATFORM_MPAM_MSC1_BASE_ADDR 0x102A01000 #define PLATFORM_MPAM_MSC1_ADDR_LEN 0x1008 #define PLATFORM_MPAM_MSC1_MAX_NRDY 0 +#define PLATFORM_MPAM_MSC1_OF_INTR 0x0 +#define PLATFORM_MPAM_MSC1_OF_INTR_FLAGS 0x0 +#define PLATFORM_MPAM_MSC1_ERR_INTR 0x0 +#define PLATFORM_MPAM_MSC1_ERR_INTR_FLAGS 0x0 #define PLATFORM_MPAM_MSC1_RSRC_COUNT 0x1 #define PLATFORM_MPAM_MSC1_RSRC0_RIS_INDEX 0x0 #define PLATFORM_MPAM_MSC1_RSRC0_LOCATOR_TYPE 0x0 @@ -1151,6 +1159,10 @@ #define PLATFORM_MPAM_MSC2_BASE_ADDR 0x102641000 #define PLATFORM_MPAM_MSC2_ADDR_LEN 0x1008 #define PLATFORM_MPAM_MSC2_MAX_NRDY 0 +#define PLATFORM_MPAM_MSC2_OF_INTR 0x0 +#define PLATFORM_MPAM_MSC2_OF_INTR_FLAGS 0x0 +#define PLATFORM_MPAM_MSC2_ERR_INTR 0x0 +#define PLATFORM_MPAM_MSC2_ERR_INTR_FLAGS 0x0 #define PLATFORM_MPAM_MSC2_RSRC_COUNT 0x1 #define PLATFORM_MPAM_MSC2_RSRC0_RIS_INDEX 0x0 #define PLATFORM_MPAM_MSC2_RSRC0_LOCATOR_TYPE 0x0 @@ -1162,6 +1174,10 @@ #define PLATFORM_MPAM_MSC3_BASE_ADDR 0x102601000 #define PLATFORM_MPAM_MSC3_ADDR_LEN 0x1008 #define PLATFORM_MPAM_MSC3_MAX_NRDY 0 +#define PLATFORM_MPAM_MSC3_OF_INTR 0x0 +#define PLATFORM_MPAM_MSC3_OF_INTR_FLAGS 0x0 +#define PLATFORM_MPAM_MSC3_ERR_INTR 0x0 +#define PLATFORM_MPAM_MSC3_ERR_INTR_FLAGS 0x0 #define PLATFORM_MPAM_MSC3_RSRC_COUNT 0x1 #define PLATFORM_MPAM_MSC3_RSRC0_RIS_INDEX 0x0 #define PLATFORM_MPAM_MSC3_RSRC0_LOCATOR_TYPE 0x0 @@ -1173,6 +1189,10 @@ #define PLATFORM_MPAM_MSC4_BASE_ADDR 0x101A41000 #define PLATFORM_MPAM_MSC4_ADDR_LEN 0x1008 #define PLATFORM_MPAM_MSC4_MAX_NRDY 0 +#define PLATFORM_MPAM_MSC4_OF_INTR 0x0 +#define PLATFORM_MPAM_MSC4_OF_INTR_FLAGS 0x0 +#define PLATFORM_MPAM_MSC4_ERR_INTR 0x0 +#define PLATFORM_MPAM_MSC4_ERR_INTR_FLAGS 0x0 #define PLATFORM_MPAM_MSC4_RSRC_COUNT 0x1 #define PLATFORM_MPAM_MSC4_RSRC0_RIS_INDEX 0x0 #define PLATFORM_MPAM_MSC4_RSRC0_LOCATOR_TYPE 0x0 @@ -1184,6 +1204,10 @@ #define PLATFORM_MPAM_MSC5_BASE_ADDR 0x101A01000 #define PLATFORM_MPAM_MSC5_ADDR_LEN 0x1008 #define PLATFORM_MPAM_MSC5_MAX_NRDY 0 +#define PLATFORM_MPAM_MSC5_OF_INTR 0x0 +#define PLATFORM_MPAM_MSC5_OF_INTR_FLAGS 0x0 +#define PLATFORM_MPAM_MSC5_ERR_INTR 0x0 +#define PLATFORM_MPAM_MSC5_ERR_INTR_FLAGS 0x0 #define PLATFORM_MPAM_MSC5_RSRC_COUNT 0x1 #define PLATFORM_MPAM_MSC5_RSRC0_RIS_INDEX 0x0 #define PLATFORM_MPAM_MSC5_RSRC0_LOCATOR_TYPE 0x0 @@ -1195,6 +1219,10 @@ #define PLATFORM_MPAM_MSC6_BASE_ADDR 0x101641000 #define PLATFORM_MPAM_MSC6_ADDR_LEN 0x1008 #define PLATFORM_MPAM_MSC6_MAX_NRDY 0 +#define PLATFORM_MPAM_MSC6_OF_INTR 0x0 +#define PLATFORM_MPAM_MSC6_OF_INTR_FLAGS 0x0 +#define PLATFORM_MPAM_MSC6_ERR_INTR 0x0 +#define PLATFORM_MPAM_MSC6_ERR_INTR_FLAGS 0x0 #define PLATFORM_MPAM_MSC6_RSRC_COUNT 0x1 #define PLATFORM_MPAM_MSC6_RSRC0_RIS_INDEX 0x0 #define PLATFORM_MPAM_MSC6_RSRC0_LOCATOR_TYPE 0x0 @@ -1206,6 +1234,10 @@ #define PLATFORM_MPAM_MSC7_BASE_ADDR 0x101601000 #define PLATFORM_MPAM_MSC7_ADDR_LEN 0x1008 #define PLATFORM_MPAM_MSC7_MAX_NRDY 0 +#define PLATFORM_MPAM_MSC7_OF_INTR 0x0 +#define PLATFORM_MPAM_MSC7_OF_INTR_FLAGS 0x0 +#define PLATFORM_MPAM_MSC7_ERR_INTR 0x0 +#define PLATFORM_MPAM_MSC7_ERR_INTR_FLAGS 0x0 #define PLATFORM_MPAM_MSC7_RSRC_COUNT 0x1 #define PLATFORM_MPAM_MSC7_RSRC0_RIS_INDEX 0x0 #define PLATFORM_MPAM_MSC7_RSRC0_LOCATOR_TYPE 0x0 diff --git a/pal/baremetal/target/RDV3CFG1/src/platform_cfg_fvp.c b/pal/baremetal/target/RDV3CFG1/src/platform_cfg_fvp.c index f096eb5f..d9d2f7aa 100644 --- a/pal/baremetal/target/RDV3CFG1/src/platform_cfg_fvp.c +++ b/pal/baremetal/target/RDV3CFG1/src/platform_cfg_fvp.c @@ -20,6 +20,31 @@ #include "platform_override_struct.h" #include "rule_based_execution_enum.h" +/* + * MPAM-only, non-rulebase selection arrays. + * + * To run specific modules: + * - Put module base numbers in g_module_array (see val/include/bsa_acs_common.h). + * - Example: {300} runs only MPAM memory tests (ACS_MPAM_MEMORY_TEST_NUM_BASE). + * + * To run specific tests: + * - Put test numbers in g_test_array (see test_pool//test.c). + * - Example: {101} runs only the first MPAM cache test (ACS_MPAM_CACHE_TEST_NUM_BASE + 1). + * + * To skip tests/modules: + * - Put test numbers or module bases in g_skip_array. + * - Tests run = g_test_array + g_module_array - entries in g_skip_array. + */ +#ifndef COMPILE_RB_EXE +uint32_t g_skip_array[] = {}; +uint32_t g_test_array[] = {}; +uint32_t g_module_array[] = {}; + +const uint32_t g_skip_array_len = sizeof(g_skip_array) / sizeof(g_skip_array[0]); +const uint32_t g_test_array_len = sizeof(g_test_array) / sizeof(g_test_array[0]); +const uint32_t g_module_array_len = sizeof(g_module_array) / sizeof(g_module_array[0]); +#endif + /* Following global variables can be edited by user before compilation to pass hints to framework as well as run compliance against subset of rules. @@ -1177,6 +1202,10 @@ const PLATFORM_OVERRIDE_MPAM_INFO_TABLE platform_mpam_cfg = { .msc_node[0].identifier = PLATFORM_MPAM_MSC0_ID, .msc_node[0].msc_base_addr = PLATFORM_MPAM_MSC0_BASE_ADDR, .msc_node[0].msc_addr_len = PLATFORM_MPAM_MSC0_ADDR_LEN, + .msc_node[0].of_intr = PLATFORM_MPAM_MSC0_OF_INTR, + .msc_node[0].of_intr_flags = PLATFORM_MPAM_MSC0_OF_INTR_FLAGS, + .msc_node[0].err_intr = PLATFORM_MPAM_MSC0_ERR_INTR, + .msc_node[0].err_intr_flags = PLATFORM_MPAM_MSC0_ERR_INTR_FLAGS, .msc_node[0].max_nrdy = PLATFORM_MPAM_MSC0_MAX_NRDY, .msc_node[0].rsrc_count = PLATFORM_MPAM_MSC0_RSRC_COUNT, .msc_node[0].rsrc_node[0].ris_index = PLATFORM_MPAM_MSC0_RSRC0_RIS_INDEX, @@ -1189,6 +1218,10 @@ const PLATFORM_OVERRIDE_MPAM_INFO_TABLE platform_mpam_cfg = { .msc_node[1].identifier = PLATFORM_MPAM_MSC1_ID, .msc_node[1].msc_base_addr = PLATFORM_MPAM_MSC1_BASE_ADDR, .msc_node[1].msc_addr_len = PLATFORM_MPAM_MSC1_ADDR_LEN, + .msc_node[1].of_intr = PLATFORM_MPAM_MSC1_OF_INTR, + .msc_node[1].of_intr_flags = PLATFORM_MPAM_MSC1_OF_INTR_FLAGS, + .msc_node[1].err_intr = PLATFORM_MPAM_MSC1_ERR_INTR, + .msc_node[1].err_intr_flags = PLATFORM_MPAM_MSC1_ERR_INTR_FLAGS, .msc_node[1].max_nrdy = PLATFORM_MPAM_MSC1_MAX_NRDY, .msc_node[1].rsrc_count = PLATFORM_MPAM_MSC1_RSRC_COUNT, .msc_node[1].rsrc_node[0].ris_index = PLATFORM_MPAM_MSC1_RSRC0_RIS_INDEX, @@ -1201,6 +1234,10 @@ const PLATFORM_OVERRIDE_MPAM_INFO_TABLE platform_mpam_cfg = { .msc_node[2].identifier = PLATFORM_MPAM_MSC2_ID, .msc_node[2].msc_base_addr = PLATFORM_MPAM_MSC2_BASE_ADDR, .msc_node[2].msc_addr_len = PLATFORM_MPAM_MSC2_ADDR_LEN, + .msc_node[2].of_intr = PLATFORM_MPAM_MSC2_OF_INTR, + .msc_node[2].of_intr_flags = PLATFORM_MPAM_MSC2_OF_INTR_FLAGS, + .msc_node[2].err_intr = PLATFORM_MPAM_MSC2_ERR_INTR, + .msc_node[2].err_intr_flags = PLATFORM_MPAM_MSC2_ERR_INTR_FLAGS, .msc_node[2].max_nrdy = PLATFORM_MPAM_MSC2_MAX_NRDY, .msc_node[2].rsrc_count = PLATFORM_MPAM_MSC2_RSRC_COUNT, .msc_node[2].rsrc_node[0].ris_index = PLATFORM_MPAM_MSC2_RSRC0_RIS_INDEX, @@ -1213,6 +1250,10 @@ const PLATFORM_OVERRIDE_MPAM_INFO_TABLE platform_mpam_cfg = { .msc_node[3].identifier = PLATFORM_MPAM_MSC3_ID, .msc_node[3].msc_base_addr = PLATFORM_MPAM_MSC3_BASE_ADDR, .msc_node[3].msc_addr_len = PLATFORM_MPAM_MSC3_ADDR_LEN, + .msc_node[3].of_intr = PLATFORM_MPAM_MSC3_OF_INTR, + .msc_node[3].of_intr_flags = PLATFORM_MPAM_MSC3_OF_INTR_FLAGS, + .msc_node[3].err_intr = PLATFORM_MPAM_MSC3_ERR_INTR, + .msc_node[3].err_intr_flags = PLATFORM_MPAM_MSC3_ERR_INTR_FLAGS, .msc_node[3].max_nrdy = PLATFORM_MPAM_MSC3_MAX_NRDY, .msc_node[3].rsrc_count = PLATFORM_MPAM_MSC3_RSRC_COUNT, .msc_node[3].rsrc_node[0].ris_index = PLATFORM_MPAM_MSC3_RSRC0_RIS_INDEX, @@ -1225,6 +1266,10 @@ const PLATFORM_OVERRIDE_MPAM_INFO_TABLE platform_mpam_cfg = { .msc_node[4].identifier = PLATFORM_MPAM_MSC4_ID, .msc_node[4].msc_base_addr = PLATFORM_MPAM_MSC4_BASE_ADDR, .msc_node[4].msc_addr_len = PLATFORM_MPAM_MSC4_ADDR_LEN, + .msc_node[4].of_intr = PLATFORM_MPAM_MSC4_OF_INTR, + .msc_node[4].of_intr_flags = PLATFORM_MPAM_MSC4_OF_INTR_FLAGS, + .msc_node[4].err_intr = PLATFORM_MPAM_MSC4_ERR_INTR, + .msc_node[4].err_intr_flags = PLATFORM_MPAM_MSC4_ERR_INTR_FLAGS, .msc_node[4].max_nrdy = PLATFORM_MPAM_MSC4_MAX_NRDY, .msc_node[4].rsrc_count = PLATFORM_MPAM_MSC4_RSRC_COUNT, .msc_node[4].rsrc_node[0].ris_index = PLATFORM_MPAM_MSC4_RSRC0_RIS_INDEX, @@ -1237,6 +1282,10 @@ const PLATFORM_OVERRIDE_MPAM_INFO_TABLE platform_mpam_cfg = { .msc_node[5].identifier = PLATFORM_MPAM_MSC5_ID, .msc_node[5].msc_base_addr = PLATFORM_MPAM_MSC5_BASE_ADDR, .msc_node[5].msc_addr_len = PLATFORM_MPAM_MSC5_ADDR_LEN, + .msc_node[5].of_intr = PLATFORM_MPAM_MSC5_OF_INTR, + .msc_node[5].of_intr_flags = PLATFORM_MPAM_MSC5_OF_INTR_FLAGS, + .msc_node[5].err_intr = PLATFORM_MPAM_MSC5_ERR_INTR, + .msc_node[5].err_intr_flags = PLATFORM_MPAM_MSC5_ERR_INTR_FLAGS, .msc_node[5].max_nrdy = PLATFORM_MPAM_MSC5_MAX_NRDY, .msc_node[5].rsrc_count = PLATFORM_MPAM_MSC5_RSRC_COUNT, .msc_node[5].rsrc_node[0].ris_index = PLATFORM_MPAM_MSC5_RSRC0_RIS_INDEX, @@ -1249,6 +1298,10 @@ const PLATFORM_OVERRIDE_MPAM_INFO_TABLE platform_mpam_cfg = { .msc_node[6].identifier = PLATFORM_MPAM_MSC6_ID, .msc_node[6].msc_base_addr = PLATFORM_MPAM_MSC6_BASE_ADDR, .msc_node[6].msc_addr_len = PLATFORM_MPAM_MSC6_ADDR_LEN, + .msc_node[6].of_intr = PLATFORM_MPAM_MSC6_OF_INTR, + .msc_node[6].of_intr_flags = PLATFORM_MPAM_MSC6_OF_INTR_FLAGS, + .msc_node[6].err_intr = PLATFORM_MPAM_MSC6_ERR_INTR, + .msc_node[6].err_intr_flags = PLATFORM_MPAM_MSC6_ERR_INTR_FLAGS, .msc_node[6].max_nrdy = PLATFORM_MPAM_MSC6_MAX_NRDY, .msc_node[6].rsrc_count = PLATFORM_MPAM_MSC6_RSRC_COUNT, .msc_node[6].rsrc_node[0].ris_index = PLATFORM_MPAM_MSC6_RSRC0_RIS_INDEX, @@ -1261,6 +1314,10 @@ const PLATFORM_OVERRIDE_MPAM_INFO_TABLE platform_mpam_cfg = { .msc_node[7].identifier = PLATFORM_MPAM_MSC7_ID, .msc_node[7].msc_base_addr = PLATFORM_MPAM_MSC7_BASE_ADDR, .msc_node[7].msc_addr_len = PLATFORM_MPAM_MSC7_ADDR_LEN, + .msc_node[7].of_intr = PLATFORM_MPAM_MSC7_OF_INTR, + .msc_node[7].of_intr_flags = PLATFORM_MPAM_MSC7_OF_INTR_FLAGS, + .msc_node[7].err_intr = PLATFORM_MPAM_MSC7_ERR_INTR, + .msc_node[7].err_intr_flags = PLATFORM_MPAM_MSC7_ERR_INTR_FLAGS, .msc_node[7].max_nrdy = PLATFORM_MPAM_MSC7_MAX_NRDY, .msc_node[7].rsrc_count = PLATFORM_MPAM_MSC7_RSRC_COUNT, .msc_node[7].rsrc_node[0].ris_index = PLATFORM_MPAM_MSC7_RSRC0_RIS_INDEX, diff --git a/test_pool/mpam/feat001.c b/test_pool/mpam/feat001.c index 95e54146..0bb594f8 100644 --- a/test_pool/mpam/feat001.c +++ b/test_pool/mpam/feat001.c @@ -60,7 +60,6 @@ payload(void) void *src_buf; void *dest_buf; - uint32_t start_count = 0; uint32_t end_count = 0; uint32_t test_fail = 0; uint16_t partid_x = 1; @@ -127,7 +126,6 @@ payload(void) num_mon = 0; cpart_flag = 0; - start_count = 0; end_count = 0; /* Check if MSC implements CSU monitors */ diff --git a/test_pool/mpam/mem002.c b/test_pool/mpam/mem002.c index 8d406322..98735809 100644 --- a/test_pool/mpam/mem002.c +++ b/test_pool/mpam/mem002.c @@ -138,7 +138,7 @@ static void config_mpam_params(uint32_t mpam2_el2) return; } -void static payload_secondary() +static void payload_secondary(void) { uint32_t pe_index; @@ -189,10 +189,10 @@ get_buffer_size(uint32_t msc_index, uint32_t rsrc_index, uint32_t num_pe_cont) uint64_t buf_size; mem_length = val_mpam_memory_get_size(msc_index, rsrc_index); - if (mem_length > (NUM_PE_CONT * MEMCPY_BUF_SIZE)) + if (mem_length > (num_pe_cont * MEMCPY_BUF_SIZE)) buf_size = MEMCPY_BUF_SIZE; else - buf_size = (mem_length / NUM_PE_CONT); + buf_size = (mem_length / num_pe_cont); val_print(DEBUG, "\n Chosen Buffer Size is 0x%llx", buf_size); return buf_size; diff --git a/test_pool/mpam/partition001.c b/test_pool/mpam/partition001.c index 130a5f87..8c57d2fe 100644 --- a/test_pool/mpam/partition001.c +++ b/test_pool/mpam/partition001.c @@ -38,8 +38,8 @@ typedef struct { } cpor_config_t; static cpor_config_t cpor_config_data[] = { - {"CPOR check for 75% partition size", 75, 75, TRUE}, - {"CPOR check for 25% partition size", 25, 75, TRUE} + {"CPOR check for 75% partition size", 75, 75, true}, + {"CPOR check for 25% partition size", 25, 75, true} }; static void payload(void) diff --git a/test_pool/mpam/partition002.c b/test_pool/mpam/partition002.c index e533ede9..a0fb8e82 100644 --- a/test_pool/mpam/partition002.c +++ b/test_pool/mpam/partition002.c @@ -38,8 +38,8 @@ typedef struct { } ccap_config_t; static ccap_config_t ccap_config_data[] = { - {"CCAP check for 75% partition size", 75, 75, TRUE}, - {"CCAP check for 25% partition size", 25, 75, TRUE} + {"CCAP check for 75% partition size", 75, 75, true}, + {"CCAP check for 25% partition size", 25, 75, true} }; static void payload(void) diff --git a/test_pool/mpam/partition003.c b/test_pool/mpam/partition003.c index b33d97df..a342db2b 100644 --- a/test_pool/mpam/partition003.c +++ b/test_pool/mpam/partition003.c @@ -39,8 +39,8 @@ typedef struct { } payload_config_t; static payload_config_t test_config_data[] = { - {"Check for 75% CCAP & 75% CPOR partition size", 75, 75, 75, TRUE}, - {"Check for 75% CCAP & 25% CPOR partition size", 75, 25, 75, TRUE} + {"Check for 75% CCAP & 75% CPOR partition size", 75, 75, 75, true}, + {"Check for 75% CCAP & 25% CPOR partition size", 75, 25, 75, true} }; static void payload(void) diff --git a/test_pool/test.cmake b/test_pool/test.cmake index 2522fd74..495c6243 100644 --- a/test_pool/test.cmake +++ b/test_pool/test.cmake @@ -53,6 +53,8 @@ elseif(ACS STREQUAL "sbsa") "${ROOT_DIR}/tools/cmake/infra/sbsa_test.txt" "${ROOT_DIR}/tools/cmake/infra/bsa_test.txt" ) +elseif(ACS STREQUAL "mpam") + set(LIST_FILES "${ROOT_DIR}/tools/cmake/infra/mpam_test.txt") elseif(ACS STREQUAL "pc_bsa") set(LIST_FILES "${ROOT_DIR}/tools/cmake/infra/pc_bsa_test.txt") endif() diff --git a/tools/cmake/infra/mpam_test.txt b/tools/cmake/infra/mpam_test.txt new file mode 100644 index 00000000..39d7bb2b --- /dev/null +++ b/tools/cmake/infra/mpam_test.txt @@ -0,0 +1,44 @@ +reg001.c +reg002.c +reg003.c +reg004.c +reg005.c +reg006.c +error001.c +error002.c +error003.c +error004.c +error005.c +error006.c +error007.c +error008.c +error009.c +error010.c +error011.c +error012.c +error013.c +error014.c +intr001.c +intr002.c +intr003.c +intr004.c +intr005.c +intr006.c +partition001.c +partition002.c +partition003.c +partition004.c +partition005.c +partition006.c +monitor001.c +monitor002.c +monitor003.c +monitor004.c +monitor005.c +monitor006.c +monitor007.c +monitor008.c +mem001.c +mem002.c +mem003.c +feat001.c diff --git a/tools/cmake/toolchain/gnuarm.cmake b/tools/cmake/toolchain/gnuarm.cmake index d9ea97bf..fa7e6a05 100644 --- a/tools/cmake/toolchain/gnuarm.cmake +++ b/tools/cmake/toolchain/gnuarm.cmake @@ -55,6 +55,8 @@ elseif(ACS MATCHES "sbsa") add_definitions(-DSBSA) elseif(ACS MATCHES "bsa") add_definitions(-DBSA) +elseif(ACS MATCHES "mpam") + add_definitions(-DMPAM_ACS) endif() set(CMAKE_C_FLAGS "${TARGET_SWITCH} ${COMPILE_PIE_SWITCH} ${C_COMPILE_DEBUG_OPTIONS} -ffunction-sections -fdata-sections -mstrict-align -O0 -ffreestanding -Wall -Werror -std=gnu99 -Wextra -Wstrict-overflow -DCMAKE_GNUARM_COMPILE -Wno-packed-bitfield-compat -Wno-missing-field-initializers -mcmodel=small") # -Wcast-align -Wmissing-prototypes -Wmissing-declarations diff --git a/val/include/acs_el3_param.h b/val/include/acs_el3_param.h index 7d1eaee4..3d00ded0 100644 --- a/val/include/acs_el3_param.h +++ b/val/include/acs_el3_param.h @@ -32,7 +32,8 @@ #define ACS_EL3_PARAM_MAGIC 0x425341454C335031ULL /* 'BSAEL3P1' */ #define ACS_EL3_PARAM_VERSION 0x3 -/* Versioned parameter block from EL3 */ +#ifdef COMPILE_RB_EXE +/* Versioned parameter block from EL3 for rule-based binaries. */ typedef struct { uint64_t version; @@ -76,5 +77,28 @@ typedef struct { 2 - HMAT mem-side LLC */ uint64_t reserved :9; } acs_el3_params; +#else +/* Versioned parameter block from EL3 for non rule-based binaries (e.g. MPAM). + * Arrays are interpreted as legacy test/module numbers, not RULE_ID_e. */ +typedef struct { + uint64_t version; + + /* MPAM test selection (legacy test numbers, e.g. 1001, 1002) */ + uint64_t test_array_addr; + uint64_t test_array_count; + + /* MPAM module selection (module bases: 0/100/200/300) */ + uint64_t module_array_addr; + uint64_t module_array_count; + + /* MPAM tests to skip (legacy test numbers, e.g. 1001, 1002) */ + uint64_t skip_test_array_addr; + uint64_t skip_test_array_count; + + /* Verbosity override for non-rulebase */ + uint64_t verbose :3; + uint64_t reserved :61; +} acs_el3_params; +#endif /* COMPILE_RB_EXE */ #endif /* ACS_EL3_PARAM_H */ diff --git a/val/include/val_interface.h b/val/include/val_interface.h index 7b1c365b..d2103efe 100644 --- a/val/include/val_interface.h +++ b/val/include/val_interface.h @@ -764,10 +764,10 @@ typedef enum { } MPAM_MODULE_ID_e; // Module entry functions. -uint32_t val_mpam_execute_register_tests(uint32_t num_pe); -uint32_t val_mpam_execute_error_tests(uint32_t num_pe); -uint32_t val_mpam_execute_cache_tests(uint32_t num_pe); -uint32_t val_mpam_execute_membw_tests(uint32_t num_pe); +uint32_t val_mpam_execute_register_tests(void); +uint32_t val_mpam_execute_error_tests(void); +uint32_t val_mpam_execute_cache_tests(void); +uint32_t val_mpam_execute_membw_tests(void); // VAL API prototypes uint32_t val_mpam_msc_reset_errcode(uint32_t msc_index); diff --git a/val/src/AArch64/BootEntry.S b/val/src/AArch64/BootEntry.S index 8e5bf72a..9c00fca2 100644 --- a/val/src/AArch64/BootEntry.S +++ b/val/src/AArch64/BootEntry.S @@ -211,6 +211,8 @@ secondary_cpu_entry: b ShellAppMainsbsa #elif defined PC_BSA b ShellAppMainpcbsa +#elif defined MPAM_ACS + b ShellAppMainmpam #endif val_inv_icache_range: diff --git a/val/src/mpam_execute_test.c b/val/src/mpam_execute_test.c index cb63ba2e..e8706701 100644 --- a/val/src/mpam_execute_test.c +++ b/val/src/mpam_execute_test.c @@ -29,13 +29,10 @@ @return Consolidated status of all the tests run. **/ uint32_t -val_mpam_execute_error_tests(uint32_t num_pe) +val_mpam_execute_error_tests(void) { uint32_t status, i; - /* Making num_pe as 1 */ - num_pe = 1; - for (i = 0; i < g_num_skip; i++) { if (g_skip_test_num[i] == ACS_MPAM_ERROR_TEST_NUM_BASE) { val_print(TRACE, "\n USER Override - Skipping all ERROR tests\n"); @@ -104,13 +101,10 @@ val_mpam_execute_error_tests(uint32_t num_pe) @return Consolidated status of all the tests run. **/ uint32_t -val_mpam_execute_membw_tests(uint32_t num_pe) +val_mpam_execute_membw_tests(void) { uint32_t status, i; - /* Making num_pe as 1 */ - num_pe = 1; - for (i = 0; i < g_num_skip; i++) { if (g_skip_test_num[i] == ACS_MPAM_MEMORY_TEST_NUM_BASE) { val_print(TRACE, @@ -154,12 +148,10 @@ val_mpam_execute_membw_tests(uint32_t num_pe) @return Consolidated status of all the tests run. **/ uint32_t -val_mpam_execute_register_tests(uint32_t num_pe) +val_mpam_execute_register_tests(void) { uint32_t status, i; - /* Making num_pe as 1 */ - num_pe = 1; for (i = 0; i < g_num_skip; i++) { if (g_skip_test_num[i] == ACS_MPAM_REGISTER_TEST_NUM_BASE) { val_print(TRACE, "\n USER Override - Skipping all Register tests\n"); @@ -200,12 +192,10 @@ val_mpam_execute_register_tests(uint32_t num_pe) @return Consolidated status of all the tests run. **/ uint32_t -val_mpam_execute_cache_tests(uint32_t num_pe) +val_mpam_execute_cache_tests(void) { uint32_t status, i; - /* Making num_pe as 1 */ - num_pe = 1; for (i = 0; i < g_num_skip; i++) { if (g_skip_test_num[i] == ACS_MPAM_CACHE_TEST_NUM_BASE) { val_print(TRACE, "\n USER Override - Skipping all CACHE tests\n"); diff --git a/val/val.cmake b/val/val.cmake index 40a7ece6..29257a10 100644 --- a/val/val.cmake +++ b/val/val.cmake @@ -55,9 +55,8 @@ function(acs_add_val_library) add_library(${VAL_LIB} STATIC ${VAL_SRC}) - # Define COMPILE_RB_EXE for gating few compilations in val for rule based - # execution infra. - target_compile_definitions(${VAL_LIB} PRIVATE COMPILE_RB_EXE ${VAL_EXTRA_DEFS}) + # Apply only the per-ACS compile definitions that were collected upstream. + target_compile_definitions(${VAL_LIB} PRIVATE ${VAL_EXTRA_DEFS}) target_include_directories(${VAL_LIB} PRIVATE ${CMAKE_CURRENT_BINARY_DIR} @@ -88,35 +87,61 @@ function(acs_add_val_library_for_acs ACS_NAME) "${ROOT_DIR}/val/src/AArch64/Drtm.S" "${ROOT_DIR}/val/src/acs_pfdi.c" "${ROOT_DIR}/val/src/drtm_execute_test.c" - "${ROOT_DIR}/val/src/mpam_execute_test.c" "${ROOT_DIR}/val/src/pfdi_execute_test.c" ) if(ACS_NAME STREQUAL "bsa") list(APPEND remove_sources + "${ROOT_DIR}/apps/baremetal/mpam_main.c" "${ROOT_DIR}/apps/baremetal/sbsa_main.c" "${ROOT_DIR}/apps/baremetal/pc_bsa_main.c" "${ROOT_DIR}/val/src/sbsa_execute_test.c" "${ROOT_DIR}/val/src/pc_bsa_execute_test.c" + "${ROOT_DIR}/val/src/mpam_execute_test.c" ) list(APPEND remove_sources ${common_remove_sources}) - list(APPEND extra_defs BAREMETAL_BSA_BUILD) + list(APPEND extra_defs BAREMETAL_BSA_BUILD COMPILE_RB_EXE) elseif(ACS_NAME STREQUAL "sbsa") list(APPEND remove_sources + "${ROOT_DIR}/apps/baremetal/mpam_main.c" "${ROOT_DIR}/apps/baremetal/bsa_main.c" "${ROOT_DIR}/apps/baremetal/pc_bsa_main.c" "${ROOT_DIR}/val/src/bsa_execute_test.c" "${ROOT_DIR}/val/src/pc_bsa_execute_test.c" + "${ROOT_DIR}/val/src/mpam_execute_test.c" ) list(APPEND remove_sources ${common_remove_sources}) + list(APPEND extra_defs COMPILE_RB_EXE) elseif(ACS_NAME STREQUAL "pc_bsa") list(APPEND remove_sources + "${ROOT_DIR}/apps/baremetal/mpam_main.c" "${ROOT_DIR}/apps/baremetal/bsa_main.c" "${ROOT_DIR}/apps/baremetal/sbsa_main.c" "${ROOT_DIR}/val/src/bsa_execute_test.c" "${ROOT_DIR}/val/src/sbsa_execute_test.c" + "${ROOT_DIR}/val/src/mpam_execute_test.c" ) list(APPEND remove_sources ${common_remove_sources}) - list(APPEND extra_defs BAREMETAL_PCBSA_BUILD) + list(APPEND extra_defs BAREMETAL_PCBSA_BUILD COMPILE_RB_EXE) + elseif(ACS_NAME STREQUAL "mpam") + list(APPEND remove_sources + "${ROOT_DIR}/val/src/AArch64/BsaBootEntry.S" + "${ROOT_DIR}/val/src/AArch64/SbsaBootEntry.S" + "${ROOT_DIR}/apps/baremetal/bsa_main.c" + "${ROOT_DIR}/apps/baremetal/sbsa_main.c" + "${ROOT_DIR}/apps/baremetal/pc_bsa_main.c" + "${ROOT_DIR}/val/src/pc_bsa_execute_test.c" + "${ROOT_DIR}/val/src/bsa_execute_test.c" + "${ROOT_DIR}/val/src/sbsa_execute_test.c" + "${ROOT_DIR}/val/src/rule_based_execution_helpers.c" + "${ROOT_DIR}/val/src/rule_based_orchestrator.c" + "${ROOT_DIR}/val/src/rule_enum_string_map.c" + "${ROOT_DIR}/val/src/rule_lookup.c" + "${ROOT_DIR}/val/src/rule_metadata.c" + "${ROOT_DIR}/val/src/acs_exerciser.c" + "${ROOT_DIR}/val/src/rule_based_execution_enum.h" + ) + list(APPEND remove_sources ${common_remove_sources}) + list(APPEND extra_defs BAREMETAL_MPAM_BUILD) else() message(FATAL_ERROR "Unsupported ACS value for val library: ${ACS_NAME}") endif()