Changed template variables to match STMF40x

Author: FredPraca

arm/cortexm.py

@@ -835,12 +835,16 @@ def __init__(self):
     'nucleo_f401re':     {'STM32_Main_Clock_Frequency': '168_000_000',
                           'STM32_HSE_Clock_Frequency': '8_000_000',
                           'STM32_FLASH_Latency': '5',
-                          'STM32_SRAM_Size': '96K'},
+                          'STM32_Linker_RAM_Size': '96K'
+                          'STM32_Linker_Flash_Size': '512K',
+                          'STM32_Linker_CCM_Size': '64K'},
 
     'nucleo_f411re':     {'STM32_Main_Clock_Frequency': '168_000_000',
                           'STM32_HSE_Clock_Frequency': '8_000_000',
                           'STM32_FLASH_Latency': '5',
-                          'STM32_SRAM_Size': '128K'},
+                          'STM32_Linker_RAM_Size': '128K'
+                          'STM32_Linker_Flash_Size': '512K',
+                          'STM32_Linker_CCM_Size': '64K'},
 
     'feather_stm32f405': {'STM32_Main_Clock_Frequency': '168_000_000',
                           'STM32_HSE_Clock_Frequency': '12_000_000',

arm/stm32/stm32f4x1/memory-map.ld.tmpl

@@ -36,9 +36,9 @@
 
 MEMORY
 {
-  flash   (rx) : ORIGIN = 0x08000000, LENGTH = 512K
-  sram12 (rwx) : ORIGIN = 0x20000000, LENGTH = "${STM32_SRAM_Size}"
-  ccm     (rw) : ORIGIN = 0x10000000, LENGTH = 64K
+  flash   (rx) : ORIGIN = 0x08000000, LENGTH = "${STM32_Linker_Flash_Size}"
+  sram12 (rwx) : ORIGIN = 0x20000000, LENGTH = "${STM32_Linker_RAM_Size}"
+  ccm     (rw) : ORIGIN = 0x10000000, LENGTH = "${STM32_Linker_CCM_Size}"
 }
 
 REGION_ALIAS("sram_tx", sram12)