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Rename ConArg -> OtherConArg in VerilogRepr #39

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Run time

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Job	Run time
Check: code cleanliness	3s
Build ubuntu-24.04	1m 30s
Build ubuntu-22.04	1m 17s
Build macos-26	1m 38s
Build macos-15	1m 7s
Build macos-14	1m 20s
Build macos-15-intel	3m 12s
Test ${{ matrix.os }}	-1s
Test ${{ matrix.os }}	0s
Build ubuntu-22.04	1m 25s
Build ubuntu-24.04	1m 36s
Build macos-14	1m 26s
Build macos-15-intel	2m 19s
Build macos-15	1m 33s
Build macos-26	1m 18s
Check: code cleanliness	3s
Test ${{ matrix.os }}	0s
Test ${{ matrix.os }}	0s
	19m 46s