x86: Extend INC and DEC to support capability operands.

Author: bsdjhb

chap-cheri-x86-64.tex

@@ -535,6 +535,10 @@ \subsubsection{Extending Existing Instructions to Support Capability Operands}
     We do not anticipiate a need for capability-sized variants of
     \insnnoref{ADC} or \insnnoref{SBB}.
 
+  \item \insnxesref[inc]{INCC} and \insnxesref[dec]{DECC} would permit
+    simple increments and decrements of the \textbf{address} field of
+    capabilites.
+
   \item \insnxesref[and]{ANDC}, \insnxesref[or]{ORC}, and \insnxesref[xor]{XORC} would
     permit bit manipulation of the \textbf{address} field of a capability.  As
     with \insnxesref[add]{ADDC}, the second operand would always be an

chap-isaref-x86-64.tex

@@ -98,6 +98,8 @@ \section{Extensions to x86-64 Instructions}
 \input{insn-x86-64/cmp}
 \input{insn-x86-64/cmpxchg}
 \input{insn-x86-64/cmpxchg2c}
+\input{insn-x86-64/dec}
+\input{insn-x86-64/inc}
 \input{insn-x86-64/jmp}
 \input{insn-x86-64/lea}
 \input{insn-x86-64/lods}

insn-x86-64/dec.tex

@@ -0,0 +1,30 @@
+\clearpage
+\phantomsection
+\addcontentsline{toc}{subsection}{DEC - Decrement by 1}
+\insnxeslabel{dec}
+\subsection*{DEC - Decrement by 1}
+
+\begin{x86opcodetable}
+  \xopcode{CAP + FF /1}{DEC \emph{r/mc}}
+  {M}{Valid}{Valid}
+  {Decrement address field of \emph{r/mc} by 1.}
+\end{x86opcodetable}
+
+\begin{x86opentable}
+  \xopen{M}{ModRM:r/m (r,w)}{NA}{NA}{NA}
+\end{x86opentable}
+
+\subsubsection*{Description}
+
+Subtracts 1 from the \textbf{address} field of the destination operand
+and then stores the result in the destination operand. The destination
+operand can be a register or a memory location.
+
+If the new value of the \textbf{address} field makes the resulting
+capability unrepresentable, the \textbf{tag} field in the resulting
+capability is cleared.
+
+\subsubsection*{Flags Affected}
+
+The CF flag is not affected.  The OF, SF, ZF, AF, and PF flags are set
+according to the value of the resulting \textbf{address} field.

insn-x86-64/inc.tex

@@ -0,0 +1,30 @@
+\clearpage
+\phantomsection
+\addcontentsline{toc}{subsection}{INC - Increment by 1}
+\insnxeslabel{inc}
+\subsection*{INC - Increment by 1}
+
+\begin{x86opcodetable}
+  \xopcode{CAP + FF /0}{INC \emph{r/mc}}
+  {M}{Valid}{Valid}
+  {Increment address field of \emph{r/mc} by 1.}
+\end{x86opcodetable}
+
+\begin{x86opentable}
+  \xopen{M}{ModRM:r/m (r,w)}{NA}{NA}{NA}
+\end{x86opentable}
+
+\subsubsection*{Description}
+
+Adds 1 to the \textbf{address} field of the destination operand and
+then stores the result in the destination operand. The destination
+operand can be a register or a memory location.
+
+If the new value of the \textbf{address} field makes the resulting
+capability unrepresentable, the \textbf{tag} field in the resulting
+capability is cleared.
+
+\subsubsection*{Flags Affected}
+
+The CF flag is not affected.  The OF, SF, ZF, AF, and PF flags are set
+according to the value of the resulting \textbf{address} field.