Add --implicit-mem-0 option to FreeRTOS demos to disable zero-init (#399)

Many RISC-V simulators start with memory implicitly zeroed. I have
PR-d a commit to CTSRD-CHERI/FreeRTOS-Demos-CHERI-RISC-V#5
which allows the .bss and .sbss zero-initialization to be disabled
in these cases, because it takes too long to simulate and isn't necessary
in this case.

This commit adds an option to cheribuild which passes an option to
the FreeRTOS demos to disable the zero-initialization.

Author: theturboturnip

pycheribuild/projects/cross/freertos.py

@@ -199,6 +199,11 @@ def setup_config_options(cls, **kwargs):
                  "platform, RISC-V arch and RISC-V abi in the "
                  "$platform-$arch-$abi format. See RISC-V-Generic/README for more details")
 
+        cls.implicit_mem_0 = cls.add_bool_option(
+            "implicit_mem_0", show_help=True, default=False,
+            help="Set if running on a simulation platform which initializes memory to zero. "
+                 "This allows the boot phase to skip zero-initialization steps.")
+
     def default_demo_bsp(self):
         return "qemu_virt-" + self.target_info.get_riscv_arch_string(self.crosscompile_target, softfloat=True) + "-" + \
                self.target_info.get_riscv_abi(self.crosscompile_target, softfloat=True)
@@ -287,6 +292,9 @@ def configure(self):
             if self.log_udp:
               config_options += ["--log_udp"]
 
+            if self.implicit_mem_0:
+              config_options += ["--implicit-mem-0"]
+
             self._run_waf("distclean", "configure", *config_options)
 
     def install(self, **kwargs):