@@ -103,8 +103,8 @@ function rC r = {
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}
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/* writes a register with a capability value */
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- val wC : forall 'n, 0 <= 'n < 32. (regno('n), regtype) -> unit effect {wreg, escape}
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- function wC (r, v) = {
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+ val wC : forall 'n, 0 <= 'n < 32. (bool, regno('n), regtype) -> unit effect {wreg, escape}
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+ function wC (b, r, v) = {
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match r {
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0 => (),
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1 => x1 = v,
@@ -141,17 +141,21 @@ function wC (r, v) = {
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_ => internal_error("Invalid capability register")
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};
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if (r != 0) then {
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- rvfi_wX(r, v.address);
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+ if b then
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+ rvfi_wX(r, v.address);
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if get_config_print_reg() then
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print_reg("x" ^ string_of_int(r) ^ " <- " ^ RegStr(v));
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}
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}
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function rC_bits(r: bits(5)) -> regtype = rC(unsigned(r))
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- function wC_bits(r: bits(5), v: regtype) -> unit = wC( unsigned(r), v)
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+ function wC_bits(r: bits(5), v: regtype) -> unit = wC (true, unsigned(r), v)
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- overload C = {rC_bits, wC_bits, rC, wC}
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+ val wC_rvfi : forall 'n, 0 <= 'n < 32. (regno('n), regtype) -> unit effect {wreg, escape}
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+ function wC_rvfi (r, v) = wC (true, r, v)
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+
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+ overload C = {rC_bits, wC_bits, rC, wC_rvfi}
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val ext_init_regs : unit -> unit effect {wreg}
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function ext_init_regs () = {
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