Skip to content

Commit 76f1749

Browse files
committed
Dump.py + Target Fw: Updated version numbers for next release
Signed-off-by: CTXz <ctx.xda@gmail.com>
1 parent cfc4c29 commit 76f1749

File tree

3 files changed

+17
-16
lines changed

3 files changed

+17
-16
lines changed

dump.py

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -38,7 +38,7 @@
3838
from serial import Serial, SerialException
3939

4040
BAUDRATE = 9600
41-
SCRIPT_VERSION = "1.4"
41+
SCRIPT_VERSION = "1.5"
4242
REQ_ATTACK_BOARD_VERSION = "1.x"
4343
SERIAL_TIMEOUT_S = 0.5
4444
SRAM_START = 0x20000000
@@ -514,7 +514,7 @@ def get_target_fw_bin(bin_path: str, usart: int):
514514

515515
if read_bytes % 16 == 0:
516516
print("\n" + hex(0x8000000 + read_bytes) + ": ", end="")
517-
517+
518518
# Convert to hex string and print
519519
data = data.hex()
520520
print(" " + data, end="")

target/Makefile

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -22,7 +22,7 @@
2222
# - clean: Remove all build files
2323
# - release: Create a release tarball containing all target firmware binaries
2424

25-
RELEASE_VERSION=1.3
25+
RELEASE_VERSION=1.4
2626
BUILD_OUT=build
2727
CC=arm-none-eabi-gcc
2828
LD=arm-none-eabi-ld

target/main.c

Lines changed: 14 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
/*
22
* Authors: JohannesObermaier, Patrick Pedersen
33
*
4-
* Target Firmware Version: 1.3
4+
* Target Firmware Version: 1.4
55
*
66
* Dumps the entire flash memory of the target board
77
* and sends it over UART, where it is then received
@@ -31,8 +31,8 @@ const char DUMP_START_MAGIC[] = {0x10, 0xAD, 0xDA, 0x7A};
3131

3232
//// Peripheral registers
3333

34-
#define _IWDG_KR (*(uint16_t*)0x40003000)
35-
#define _WDG_SW (*(uint32_t*)0x1FFFF800 & 1UL<<16) // Page 20: https://www.st.com/resource/en/programming_manual/pm0075-stm32f10xxx-flash-memory-microcontrollers-stmicroelectronics.pdf
34+
#define _IWDG_KR (*(uint16_t *)0x40003000)
35+
#define _WDG_SW (*(uint32_t *)0x1FFFF800 & 1UL << 16) // Page 20: https://www.st.com/resource/en/programming_manual/pm0075-stm32f10xxx-flash-memory-microcontrollers-stmicroelectronics.pdf
3636

3737
// RCC
3838
#define RCC_APB1ENR (*(uint32_t *)0x4002101Cu)
@@ -148,8 +148,9 @@ USART *init_usart3()
148148

149149
#endif
150150

151-
void refresh_iwdg(void){
152-
if(iwdg_enabled)
151+
void refresh_iwdg(void)
152+
{
153+
if (iwdg_enabled)
153154
{
154155
_IWDG_KR = 0xAAAA;
155156
}
@@ -162,9 +163,9 @@ const uint8_t txtMap[] = "0123456789ABCDEF";
162163
void writeChar(uint8_t const chr)
163164
{
164165
while (!(usart->SR & USART_SR_TXE))
165-
{
166-
refresh_iwdg(); // A byte takes ~1ms to be send at 9600, so there's plenty of time to reset the IWDG
167-
/* wait */
166+
{
167+
refresh_iwdg(); // A byte takes ~1ms to be send at 9600, so there's plenty of time to reset the IWDG
168+
/* wait */
168169
}
169170

170171
usart->DR = chr;
@@ -205,7 +206,7 @@ void alertCrash(uint32_t crashId)
205206
{
206207
while (1)
207208
{
208-
refresh_iwdg(); // Keep refreshing IWDG to prevent reset
209+
refresh_iwdg(); // Keep refreshing IWDG to prevent reset
209210
}
210211
}
211212

@@ -214,7 +215,7 @@ void alertCrash(uint32_t crashId)
214215
// Called by stage 2 in entry.S
215216
int main(void)
216217
{
217-
iwdg_enabled = (_WDG_SW == 0); // Check WDG_SW bit.
218+
iwdg_enabled = (_WDG_SW == 0); // Check WDG_SW bit.
218219
refresh_iwdg();
219220

220221
/* Init USART */
@@ -236,14 +237,14 @@ int main(void)
236237
}
237238

238239
uint32_t const *addr = (uint32_t *)0x08000000;
239-
while (((uintptr_t)addr) < (0x08000000U + (1024UL * 1024UL))) // Try dumping up to 1M. When reaching unimplemented memory, it will cause hard fault and stop.
240+
while (((uintptr_t)addr) < (0x08000000U + (1024UL * 1024UL))) // Try dumping up to 1M. When reaching unimplemented memory, it will cause hard fault and stop.
240241
{
241242
writeWord(*addr);
242243
++addr;
243244
}
244245

245-
while(1) // End
246+
while (1) // End
246247
{
247-
refresh_iwdg(); // Keep refreshing IWDG to prevent reset
248+
refresh_iwdg(); // Keep refreshing IWDG to prevent reset
248249
}
249250
}

0 commit comments

Comments
 (0)