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feat: dsc fixes patch
Signed-off-by: Yaroslav Bolyukin <iam@lach.pw>
1 parent e66d294 commit b2f3a93

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‎kernel-patches/dsc/0001-edid-parse-DRM-VESA-dsc-bpp-target.patch‎

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From 1a76a6ec03d7b8d821d2da36fa4366b487a4e51b Mon Sep 17 00:00:00 2001
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From: Yaroslav Bolyukin <iam@lach.pw>
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Date: Wed, 9 Feb 2022 22:30:24 +0300
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Subject: [PATCH 1/2] edid: parse DRM VESA dsc bpp target
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I can't find this field in spec, but `edid-decode` supports it:
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https://git.linuxtv.org/edid-decode.git/tree/parse-displayid-block.cpp#n1572
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And it is also described in wikipedia:
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https://en.wikipedia.org/wiki/DisplayID#0x7E_Vendor-specific_data
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Signed-off-by: Yaroslav Bolyukin <iam@lach.pw>
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---
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drivers/gpu/drm/drm_edid.c | 31 ++++++++++++++++++++-----------
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include/drm/drm_connector.h | 6 ++++++
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include/drm/drm_displayid.h | 4 ++++
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3 files changed, 30 insertions(+), 11 deletions(-)
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diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
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index 5f2ae5bfa..58f9657ae 100644
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--- a/drivers/gpu/drm/drm_edid.c
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+++ b/drivers/gpu/drm/drm_edid.c
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@@ -5245,7 +5245,7 @@ static void drm_parse_vesa_mso_data(struct drm_connector *connector,
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if (oui(vesa->oui[0], vesa->oui[1], vesa->oui[2]) != VESA_IEEE_OUI)
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return;
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- if (sizeof(*vesa) != sizeof(*block) + block->num_bytes) {
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+ if (block->num_bytes < 5) {
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drm_dbg_kms(connector->dev, "Unexpected VESA vendor block size\n");
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return;
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}
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@@ -5265,20 +5265,29 @@ static void drm_parse_vesa_mso_data(struct drm_connector *connector,
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break;
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}
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- if (!info->mso_stream_count) {
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- info->mso_pixel_overlap = 0;
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- return;
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+ info->mso_pixel_overlap = 0;
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+
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+ if (info->mso_stream_count) {
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+ info->mso_pixel_overlap = FIELD_GET(DISPLAYID_VESA_MSO_OVERLAP, vesa->mso);
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+ if (info->mso_pixel_overlap > 8) {
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+ drm_dbg_kms(connector->dev, "Reserved MSO pixel overlap value %u\n",
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+ info->mso_pixel_overlap);
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+ info->mso_pixel_overlap = 8;
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+ }
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+
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+ drm_dbg_kms(connector->dev, "MSO stream count %u, pixel overlap %u\n",
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+ info->mso_stream_count, info->mso_pixel_overlap);
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}
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- info->mso_pixel_overlap = FIELD_GET(DISPLAYID_VESA_MSO_OVERLAP, vesa->mso);
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- if (info->mso_pixel_overlap > 8) {
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- drm_dbg_kms(connector->dev, "Reserved MSO pixel overlap value %u\n",
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- info->mso_pixel_overlap);
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- info->mso_pixel_overlap = 8;
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+ if (block->num_bytes < 7) {
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+ /* DSC bpp is optional */
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+ return;
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}
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- drm_dbg_kms(connector->dev, "MSO stream count %u, pixel overlap %u\n",
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- info->mso_stream_count, info->mso_pixel_overlap);
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+ info->dp_dsc_bpp = FIELD_GET(DISPLAYID_VESA_DSC_BPP_INT, vesa->dsc_bpp_int) * 16 +
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+ FIELD_GET(DISPLAYID_VESA_DSC_BPP_FRACT, vesa->dsc_bpp_fract);
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+
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+ drm_dbg_kms(connector->dev, "DSC bits per pixel %u\n", info->dp_dsc_bpp);
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}
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static void drm_update_mso(struct drm_connector *connector, const struct edid *edid)
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diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
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index b501d0bad..7185ec21f 100644
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--- a/include/drm/drm_connector.h
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+++ b/include/drm/drm_connector.h
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@@ -628,6 +628,12 @@ struct drm_display_info {
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* @mso_pixel_overlap: eDP MSO segment pixel overlap, 0-8 pixels.
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*/
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u8 mso_pixel_overlap;
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+
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+ /**
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+ * @dp_dsc_bpp: DP Display-Stream-Compression (DSC) timing's target
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+ * DST bits per pixel in 6.4 fixed point format. 0 means undefined
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+ */
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+ u16 dp_dsc_bpp;
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};
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int drm_display_info_set_bus_formats(struct drm_display_info *info,
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diff --git a/include/drm/drm_displayid.h b/include/drm/drm_displayid.h
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index 7ffbd9f7b..1be6deddc 100644
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--- a/include/drm/drm_displayid.h
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+++ b/include/drm/drm_displayid.h
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@@ -131,12 +131,16 @@ struct displayid_detailed_timing_block {
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#define DISPLAYID_VESA_MSO_OVERLAP GENMASK(3, 0)
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#define DISPLAYID_VESA_MSO_MODE GENMASK(6, 5)
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+#define DISPLAYID_VESA_DSC_BPP_INT GENMASK(5, 0)
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+#define DISPLAYID_VESA_DSC_BPP_FRACT GENMASK(3, 0)
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struct displayid_vesa_vendor_specific_block {
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struct displayid_block base;
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u8 oui[3];
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u8 data_structure_type;
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u8 mso;
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+ u8 dsc_bpp_int;
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+ u8 dsc_bpp_fract;
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} __packed;
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/* DisplayID iteration */
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--
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2.34.1
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‎kernel-patches/dsc/0002-drm-amd-use-fixed-dsc-bits-per-pixel-from-edid.patch‎

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From 3c2b8455e359368d9c1b35235cdc5355bf0414ac Mon Sep 17 00:00:00 2001
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From: Yaroslav Bolyukin <iam@lach.pw>
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Date: Wed, 9 Feb 2022 22:31:34 +0300
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Subject: [PATCH 2/2] drm/amd: use fixed dsc bits-per-pixel from edid
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Signed-off-by: Yaroslav Bolyukin <iam@lach.pw>
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---
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drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 2 ++
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drivers/gpu/drm/amd/display/dc/core/dc_stream.c | 2 +-
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drivers/gpu/drm/amd/display/dc/dc_types.h | 3 +++
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3 files changed, 6 insertions(+), 1 deletion(-)
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diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
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index 29f07c26d..b34dd89ae 100644
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--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
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+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
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@@ -118,6 +118,8 @@ enum dc_edid_status dm_helpers_parse_edid_caps(
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edid_caps->edid_hdmi = connector->display_info.is_hdmi;
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+ edid_caps->dsc_fixed_bits_per_pixel_x16 = connector->display_info.dp_dsc_bpp;
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+
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sad_count = drm_edid_to_sad((struct edid *) edid->raw_edid, &sads);
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if (sad_count <= 0)
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return result;
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diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
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index 57cf4cb82..3b2de219d 100644
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--- a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
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+++ b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
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@@ -105,6 +105,7 @@ static bool dc_stream_construct(struct dc_stream_state *stream,
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/* EDID CAP translation for HDMI 2.0 */
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stream->timing.flags.LTE_340MCSC_SCRAMBLE = dc_sink_data->edid_caps.lte_340mcsc_scramble;
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+ stream->timing.dsc_fixed_bits_per_pixel_x16 = dc_sink_data->edid_caps.dsc_fixed_bits_per_pixel_x16;
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memset(&stream->timing.dsc_cfg, 0, sizeof(stream->timing.dsc_cfg));
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stream->timing.dsc_cfg.num_slices_h = 0;
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@@ -738,4 +739,3 @@ void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream)
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"\tlink: %d\n",
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stream->link->link_index);
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}
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-
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diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h
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index 0285a4b38..ce2e11d70 100644
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--- a/drivers/gpu/drm/amd/display/dc/dc_types.h
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+++ b/drivers/gpu/drm/amd/display/dc/dc_types.h
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@@ -227,6 +227,9 @@ struct dc_edid_caps {
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bool edid_hdmi;
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bool hdr_supported;
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+ /* DisplayPort caps */
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+ uint32_t dsc_fixed_bits_per_pixel_x16;
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+
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struct dc_panel_patch panel_patch;
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};
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--
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2.34.1
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