Skip to content

Commit 39219ec

Browse files
manosanagghManolis Tsamisptomsich
committed
aarch64: fix handling of reversed mem ops in ldp/stp policy model
The current ldp/stp policy framework implementation would miss cases, where the memory operands were reversed. To address this, the call to the framework function is moved after the lower mem check with the suitable parameters. This change removes the mode of aarch64_operands_ok_for_ldpstp, which becomes unused. gcc/ChangeLog: * config/aarch64/aarch64-ldpstp.md: Remove unused mode. * config/aarch64/aarch64-protos.h (aarch64_operands_ok_for_ldpstp): Likewise. * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp): Call on framework moved later. Signed-off-by: Manos Anagnostakis <[email protected]> Co-Authored-by: Manolis Tsamis <[email protected]> Co-Authored-by: Philipp Tomsich <[email protected]>
1 parent 8d59b93 commit 39219ec

File tree

3 files changed

+21
-21
lines changed

3 files changed

+21
-21
lines changed

‎gcc/config/aarch64/aarch64-ldpstp.md

+11-11
Original file line numberDiff line numberDiff line change
@@ -23,7 +23,7 @@
2323
(match_operand:GPI 1 "memory_operand" ""))
2424
(set (match_operand:GPI 2 "register_operand" "")
2525
(match_operand:GPI 3 "memory_operand" ""))]
26-
"aarch64_operands_ok_for_ldpstp (operands, true, <MODE>mode)"
26+
"aarch64_operands_ok_for_ldpstp (operands, true)"
2727
[(const_int 0)]
2828
{
2929
aarch64_finish_ldpstp_peephole (operands, true);
@@ -35,7 +35,7 @@
3535
(match_operand:GPI 1 "aarch64_reg_or_zero" ""))
3636
(set (match_operand:GPI 2 "memory_operand" "")
3737
(match_operand:GPI 3 "aarch64_reg_or_zero" ""))]
38-
"aarch64_operands_ok_for_ldpstp (operands, false, <MODE>mode)"
38+
"aarch64_operands_ok_for_ldpstp (operands, false)"
3939
[(const_int 0)]
4040
{
4141
aarch64_finish_ldpstp_peephole (operands, false);
@@ -47,7 +47,7 @@
4747
(match_operand:GPF 1 "memory_operand" ""))
4848
(set (match_operand:GPF 2 "register_operand" "")
4949
(match_operand:GPF 3 "memory_operand" ""))]
50-
"aarch64_operands_ok_for_ldpstp (operands, true, <MODE>mode)"
50+
"aarch64_operands_ok_for_ldpstp (operands, true)"
5151
[(const_int 0)]
5252
{
5353
aarch64_finish_ldpstp_peephole (operands, true);
@@ -59,7 +59,7 @@
5959
(match_operand:GPF 1 "aarch64_reg_or_fp_zero" ""))
6060
(set (match_operand:GPF 2 "memory_operand" "")
6161
(match_operand:GPF 3 "aarch64_reg_or_fp_zero" ""))]
62-
"aarch64_operands_ok_for_ldpstp (operands, false, <MODE>mode)"
62+
"aarch64_operands_ok_for_ldpstp (operands, false)"
6363
[(const_int 0)]
6464
{
6565
aarch64_finish_ldpstp_peephole (operands, false);
@@ -71,7 +71,7 @@
7171
(match_operand:DREG 1 "memory_operand" ""))
7272
(set (match_operand:DREG2 2 "register_operand" "")
7373
(match_operand:DREG2 3 "memory_operand" ""))]
74-
"aarch64_operands_ok_for_ldpstp (operands, true, <DREG:MODE>mode)"
74+
"aarch64_operands_ok_for_ldpstp (operands, true)"
7575
[(const_int 0)]
7676
{
7777
aarch64_finish_ldpstp_peephole (operands, true);
@@ -83,7 +83,7 @@
8383
(match_operand:DREG 1 "register_operand" ""))
8484
(set (match_operand:DREG2 2 "memory_operand" "")
8585
(match_operand:DREG2 3 "register_operand" ""))]
86-
"aarch64_operands_ok_for_ldpstp (operands, false, <DREG:MODE>mode)"
86+
"aarch64_operands_ok_for_ldpstp (operands, false)"
8787
[(const_int 0)]
8888
{
8989
aarch64_finish_ldpstp_peephole (operands, false);
@@ -96,7 +96,7 @@
9696
(set (match_operand:VQ2 2 "register_operand" "")
9797
(match_operand:VQ2 3 "memory_operand" ""))]
9898
"TARGET_FLOAT
99-
&& aarch64_operands_ok_for_ldpstp (operands, true, <VQ:MODE>mode)
99+
&& aarch64_operands_ok_for_ldpstp (operands, true)
100100
&& (aarch64_tune_params.extra_tuning_flags
101101
& AARCH64_EXTRA_TUNE_NO_LDP_STP_QREGS) == 0"
102102
[(const_int 0)]
@@ -111,7 +111,7 @@
111111
(set (match_operand:VQ2 2 "memory_operand" "")
112112
(match_operand:VQ2 3 "register_operand" ""))]
113113
"TARGET_FLOAT
114-
&& aarch64_operands_ok_for_ldpstp (operands, false, <VQ:MODE>mode)
114+
&& aarch64_operands_ok_for_ldpstp (operands, false)
115115
&& (aarch64_tune_params.extra_tuning_flags
116116
& AARCH64_EXTRA_TUNE_NO_LDP_STP_QREGS) == 0"
117117
[(const_int 0)]
@@ -128,7 +128,7 @@
128128
(sign_extend:DI (match_operand:SI 1 "memory_operand" "")))
129129
(set (match_operand:DI 2 "register_operand" "")
130130
(sign_extend:DI (match_operand:SI 3 "memory_operand" "")))]
131-
"aarch64_operands_ok_for_ldpstp (operands, true, SImode)"
131+
"aarch64_operands_ok_for_ldpstp (operands, true)"
132132
[(const_int 0)]
133133
{
134134
aarch64_finish_ldpstp_peephole (operands, true, SIGN_EXTEND);
@@ -140,7 +140,7 @@
140140
(zero_extend:DI (match_operand:SI 1 "memory_operand" "")))
141141
(set (match_operand:DI 2 "register_operand" "")
142142
(zero_extend:DI (match_operand:SI 3 "memory_operand" "")))]
143-
"aarch64_operands_ok_for_ldpstp (operands, true, SImode)"
143+
"aarch64_operands_ok_for_ldpstp (operands, true)"
144144
[(const_int 0)]
145145
{
146146
aarch64_finish_ldpstp_peephole (operands, true, ZERO_EXTEND);
@@ -162,7 +162,7 @@
162162
(match_operand:DSX 1 "aarch64_reg_zero_or_fp_zero" ""))
163163
(set (match_operand:<FCVT_TARGET> 2 "memory_operand" "")
164164
(match_operand:<FCVT_TARGET> 3 "aarch64_reg_zero_or_fp_zero" ""))]
165-
"aarch64_operands_ok_for_ldpstp (operands, false, <V_INT_EQUIV>mode)"
165+
"aarch64_operands_ok_for_ldpstp (operands, false)"
166166
[(const_int 0)]
167167
{
168168
aarch64_finish_ldpstp_peephole (operands, false);

‎gcc/config/aarch64/aarch64-protos.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -1043,7 +1043,7 @@ int aarch64_ccmp_mode_to_code (machine_mode mode);
10431043

10441044
bool extract_base_offset_in_addr (rtx mem, rtx *base, rtx *offset);
10451045
bool aarch64_mergeable_load_pair_p (machine_mode, rtx, rtx);
1046-
bool aarch64_operands_ok_for_ldpstp (rtx *, bool, machine_mode);
1046+
bool aarch64_operands_ok_for_ldpstp (rtx *, bool);
10471047
bool aarch64_operands_adjust_ok_for_ldpstp (rtx *, bool, machine_mode);
10481048
bool aarch64_mem_ok_with_ldpstp_policy_model (rtx, bool, machine_mode);
10491049
bool aarch64_ldpstp_operand_mode_p (machine_mode);

‎gcc/config/aarch64/aarch64.cc

+9-9
Original file line numberDiff line numberDiff line change
@@ -27666,12 +27666,10 @@ aarch64_mem_ok_with_ldpstp_policy_model (rtx mem, bool load, machine_mode mode)
2766627666
}
2766727667

2766827668
/* Given OPERANDS of consecutive load/store, check if we can merge
27669-
them into ldp/stp. LOAD is true if they are load instructions.
27670-
MODE is the mode of memory operands. */
27669+
them into ldp/stp. LOAD is true if they are load instructions. */
2767127670

2767227671
bool
27673-
aarch64_operands_ok_for_ldpstp (rtx *operands, bool load,
27674-
machine_mode mode)
27672+
aarch64_operands_ok_for_ldpstp (rtx *operands, bool load)
2767527673
{
2767627674
enum reg_class rclass_1, rclass_2;
2767727675
rtx mem_1, mem_2, reg_1, reg_2;
@@ -27700,10 +27698,6 @@ aarch64_operands_ok_for_ldpstp (rtx *operands, bool load,
2770027698
if (MEM_VOLATILE_P (mem_1) || MEM_VOLATILE_P (mem_2))
2770127699
return false;
2770227700

27703-
/* Check if mem_1 is ok with the ldp-stp policy model. */
27704-
if (!aarch64_mem_ok_with_ldpstp_policy_model (mem_1, load, mode))
27705-
return false;
27706-
2770727701
/* Check if the addresses are in the form of [base+offset]. */
2770827702
bool reversed = false;
2770927703
if (!aarch64_check_consecutive_mems (&mem_1, &mem_2, &reversed))
@@ -27715,7 +27709,13 @@ aarch64_operands_ok_for_ldpstp (rtx *operands, bool load,
2771527709

2771627710
/* The lower memory access must be a mem-pair operand. */
2771727711
rtx lower_mem = reversed ? mem_2 : mem_1;
27718-
if (!aarch64_mem_pair_operand (lower_mem, GET_MODE (lower_mem)))
27712+
machine_mode lower_mem_mode = GET_MODE (lower_mem);
27713+
if (!aarch64_mem_pair_operand (lower_mem, lower_mem_mode))
27714+
return false;
27715+
27716+
/* Check if lower_mem is ok with the ldp-stp policy model. */
27717+
if (!aarch64_mem_ok_with_ldpstp_policy_model (lower_mem, load,
27718+
lower_mem_mode))
2771927719
return false;
2772027720

2772127721
if (REG_P (reg_1) && FP_REGNUM_P (REGNO (reg_1)))

0 commit comments

Comments
 (0)