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tmonjalotmonjalo
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net/mlx5: remove useless constants
- MLX5_VEC_TX_CKSUM_OFFLOAD_CAP became unused when Tx metadata moved to a dynamic field. - MLX5_ALARM_TIMEOUT_US became unused when reworking link status wait. - MLX5_FLOW_SFT_HLIST_ARRAY_SIZE was never used in hash list handling. - MLX5_FLOW_MIN_ID_POOL_SIZE and MLX5_ID_GENERATION_ARRAY_FACTOR became unused when the flow ID generator was replaced by ipool. - MLX5_RSSQ_DEFAULT_NUM was used in the old per-thread flow workspace. - MLX5_FLOW_TABLE_HWS_POLICY became unused because meter is not supported in HWS. - IPPROTO_MPLS became unused because MPLS over IP is not supported. - MLX5_L4_RSS_TYPES has never been used. - ETH_TYPE_IPV4/V6_VXLAN were never used in HWS. - PCI_DRV_FLAGS became unused when migrating to bus-agnostic probing. Fixes: 9bf26e1 ("ethdev: move egress metadata to dynamic field") Fixes: cfee947 ("net/mlx5: fix link status to use wait to complete") Fixes: f3020a3 ("net/mlx5: optimize hash list table allocate on demand") Fixes: 4ae8825 ("net/mlx5: use indexed pool as id generator") Fixes: dc7c5e0 ("net/mlx5: fix flow workspace destruction") Fixes: 645f240 ("net/mlx5: remove unsupported flow meter action in HWS") Fixes: 14ad99d ("net/mlx5: remove unsupported flow item MPLS over IP") Fixes: ae67e3c ("net/mlx5: support RSS expansion in non-template HWS setup") Fixes: c55c2bf ("net/mlx5/hws: add definer layer") Fixes: a7f3498 ("net/mlx5: migrate to bus-agnostic common interface") Cc: [email protected] Signed-off-by: Thomas Monjalon <[email protected]>
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‎drivers/net/mlx5/hws/mlx5dr_definer.c‎

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@@ -9,8 +9,6 @@
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#define GTP_PDU_SC 0x85
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#define BAD_PORT 0xBAD
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#define BAD_SQN 0xBAD
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#define ETH_TYPE_IPV4_VXLAN 0x0800
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#define ETH_TYPE_IPV6_VXLAN 0x86DD
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#define UDP_VXLAN_PORT 4789
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#define UDP_VXLAN_GPE_PORT 4790
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#define UDP_GTPU_PORT 2152

‎drivers/net/mlx5/mlx5.c‎

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@@ -394,9 +394,6 @@ static const struct mlx5_indexed_pool_config mlx5_ipool_cfg[] = {
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},
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};
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397-
#define MLX5_FLOW_MIN_ID_POOL_SIZE 512
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#define MLX5_ID_GENERATION_ARRAY_FACTOR 16
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#define MLX5_FLOW_TABLE_HLIST_ARRAY_SIZE 1024
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#define MLX5_RXQ_ENH_CQE_COMP_MASK 0x80

‎drivers/net/mlx5/mlx5.h‎

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@@ -1259,7 +1259,6 @@ struct mlx5_flow_tbl_resource {
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#define MLX5_FLOW_TABLE_LEVEL_METER (MLX5_MAX_TABLES - 3)
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#define MLX5_FLOW_TABLE_LEVEL_POLICY (MLX5_MAX_TABLES - 4)
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#define MLX5_MAX_TABLES_EXTERNAL MLX5_FLOW_TABLE_LEVEL_POLICY
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#define MLX5_FLOW_TABLE_HWS_POLICY (MLX5_MAX_TABLES - 10)
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#define MLX5_MAX_TABLES_FDB UINT16_MAX
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#define MLX5_FLOW_TABLE_PTYPE_RSS_NUM 1024
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#define MLX5_FLOW_TABLE_PTYPE_RSS_LAST (MLX5_MAX_TABLES - 11)

‎drivers/net/mlx5/mlx5_defs.h‎

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@@ -46,9 +46,6 @@
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/* Maximum number of DCS created per port. */
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#define MLX5_HWS_CNT_DCS_NUM 4
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49-
/* Alarm timeout. */
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#define MLX5_ALARM_TIMEOUT_US 100000
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/* Maximum number of extended statistics counters. */
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#define MLX5_MAX_XSTATS 64
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@@ -170,9 +167,6 @@
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/* Size of the hash table for tag table. */
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#define MLX5_TAGS_HLIST_ARRAY_SIZE (1 << 15)
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/* Size fo the hash table for SFT table. */
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#define MLX5_FLOW_SFT_HLIST_ARRAY_SIZE 4096
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/* Hairpin TX/RX queue configuration parameters. */
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#define MLX5_HAIRPIN_QUEUE_STRIDE 6
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#define MLX5_HAIRPIN_JUMBO_LOG_SIZE (14 + 2)

‎drivers/net/mlx5/mlx5_flow.h‎

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@@ -222,9 +222,6 @@ struct mlx5_mirror {
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struct mlx5_mirror_clone clone[MLX5_MIRROR_MAX_CLONES_NUM];
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};
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/* Default queue number. */
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#define MLX5_RSSQ_DEFAULT_NUM 16
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#define MLX5_FLOW_LAYER_OUTER_L2 (1u << 0)
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#define MLX5_FLOW_LAYER_OUTER_L3_IPV4 (1u << 1)
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#define MLX5_FLOW_LAYER_OUTER_L3_IPV6 (1u << 2)
@@ -469,10 +466,6 @@ struct mlx5_mirror {
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#define MLX5_FLOW_XCAP_ACTIONS (MLX5_FLOW_ACTION_ENCAP | MLX5_FLOW_ACTION_DECAP)
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#ifndef IPPROTO_MPLS
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#define IPPROTO_MPLS 137
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#endif
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#define MLX5_IPV6_HDR_ECN_MASK 0x3
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#define MLX5_IPV6_HDR_DSCP_SHIFT 2
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@@ -519,9 +512,6 @@ struct mlx5_mirror {
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RTE_ETH_RSS_NONFRAG_IPV4_TCP | RTE_ETH_RSS_NONFRAG_IPV4_UDP | \
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RTE_ETH_RSS_NONFRAG_IPV4_OTHER)
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/* Valid L4 RSS types */
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#define MLX5_L4_RSS_TYPES (RTE_ETH_RSS_L4_SRC_ONLY | RTE_ETH_RSS_L4_DST_ONLY)
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/* IBV hash source bits for IPV4. */
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#define MLX5_IPV4_IBV_RX_HASH (IBV_RX_HASH_SRC_IPV4 | IBV_RX_HASH_DST_IPV4)
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‎drivers/net/mlx5/mlx5_rxtx_vec.h‎

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@@ -13,13 +13,6 @@
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#include "mlx5_autoconf.h"
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/* HW checksum offload capabilities of vectorized Tx. */
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#define MLX5_VEC_TX_CKSUM_OFFLOAD_CAP \
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(RTE_ETH_TX_OFFLOAD_IPV4_CKSUM | \
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RTE_ETH_TX_OFFLOAD_UDP_CKSUM | \
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RTE_ETH_TX_OFFLOAD_TCP_CKSUM | \
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RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM)
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/*
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* Compile time sanity check for vectorized functions.
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*/

‎drivers/net/mlx5/windows/mlx5_os.h‎

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@@ -7,8 +7,6 @@
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#include "mlx5_win_ext.h"
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10-
#define PCI_DRV_FLAGS 0
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#define MLX5_NAMESIZE MLX5_FS_NAME_MAX
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enum mlx5_sw_parsing_offloads {

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