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4045 lines (3751 loc) · 179 KB
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# Copyright (c) 2025, Ted Zadouri, Markus Hoehnerbach, Jay Shah, Tri Dao.
import math
from typing import Callable, Optional
from functools import partial
import cuda.bindings.driver as cuda
import cutlass
import cutlass.cute as cute
from cutlass.cute import FastDivmodDivisor
from cutlass import Float32, Int32, Int64, const_expr
from cutlass.utils import LayoutEnum
from cutlass.cute.nvgpu import cpasync, tcgen05
import cutlass.utils.blackwell_helpers as sm100_utils_basic
from cutlass.pipeline import PipelineAsync
import quack.activation
from quack import layout_utils
from flash_attn.cute import utils
from flash_attn.cute.cute_dsl_utils import assume_tensor_aligned
from flash_attn.cute import copy_utils
from flash_attn.cute import pipeline
from flash_attn.cute.blackwell_helpers import gemm_w_idx, gemm_ptx_w_idx # noqa
from flash_attn.cute.mask import AttentionMask
from flash_attn.cute.seqlen_info import SeqlenInfoQK
from flash_attn.cute.block_info import BlockInfo
from quack.cute_dsl_utils import ParamsBase
from flash_attn.cute.tile_scheduler import (
TileSchedulerArguments,
SingleTileScheduler,
SingleTileLPTBwdScheduler, # noqa
SingleTileVarlenScheduler,
)
from flash_attn.cute import barrier
from flash_attn.cute.named_barrier import NamedBarrierBwdSm100
from flash_attn.cute.softmax import apply_score_mod_inner, apply_score_mod_bwd_inner
from flash_attn.cute.block_sparsity import BlockSparseTensors
from flash_attn.cute.utils import AuxData
from flash_attn.cute.block_sparse_utils import (
get_total_q_block_count_bwd,
get_block_sparse_iteration_info_bwd,
get_m_block_from_iter_bwd,
produce_block_sparse_q_loads_bwd_sm100,
)
class FlashAttentionBackwardSm100:
arch = 100
def __init__(
self,
head_dim: int,
head_dim_v: Optional[int] = None,
is_causal: bool = False,
is_local: bool = False,
qhead_per_kvhead: cutlass.Constexpr[int] = 1,
tile_m: int = 128,
tile_n: int = 128,
is_persistent: bool = False,
deterministic: bool = False,
spt: Optional[bool] = None,
cluster_size: int = 1,
use_2cta_instrs: bool = False,
score_mod: cutlass.Constexpr | None = None,
score_mod_bwd: cutlass.Constexpr | None = None,
mask_mod: cutlass.Constexpr | None = None,
has_aux_tensors: cutlass.Constexpr = False,
q_subtile_factor: cutlass.Constexpr[int] = 1,
):
# padding head_dim to a multiple of 16 as k_block_size
hdim_multiple_of = 16
self.tile_hdim = int(math.ceil(head_dim / hdim_multiple_of) * hdim_multiple_of)
head_dim_v = head_dim_v if head_dim_v is not None else head_dim
self.same_hdim_kv = head_dim == head_dim_v
self.tile_hdimv = int(math.ceil(head_dim_v / hdim_multiple_of) * hdim_multiple_of)
self.check_hdim_oob = head_dim != self.tile_hdim
self.check_hdim_v_oob = head_dim_v != self.tile_hdimv
self.tile_m = tile_m
self.tile_n = tile_n
assert self.tile_hdim <= 128 or (self.tile_hdim == 192 and self.tile_hdimv == 128)
assert self.tile_hdimv <= 128
self.use_2cta_instrs = bool(use_2cta_instrs and cluster_size == 2)
self.cta_group_size = 2 if self.use_2cta_instrs else 1
assert self.tile_hdim != 192 or self.use_2cta_instrs, "Must use 2CTA for hdim 192"
# CTA tiler
self.cta_tiler = (tile_n, tile_m, self.tile_hdim)
# S = K @ Q.T
self.mma_tiler_kq = (self.cta_group_size * tile_n, tile_m, self.tile_hdim)
# dP = V @ dO.T
self.mma_tiler_vdo = (self.cta_group_size * tile_n, tile_m, self.tile_hdimv)
# dV = P.T @ dO
self.mma_tiler_pdo = (self.cta_group_size * tile_n, self.tile_hdimv, tile_m)
# dK = dS.T @ Q
self.mma_tiler_dsq = (self.cta_group_size * tile_n, self.tile_hdim, tile_m)
# dQ = dS @ K
# 2-CTA: reduction dim is cluster-wide (tile_n * cta_group_size).
self.mma_tiler_dsk = (tile_m, self.tile_hdim, tile_n * self.cta_group_size)
self.acc_dtype = Float32
assert cluster_size in (1, 2), "Only cluster_size=1 or 2 is supported"
self.cluster_shape_mn = (cluster_size, 1)
self.is_persistent = is_persistent
self.is_causal = is_causal
self.is_local = is_local
self.qhead_per_kvhead = qhead_per_kvhead
self.pack_gqa = False
self.deterministic = deterministic
self.spt_override = spt
# Score mod and mask mod support
self.score_mod = score_mod
self.score_mod_bwd = score_mod_bwd
self.mask_mod = mask_mod
self.has_aux_tensors = has_aux_tensors
self.q_subtile_factor = q_subtile_factor
# For score_mod, use vec_size=1 (like forward) to handle per-element indices
if cutlass.const_expr(has_aux_tensors):
self.vec_size: cutlass.Constexpr = 1
else:
self.vec_size: cutlass.Constexpr = 4
self.qk_acc_dtype = Float32
# Speed optimizations, does not affect correctness
self.shuffle_LSE = False
self.shuffle_dPsum = False
# Generally slower to use store dS in smem for dK, and doesn't work for 2cta
self.use_smem_dS_for_mma_dK = False
self.reduce_warp_ids = (0, 1, 2, 3)
self.compute_warp_ids = (4, 5, 6, 7, 8, 9, 10, 11)
self.mma_warp_id = 12
self.load_warp_id = 13
self.relay_warp_id = 14
self.empty_warp_id = 15
# 16 warps -> 512 threads
self.threads_per_cta = cute.arch.WARP_SIZE * len(
(
*self.reduce_warp_ids,
*self.compute_warp_ids,
self.mma_warp_id,
self.load_warp_id,
self.relay_warp_id,
self.empty_warp_id,
)
)
# NamedBarrier
self.compute_sync_barrier = cutlass.pipeline.NamedBarrier(
barrier_id=int(NamedBarrierBwdSm100.Compute),
num_threads=len(self.compute_warp_ids) * cute.arch.WARP_SIZE,
)
# self.epilogue_sync_barrier = pipeline.NamedBarrier(
# barrier_id=2,
# num_threads=self.num_compute_warps * self.threads_per_warp,
# )
self.reduce_sync_barrier = cutlass.pipeline.NamedBarrier(
barrier_id=int(NamedBarrierBwdSm100.dQaccReduce),
num_threads=len(self.reduce_warp_ids) * cute.arch.WARP_SIZE,
)
# TMEM setup
self.tmem_alloc_cols = cute.arch.get_max_tmem_alloc_cols("sm_100")
# self.tmem_dK_offset = 0
# self.tmem_dV_offset = self.tmem_dK_offset + self.tile_hdim
# self.tmem_dQ_offset = self.tmem_dV_offset + self.tile_hdimv
# self.tmem_dP_offset = self.tmem_dQ_offset # overlap with dQ
# self.tmem_S_offset = self.tmem_dQ_offset + max(self.tile_m, self.tile_hdim)
# self.tmem_P_offset = self.tmem_S_offset # overlap with S
# self.tmem_total = self.tmem_S_offset + self.tile_n
# assert self.tmem_total <= self.tmem_alloc_cols
if self.use_2cta_instrs and self.tile_hdim == 192 and self.tile_hdimv == 128:
assert self.tile_m == 128
assert self.tile_n == 128
self.tmem_dV_offset = 0
self.tmem_dK_offset = self.tmem_dV_offset + self.tile_hdimv
self.tmem_S_offset = self.tmem_dK_offset + self.tile_hdim
self.tmem_P_offset = self.tmem_S_offset # overlap with S
self.tmem_dP_offset = 512 - self.tile_m
self.tmem_dS_offset = self.tmem_dP_offset # overlaps with dP
self.tmem_dQ_offset = 512 - self.tile_hdim // 2
else:
self.tmem_S_offset = 0
self.tmem_P_offset = 0 # overlap with S
self.tmem_dV_offset = self.tmem_S_offset + self.tile_n
self.tmem_dP_offset = self.tmem_dV_offset + self.tile_hdimv
self.tmem_dQ_offset = (
(self.tmem_S_offset + (self.tile_hdim // 2))
if self.use_2cta_instrs
else self.tmem_dP_offset
)
self.tmem_dK_offset = self.tmem_dP_offset + self.tile_m
self.tmem_dS_offset = self.tmem_dP_offset # overlap with dP
if (not is_causal and not is_local) or deterministic:
self.num_regs_reduce = 136 if self.use_2cta_instrs else 152
self.num_regs_compute = 136
self.num_regs_load = 104 if self.use_2cta_instrs else 96 - 8
self.num_regs_mma = 104 if self.use_2cta_instrs else self.num_regs_load
else:
self.num_regs_reduce = 136 if self.use_2cta_instrs else 136
self.num_regs_compute = 136 if self.use_2cta_instrs else 144
self.num_regs_load = 104 if self.use_2cta_instrs else 96 - 8
self.num_regs_mma = 104 if self.use_2cta_instrs else self.num_regs_load
self.num_regs_empty = 24
if const_expr(self.tile_hdim == 192):
if not is_causal and not is_local:
self.num_regs_reduce = 128 + 8
self.num_regs_compute = 128 + 8
self.num_regs_load = 128 - 24
self.num_regs_mma = self.num_regs_load
else:
self.num_regs_reduce = 128 + 8
self.num_regs_compute = 128 + 8
self.num_regs_load = 128 - 24
self.num_regs_mma = self.num_regs_load
assert (
self.num_regs_reduce
+ self.num_regs_compute * 2
+ max(self.num_regs_load, self.num_regs_mma)
<= 512
)
self.buffer_align_bytes = 1024
def _setup_attributes(self):
self.Q_stage = 1 if self.use_2cta_instrs else 2
self.dO_stage = 1
self.single_stage = 1
# LSE_stage = Q_stage and dPsum_stage = dO_stage
self.sdKVaccum_stage = 2
# number of tma reduce adds per dQacc mma
# todo: try 32/1 or 48/2 for 2cta d=192 dv=128
if self.use_2cta_instrs and self.tile_hdim == 192:
self.dQ_reduce_ncol_t2r = 32
self.dQ_reduce_ncol = 24 if not self.is_causal else 32
self.sdQaccum_stage = 2 if not self.is_causal else 1
else:
if self.use_2cta_instrs:
self.dQ_reduce_ncol = 16 if self.deterministic else 8
self.sdQaccum_stage = 2 if self.deterministic else 4
self.dQ_reduce_ncol_t2r = 32
else:
self.dQ_reduce_ncol = 32
self.sdQaccum_stage = 64 // self.dQ_reduce_ncol
self.dQ_reduce_ncol_t2r = self.dQ_reduce_ncol
assert (self.tile_hdim // self.cta_group_size) % self.dQ_reduce_ncol == 0
self.dQaccum_reduce_stage = self.tile_hdim // self.dQ_reduce_ncol
self.dQaccum_reduce_stage_t2r = self.tile_hdim // self.dQ_reduce_ncol_t2r
self.cluster_reduce_dQ = False and cute.size(self.cluster_shape_mn) > 1
# number of tma reduce adds for dKacc and dVacc epilogue (must divide hdim_per_wg)
self.dK_reduce_ncol = math.gcd(32, self.tile_hdim // 2)
# CTA group for MMA operations
self.cta_group = tcgen05.CtaGroup.TWO if self.use_2cta_instrs else tcgen05.CtaGroup.ONE
def _get_tiled_mma(self):
# S.T = K @ Q.T
tiled_mma_S = sm100_utils_basic.make_trivial_tiled_mma(
self.q_dtype,
tcgen05.OperandMajorMode.K,
tcgen05.OperandMajorMode.K,
self.acc_dtype,
self.cta_group,
self.mma_tiler_kq[:2],
)
# dP.T = V @ dO.T
tiled_mma_dP = sm100_utils_basic.make_trivial_tiled_mma(
self.do_dtype,
tcgen05.OperandMajorMode.K,
tcgen05.OperandMajorMode.K,
self.acc_dtype,
self.cta_group,
self.mma_tiler_vdo[:2],
)
# dV += P.T @ dO --> (K, MN) major
tiled_mma_dV = sm100_utils_basic.make_trivial_tiled_mma(
self.do_dtype,
tcgen05.OperandMajorMode.K, # P_major_mode
tcgen05.OperandMajorMode.MN, # dO_major_mode
self.acc_dtype,
self.cta_group,
self.mma_tiler_pdo[:2],
a_source=tcgen05.OperandSource.TMEM,
)
# dK += dS.T @ Q
if const_expr(self.use_smem_dS_for_mma_dK):
mma_dK_a_src = tcgen05.OperandSource.SMEM
else:
mma_dK_a_src = tcgen05.OperandSource.TMEM
tiled_mma_dK = sm100_utils_basic.make_trivial_tiled_mma(
self.do_dtype,
tcgen05.OperandMajorMode.K, # dS_major_mode
tcgen05.OperandMajorMode.MN, # Q_major_mode
self.acc_dtype,
self.cta_group,
self.mma_tiler_dsq[:2],
a_source=mma_dK_a_src,
)
# dQ = dS @ K
tiled_mma_dQ = sm100_utils_basic.make_trivial_tiled_mma(
self.k_dtype,
tcgen05.OperandMajorMode.MN, # dS_major_mode
tcgen05.OperandMajorMode.MN, # Kt_major_mode
self.acc_dtype,
self.cta_group,
self.mma_tiler_dsk[:2],
)
return tiled_mma_S, tiled_mma_dP, tiled_mma_dK, tiled_mma_dV, tiled_mma_dQ
def _setup_smem_layout(self):
# S.T = K @ Q.T
sK_layout = sm100_utils_basic.make_smem_layout_a(
self.tiled_mma_S,
self.mma_tiler_kq,
self.k_dtype,
1,
)
self.sK_layout = cute.slice_(sK_layout, (None, None, None, 0))
self.sQ_layout = sm100_utils_basic.make_smem_layout_b(
self.tiled_mma_S,
self.mma_tiler_kq,
self.q_dtype,
self.Q_stage,
)
# dP.T = V @ dO.T
sV_layout = sm100_utils_basic.make_smem_layout_a(
self.tiled_mma_dP,
self.mma_tiler_vdo,
self.v_dtype,
1,
)
self.sV_layout = cute.slice_(sV_layout, (None, None, None, 0))
self.sdOt_layout = sm100_utils_basic.make_smem_layout_b(
self.tiled_mma_dP,
self.mma_tiler_vdo,
self.do_dtype,
self.dO_stage,
)
# dV += P.T @ dO
tP_layout = sm100_utils_basic.make_smem_layout_a(
self.tiled_mma_dV,
self.mma_tiler_pdo,
self.do_dtype,
1,
)
self.tP_layout = cute.slice_(tP_layout, (None, None, None, 0))
self.sdO_layout = sm100_utils_basic.make_smem_layout_b(
self.tiled_mma_dV,
self.mma_tiler_pdo,
self.do_dtype,
self.dO_stage,
)
# dK += dS.T @ Q
sdSt_layout = sm100_utils_basic.make_smem_layout_a(
self.tiled_mma_dK,
self.mma_tiler_dsq,
self.ds_dtype,
1,
)
self.sdSt_layout = cute.slice_(sdSt_layout, (None, None, None, 0))
tdS_layout = sm100_utils_basic.make_smem_layout_a(
self.tiled_mma_dK,
self.mma_tiler_dsq,
self.ds_dtype,
1,
)
self.tdS_layout = cute.slice_(tdS_layout, (None, None, None, 0))
self.sQt_layout = sm100_utils_basic.make_smem_layout_b(
self.tiled_mma_dK,
self.mma_tiler_dsq,
self.q_dtype,
self.Q_stage,
)
# dQ = dS @ K
sdS_layout = sm100_utils_basic.make_smem_layout_a(
self.tiled_mma_dQ,
self.mma_tiler_dsk,
self.ds_dtype,
1,
)
self.sdS_layout = cute.slice_(sdS_layout, (None, None, None, 0))
sKt_layout = sm100_utils_basic.make_smem_layout_b(
self.tiled_mma_dQ,
self.mma_tiler_dsk,
self.k_dtype,
1,
)
self.sKt_layout = cute.slice_(sKt_layout, (None, None, None, 0))
self.sdS_xchg_layout = cute.make_layout(shape=(self.tile_n, self.tile_m // 2))
self.sdQaccum_layout = cute.make_layout(
(self.tile_m * self.dQ_reduce_ncol, self.sdQaccum_stage)
)
self.sLSE_layout = cute.make_layout(
shape=(self.tile_m, self.Q_stage), stride=(1, cute.round_up(self.tile_m, 64))
)
self.sdPsum_layout = cute.make_layout(
shape=(self.tile_m, self.dO_stage),
stride=(1, cute.round_up(self.tile_m, 64)),
)
self.sdK_epi_tile = (
self.tile_n,
math.gcd(128 // (self.dk_dtype.width // 8), self.tile_hdim // 2), # 64 or 32
) # subtiles mma_tiler_dsq[:2] = mma_tiler_pdo[:2]
self.sdV_epi_tile = (
self.tile_n,
math.gcd(128 // (self.dk_dtype.width // 8), self.tile_hdimv // 2), # 64 or 32
) # subtiles mma_tiler_dsq[:2] = mma_tiler_pdo[:2]
# headdim_64 gets 1 stage
self.num_epi_stages = max(1, (self.tile_hdim // 2) // self.sdK_epi_tile[1])
self.num_epi_stages_v = max(1, (self.tile_hdimv // 2) // self.sdV_epi_tile[1])
self.sdK_flat_epi_tile = self.tile_n * (self.tile_hdim // 2) // self.num_epi_stages
self.sdV_flat_epi_tile = self.tile_n * (self.tile_hdimv // 2) // self.num_epi_stages_v
if const_expr(not self.dKV_postprocess):
self.sdK_layout = sm100_utils_basic.make_smem_layout_epi(
self.dk_dtype,
LayoutEnum.ROW_MAJOR,
self.sdK_epi_tile,
2, # num compute wgs
)
self.sdV_layout = sm100_utils_basic.make_smem_layout_epi(
self.dv_dtype,
LayoutEnum.ROW_MAJOR,
self.sdV_epi_tile,
2, # num compute wgs
)
else:
self.sdK_layout = cute.make_layout((self.tile_n * self.dK_reduce_ncol, 2))
# self.dK_reduce_ncol same for dV
self.sdV_layout = cute.make_layout((self.tile_n * self.dK_reduce_ncol, 2))
@cute.jit
def __call__(
self,
mQ: cute.Tensor,
mK: cute.Tensor,
mV: cute.Tensor,
mdO: cute.Tensor,
mLSE: cute.Tensor,
mdPsum: cute.Tensor,
mdQaccum: cute.Tensor,
mdK: cute.Tensor,
mdV: cute.Tensor,
softmax_scale: Float32,
mCuSeqlensQ: Optional[cute.Tensor] = None,
mCuSeqlensK: Optional[cute.Tensor] = None,
mSeqUsedQ: Optional[cute.Tensor] = None,
mSeqUsedK: Optional[cute.Tensor] = None,
window_size_left: Int32 | int | None = None,
window_size_right: Int32 | int | None = None,
mdQ_semaphore: Optional[cute.Tensor] = None,
mdK_semaphore: Optional[cute.Tensor] = None,
mdV_semaphore: Optional[cute.Tensor] = None,
aux_data: AuxData = AuxData(),
# Block-sparse tensors (Q direction - for iterating m_blocks per n_block):
blocksparse_tensors: Optional[BlockSparseTensors] = None,
mCuTotalMBlocks: Optional[cute.Tensor] = None,
# Always keep stream as the last parameter (EnvStream: obtained implicitly via TVM FFI).
stream: cuda.CUstream = None,
):
self.q_dtype = mQ.element_type
self.k_dtype = mK.element_type
self.v_dtype = mV.element_type
self.do_dtype = mdO.element_type
self.lse_dtype = mLSE.element_type
self.dpsum_dtype = mdPsum.element_type
self.dqaccum_dtype = mdQaccum.element_type
self.dk_dtype = mdK.element_type
self.dv_dtype = mdV.element_type
self.ds_dtype = self.q_dtype
self.is_varlen_k = mCuSeqlensK is not None or mSeqUsedK is not None
self.is_varlen_q = mCuSeqlensQ is not None or mSeqUsedQ is not None
self.use_tma_store = not (self.qhead_per_kvhead == 1 and mCuSeqlensK is not None)
# self.use_tma_store = not self.qhead_per_kvhead == 1
self.dKV_postprocess = self.qhead_per_kvhead > 1
if const_expr(self.dKV_postprocess):
assert self.dk_dtype.width == 32, "Must accumulate dK in float precision for GQA"
assert self.dv_dtype.width == 32, "Must accumulate dV in float precision for GQA"
mdQaccum, mdK, mdV, mLSE, mdPsum = [
assume_tensor_aligned(t) for t in (mdQaccum, mdK, mdV, mLSE, mdPsum)
]
# (b, s, n, h) --> (s, h, n, b) or (t, n, h) -> (t, h, n)
QO_layout_transpose = [1, 3, 2, 0] if const_expr(mCuSeqlensQ is None) else [0, 2, 1]
mQ, mdO = [layout_utils.select(t, mode=QO_layout_transpose) for t in (mQ, mdO)]
KV_layout_transpose = [1, 3, 2, 0] if const_expr(mCuSeqlensK is None) else [0, 2, 1]
mK, mV = [layout_utils.select(t, mode=KV_layout_transpose) for t in (mK, mV)]
# (b, n, s) --> (s, n, b) or (n, t) --> (t, n)
LSE_dPsum_dQaccum_transpose = [2, 1, 0] if const_expr(mCuSeqlensQ is None) else [1, 0]
mLSE, mdPsum, mdQaccum = [
layout_utils.select(t, mode=LSE_dPsum_dQaccum_transpose)
for t in (mLSE, mdPsum, mdQaccum)
]
if const_expr(not self.dKV_postprocess):
layout_dKV_transpose = KV_layout_transpose
else:
layout_dKV_transpose = [2, 1, 0] if const_expr(mCuSeqlensK is None) else [1, 0]
mdK, mdV = [layout_utils.select(t, mode=layout_dKV_transpose) for t in (mdK, mdV)]
# (s, h, n, b) --> (h, s, n, b) or (t, h, n) -> (h, t, b)
dO_transpose = [1, 0, 2, 3] if const_expr(mCuSeqlensQ is None) else [1, 0, 2]
mdO = layout_utils.select(mdO, mode=dO_transpose)
# Transposes for 2-CTA K/Q paths (Q follows Q seqlens, K follows K seqlens)
transpose_sh_q = dO_transpose
transpose_sh_k = [1, 0, 2, 3] if const_expr(mCuSeqlensK is None) else [1, 0, 2]
# (b, n, block, stage) -> (block, stage, n, b)
semaphore_transpose = [2, 3, 1, 0]
if const_expr(self.deterministic):
assert mdQ_semaphore is not None
mdQ_semaphore = layout_utils.select(mdQ_semaphore, mode=semaphore_transpose)
if const_expr(self.deterministic and self.qhead_per_kvhead > 1):
assert mdK_semaphore is not None
assert mdV_semaphore is not None
mdK_semaphore, mdV_semaphore = [
layout_utils.select(t, mode=semaphore_transpose)
for t in (mdK_semaphore, mdV_semaphore)
]
else:
mdK_semaphore = None
mdV_semaphore = None
self._setup_attributes()
(
self.tiled_mma_S,
self.tiled_mma_dP,
self.tiled_mma_dK,
self.tiled_mma_dV,
self.tiled_mma_dQ,
) = self._get_tiled_mma()
self._setup_smem_layout()
self.cluster_shape_mnk = (*self.cluster_shape_mn, 1)
self.cluster_layout_vmnk = cute.tiled_divide(
cute.make_layout(self.cluster_shape_mnk),
(self.tiled_mma_S.thr_id.shape,),
)
self.num_mcast_ctas_b = cute.size(self.cluster_layout_vmnk.shape[1])
self.is_q_do_mcast = self.num_mcast_ctas_b > 1
if const_expr(not self.dKV_postprocess):
self.mdK_layout_enum = LayoutEnum.from_tensor(mdK)
self.mdV_layout_enum = LayoutEnum.from_tensor(mdV)
dK_major_mode = self.mdK_layout_enum.mma_major_mode()
dV_major_mode = self.mdV_layout_enum.mma_major_mode()
if const_expr(dK_major_mode != tcgen05.OperandMajorMode.K):
raise RuntimeError("The layout of mdK is wrong")
if const_expr(dV_major_mode != tcgen05.OperandMajorMode.K):
raise RuntimeError("The layout of mdV is wrong")
if const_expr(self.use_tma_store and not self.dKV_postprocess):
tma_copy_op_dKV = cpasync.CopyBulkTensorTileS2GOp()
tma_atom_dK, mdK_tma_tensor = cpasync.make_tiled_tma_atom(
tma_copy_op_dKV,
mdK,
cute.select(self.sdK_layout, mode=[0, 1]),
self.sdK_epi_tile,
1, # no mcast
)
tma_atom_dV, mdV_tma_tensor = cpasync.make_tiled_tma_atom(
tma_copy_op_dKV,
mdV,
cute.select(self.sdV_layout, mode=[0, 1]),
self.sdV_epi_tile,
1, # no mcast
)
else:
mdV_tma_tensor = mdV
mdK_tma_tensor = mdK
tma_atom_dV = None
tma_atom_dK = None
if const_expr(not self.dKV_postprocess):
thr_layout_r2s_dKV = cute.make_ordered_layout((128, 1), order=(1, 0)) # 128 threads
val_layout_r2s_dKV = cute.make_ordered_layout(
(1, 128 // self.dk_dtype.width), order=(1, 0)
) # 4 or 8 vals for 16 byte store
copy_atom_r2s_dKV = cute.make_copy_atom(
cute.nvgpu.CopyUniversalOp(),
self.dk_dtype,
num_bits_per_copy=128,
)
tiled_copy_r2s_dKV = cute.make_tiled_copy_tv(
copy_atom_r2s_dKV, thr_layout_r2s_dKV, val_layout_r2s_dKV
)
else:
tiled_copy_r2s_dKV = copy_utils.tiled_copy_1d(
Float32, 128, num_copy_elems=128 // Float32.width
)
tma_load_op = cpasync.CopyBulkTensorTileG2SOp(self.cta_group)
# S.T = K @ Q.T
tma_atom_K, tma_tensor_K = cute.nvgpu.make_tiled_tma_atom_A(
tma_load_op,
mK,
cute.select(self.sK_layout, mode=[0, 1, 2]),
self.mma_tiler_kq,
self.tiled_mma_S,
self.cluster_layout_vmnk.shape,
)
Q_tma_op = sm100_utils_basic.cluster_shape_to_tma_atom_B(
self.cluster_shape_mnk, self.tiled_mma_S.thr_id
)
tma_atom_Q, tma_tensor_Q = cute.nvgpu.make_tiled_tma_atom_B(
Q_tma_op,
mQ,
cute.select(self.sQ_layout, mode=[0, 1, 2]),
self.mma_tiler_kq,
self.tiled_mma_S,
self.cluster_layout_vmnk.shape,
)
# dP.T = V @ dO.T
tma_atom_V, tma_tensor_V = cute.nvgpu.make_tiled_tma_atom_A(
tma_load_op,
mV,
cute.select(self.sV_layout, mode=[0, 1, 2]),
self.mma_tiler_vdo,
self.tiled_mma_dP,
self.cluster_layout_vmnk.shape,
)
# dV = P.T @ dO
dO_tma_op = sm100_utils_basic.cluster_shape_to_tma_atom_B(
self.cluster_shape_mnk, self.tiled_mma_dV.thr_id
)
tma_atom_dO, tma_tensor_dO = cute.nvgpu.make_tiled_tma_atom_B(
dO_tma_op,
mdO,
cute.select(self.sdO_layout, mode=[0, 1, 2]),
self.mma_tiler_pdo,
self.tiled_mma_dV,
self.cluster_layout_vmnk.shape,
)
# ------------------------------------------------------------
# 2-CTA
# ------------------------------------------------------------
tma_atom_dOt = tma_tensor_dOt = None
if const_expr(self.use_2cta_instrs):
tma_atom_dOt, tma_tensor_dOt = cute.nvgpu.make_tiled_tma_atom_B(
dO_tma_op,
layout_utils.select(mdO, mode=transpose_sh_q),
cute.select(self.sdOt_layout, mode=[0, 1, 2]),
self.mma_tiler_vdo,
self.tiled_mma_dP,
self.cluster_layout_vmnk.shape,
)
tma_atom_Qt = tma_tensor_Qt = None
if const_expr(self.use_2cta_instrs):
tma_atom_Qt, tma_tensor_Qt = cute.nvgpu.make_tiled_tma_atom_B(
Q_tma_op,
layout_utils.select(mQ, mode=transpose_sh_q),
cute.select(self.sQt_layout, mode=[0, 1, 2]),
self.mma_tiler_dsq,
self.tiled_mma_dK,
self.cluster_layout_vmnk.shape,
)
tma_atom_Kt = tma_tensor_Kt = None
if const_expr(self.use_2cta_instrs):
Kt_tma_op = sm100_utils_basic.cluster_shape_to_tma_atom_B(
self.cluster_shape_mnk, self.tiled_mma_dQ.thr_id
)
tma_atom_Kt, tma_tensor_Kt = cute.nvgpu.make_tiled_tma_atom_B(
Kt_tma_op,
layout_utils.select(mK, mode=transpose_sh_k),
cute.select(self.sKt_layout, mode=[0, 1, 2]),
self.mma_tiler_dsk,
self.tiled_mma_dQ,
self.cluster_layout_vmnk.shape,
)
self.tma_copy_bytes = {
name: self.cta_group_size
* cute.size_in_bytes(mX.element_type, cute.select(layout, mode=[0, 1, 2]))
for name, mX, layout in [
("Q", mQ, self.sQ_layout),
("K", mK, self.sK_layout),
("V", mV, self.sV_layout),
("dO", mdO, self.sdO_layout),
]
}
self.tma_copy_bytes["LSE"] = self.tile_m * Float32.width // 8
self.tma_copy_bytes["dPsum"] = self.tile_m * Float32.width // 8
self.tma_copy_bytes["dQ"] = self.tile_m * self.dQ_reduce_ncol * Float32.width // 8
self.tma_copy_bytes["dKacc"] = self.tile_n * self.dK_reduce_ncol * Float32.width // 8
self.tma_copy_bytes["dS"] = cute.size_in_bytes(self.ds_dtype, self.sdS_layout)
self.tma_copy_bytes["sdS_xchg"] = self.tma_copy_bytes["dS"] // 2 # Half of dS for exchange
# TileScheduler = SingleTileScheduler
if const_expr(self.is_varlen_k):
TileScheduler = SingleTileVarlenScheduler
elif const_expr(self.deterministic):
TileScheduler = SingleTileLPTBwdScheduler
else:
TileScheduler = SingleTileScheduler
if const_expr(self.spt_override is None):
self.spt = (self.is_causal or self.is_local) and self.deterministic
else:
assert self.spt_override is not None
self.spt = self.spt_override and self.deterministic
tile_sched_args = TileSchedulerArguments(
cute.ceil_div(cute.size(mK.shape[0]), self.cta_tiler[0]), # num_blocks
cute.size(mQ.shape[2]), # num_heads = num_query_heads
cute.size(mK.shape[3])
if const_expr(mCuSeqlensK is None)
else cute.size(mCuSeqlensK.shape[0] - 1), # num_batches
1, # num_splits
cute.size(mQ.shape[0]), # pass seqlen_q or total_q for seqlen_k
mQ.shape[1], # headdim
mV.shape[1], # headdim_v
total_q=cute.size(mK.shape[0]) # pass total_k for total_q
if const_expr(mCuSeqlensK is not None)
else cute.size(mK.shape[0]) * cute.size(mK.shape[3]),
tile_shape_mn=self.cta_tiler[:2], # (tile_n, tile_m)
cluster_shape_mn=self.cluster_shape_mnk[:2],
mCuSeqlensQ=mCuSeqlensK,
mSeqUsedQ=mSeqUsedK,
qhead_per_kvhead_packgqa=1, # pack_gqa disabled for bwd
element_size=self.k_dtype.width // 8,
is_persistent=self.is_persistent, # persistent mode not tested
cu_total_m_blocks_ptr=mCuTotalMBlocks,
lpt=self.spt,
head_swizzle=self.deterministic,
)
tile_sched_params = TileScheduler.to_underlying_arguments(tile_sched_args)
self.tile_scheduler_cls = TileScheduler
grid_dim = TileScheduler.get_grid_shape(tile_sched_params)
# Compute allocation sizes for shared buffers that are reused
# sQ is reused for sdK, sdO is reused for sdV
sQ_alloc_bytes = max(
cute.size_in_bytes(self.q_dtype, self.sQ_layout),
cute.size_in_bytes(self.dk_dtype, self.sdK_layout),
)
sdO_alloc_bytes = max(
cute.size_in_bytes(self.dv_dtype, self.sdV_layout),
cute.size_in_bytes(self.do_dtype, self.sdO_layout),
)
sdK_bytes = cute.size_in_bytes(self.dk_dtype, self.sdK_layout)
sdV_bytes = cute.size_in_bytes(self.dv_dtype, self.sdV_layout)
assert sdV_bytes <= sdO_alloc_bytes, "sdV doesn't fit in sdO storage allocation"
assert sdK_bytes <= sQ_alloc_bytes, "sdK doesn't fit in sQ storage allocation"
# 2-CTA: sdV reuses sV, sdK reuses sK
sV_bytes = cute.size_in_bytes(self.v_dtype, self.sV_layout)
sK_bytes = cute.size_in_bytes(self.k_dtype, self.sK_layout)
if const_expr(self.use_2cta_instrs):
assert sdV_bytes <= sV_bytes, "sdV doesn't fit in sV storage allocation (2-CTA)"
assert sdK_bytes <= sK_bytes, "sdK doesn't fit in sK storage allocation (2-CTA)"
if const_expr(self.use_2cta_instrs):
sQt_size = cute.cosize(self.sQt_layout) if const_expr(self.tile_hdim <= 128) else 0
sdOt_size = cute.cosize(self.sdOt_layout) if const_expr(self.tile_hdim <= 128) else 0
sdS_xchg_size = (
cute.cosize(self.sdS_xchg_layout) if const_expr(self.tile_hdim <= 128) else 0
)
@cute.struct
class SharedStorage:
Q_mbar_ptr: cute.struct.MemRange[cutlass.Int64, 2 * self.Q_stage]
dO_mbar_ptr: cute.struct.MemRange[cutlass.Int64, 2 * self.dO_stage]
LSE_mbar_ptr: cute.struct.MemRange[cutlass.Int64, 2 * self.Q_stage]
dPsum_mbar_ptr: cute.struct.MemRange[cutlass.Int64, 2 * self.dO_stage]
S_mbar_ptr: cute.struct.MemRange[cutlass.Int64, 2 * self.single_stage]
dP_mbar_ptr: cute.struct.MemRange[cutlass.Int64, 2 * self.single_stage]
dS_mbar_ptr: cute.struct.MemRange[cutlass.Int64, 2 * self.single_stage]
dKV_mbar_ptr: cute.struct.MemRange[cutlass.Int64, 2 * self.sdKVaccum_stage]
dQ_mbar_ptr: cute.struct.MemRange[cutlass.Int64, 2]
dQ_cluster_full_mbar_ptr: cute.struct.MemRange[
cutlass.Int64, self.dQaccum_reduce_stage // 2
]
dQ_cluster_empty_mbar_ptr: cute.struct.MemRange[
cutlass.Int64, self.dQaccum_reduce_stage // 2
]
tmem_holding_buf: Int32
tmem_dealloc_mbar: cutlass.Int64
# 2-CTA
Qt_mbar_ptr: cute.struct.MemRange[cutlass.Int64, 2 * self.Q_stage]
Kt_mbar_ptr: cute.struct.MemRange[cutlass.Int64, 2 * self.single_stage]
dS_cluster_empty_mbar_ptr: cutlass.Int64
dS_cluster_full_mbar_ptr: cutlass.Int64
dS_cluster_leader_mbar_ptr: cutlass.Int64
dQaccum_empty_mbar_ptr: cutlass.Int64
sQ: cute.struct.Align[
cute.struct.MemRange[self.q_dtype, cute.cosize(self.sQ_layout)],
self.buffer_align_bytes,
]
sK: cute.struct.Align[
cute.struct.MemRange[self.k_dtype, cute.cosize(self.sK_layout)],
self.buffer_align_bytes,
]
sV: cute.struct.Align[
cute.struct.MemRange[self.v_dtype, cute.cosize(self.sV_layout)],
self.buffer_align_bytes,
]
sdO: cute.struct.Align[
cute.struct.MemRange[self.do_dtype, cute.cosize(self.sdO_layout)],
self.buffer_align_bytes,
]
sQt: cute.struct.Align[
cute.struct.MemRange[self.q_dtype, sQt_size],
self.buffer_align_bytes,
]
sdOt: cute.struct.Align[
cute.struct.MemRange[self.do_dtype, sdOt_size],
self.buffer_align_bytes,
]
sdS_xchg: cute.struct.Align[
cute.struct.MemRange[self.ds_dtype, sdS_xchg_size],
self.buffer_align_bytes,
]
sKt: cute.struct.Align[
cute.struct.MemRange[self.k_dtype, cute.cosize(self.sKt_layout)],
self.buffer_align_bytes,
]
sdS: cute.struct.Align[
cute.struct.MemRange[self.ds_dtype, cute.cosize(self.sdSt_layout)],
self.buffer_align_bytes,
]
sLSE: cute.struct.Align[
cute.struct.MemRange[self.lse_dtype, cute.cosize(self.sLSE_layout)],
128,
]
sdPsum: cute.struct.Align[
cute.struct.MemRange[self.dpsum_dtype, cute.cosize(self.sdPsum_layout)],
128,
]
sdQaccum: cute.struct.Align[
cute.struct.MemRange[self.dqaccum_dtype, cute.cosize(self.sdQaccum_layout)],
self.buffer_align_bytes if sdS_xchg_size == 0 else 128,
]
else:
@cute.struct
class SharedStorage:
Q_mbar_ptr: cute.struct.MemRange[cutlass.Int64, 2 * self.Q_stage]
dO_mbar_ptr: cute.struct.MemRange[cutlass.Int64, 2 * self.dO_stage]
LSE_mbar_ptr: cute.struct.MemRange[cutlass.Int64, 2 * self.Q_stage]
dPsum_mbar_ptr: cute.struct.MemRange[cutlass.Int64, 2 * self.dO_stage]
S_mbar_ptr: cute.struct.MemRange[cutlass.Int64, 2 * self.single_stage]
dP_mbar_ptr: cute.struct.MemRange[cutlass.Int64, 2 * self.single_stage]
dS_mbar_ptr: cute.struct.MemRange[cutlass.Int64, 2 * self.single_stage]
dKV_mbar_ptr: cute.struct.MemRange[cutlass.Int64, 2 * self.sdKVaccum_stage]
dQ_mbar_ptr: cute.struct.MemRange[cutlass.Int64, 2]
dQ_cluster_full_mbar_ptr: cute.struct.MemRange[
cutlass.Int64, self.dQaccum_reduce_stage // 2
]
dQ_cluster_empty_mbar_ptr: cute.struct.MemRange[
cutlass.Int64, self.dQaccum_reduce_stage // 2
]
tmem_holding_buf: Int32
tmem_dealloc_mbar: Int64
sQ: cute.struct.Align[
cute.struct.MemRange[cute.Uint8, sQ_alloc_bytes],
self.buffer_align_bytes,
]
sK: cute.struct.Align[
cute.struct.MemRange[self.k_dtype, cute.cosize(self.sK_layout)],
self.buffer_align_bytes,
]
sV: cute.struct.Align[
cute.struct.MemRange[self.v_dtype, cute.cosize(self.sV_layout)],
self.buffer_align_bytes,
]
sdO: cute.struct.Align[
cute.struct.MemRange[cute.Uint8, sdO_alloc_bytes],
self.buffer_align_bytes,
]
sdS: cute.struct.Align[
cute.struct.MemRange[self.ds_dtype, cute.cosize(self.sdSt_layout)],
128,
]
sLSE: cute.struct.Align[
cute.struct.MemRange[self.lse_dtype, cute.cosize(self.sLSE_layout)],
128,
]
sdPsum: cute.struct.Align[
cute.struct.MemRange[self.dpsum_dtype, cute.cosize(self.sdPsum_layout)],
128,
]
sdQaccum: cute.struct.Align[
cute.struct.MemRange[self.dqaccum_dtype, cute.cosize(self.sdQaccum_layout)],
self.buffer_align_bytes,
]
self.shared_storage = SharedStorage
LOG2_E = math.log2(math.e)
if const_expr(self.score_mod is None):
# Without score_mod: bake scale into log2
softmax_scale_log2 = softmax_scale * LOG2_E
else:
# With score_mod: score_mod applied to S * softmax_scale, then use LOG2_E only
softmax_scale_log2 = LOG2_E
if const_expr(window_size_left is not None):
window_size_left = Int32(window_size_left)
if const_expr(window_size_right is not None):
window_size_right = Int32(window_size_right)
fastdiv_mods = None
if const_expr(aux_data.tensors is not None):
seqlen_q = cute.size(mQ.shape[0]) // (
self.qhead_per_kvhead if const_expr(self.pack_gqa) else 1
)
seqlen_k = cute.size(mK.shape[0])
seqlen_q_divmod = FastDivmodDivisor(seqlen_q)
seqlen_k_divmod = FastDivmodDivisor(seqlen_k)
fastdiv_mods = (seqlen_q_divmod, seqlen_k_divmod)
self.use_block_sparsity = cutlass.const_expr(blocksparse_tensors is not None)
if const_expr(self.use_2cta_instrs):
assert blocksparse_tensors is None, (
"2-CTA mode does not support block sparsity. "
"Please create kernel with use_2cta_instrs=False for block sparse attention."
)
# 2-CTA: 231424 and 1-CTA: 232448
# print("SMEM: ", self.shared_storage.size_in_bytes())
if const_expr(self.use_block_sparsity or aux_data.tensors is not None):
assert all(x is None for x in (mCuSeqlensQ, mCuSeqlensK, mSeqUsedQ, mSeqUsedK)), (
"Variable sequence length is not supported yet for blocksparse or aux tensors in bwd"
)
self.kernel(
tma_tensor_Q,
tma_tensor_Qt,
tma_tensor_K,
tma_tensor_Kt,
tma_tensor_V,
mLSE,
mdPsum,
tma_tensor_dO,
tma_tensor_dOt,
mdV,
mdK,
mdQaccum,
mdV_tma_tensor,
mdK_tma_tensor,
mdQ_semaphore,
mdK_semaphore,
mdV_semaphore,
mCuSeqlensQ,
mCuSeqlensK,
mSeqUsedQ,
mSeqUsedK,
tma_atom_Q,
tma_atom_Qt,
tma_atom_K,
tma_atom_Kt,
tma_atom_V,
tma_atom_dO,
tma_atom_dOt,
tma_atom_dV,
tma_atom_dK,
self.sQ_layout,
self.sQt_layout,
self.sK_layout,
self.sKt_layout,
self.sV_layout,
self.sLSE_layout,
self.sdPsum_layout,
self.sdO_layout,
self.sdOt_layout,
self.sdSt_layout,
self.sdS_layout,
self.sdS_xchg_layout,
self.sdQaccum_layout,
self.sdK_layout,
self.sdV_layout,
self.tP_layout,
self.tdS_layout,
self.tiled_mma_S,
self.tiled_mma_dP,
self.tiled_mma_dV,
self.tiled_mma_dK,
self.tiled_mma_dQ,
tiled_copy_r2s_dKV,
softmax_scale,
softmax_scale_log2,
window_size_left,
window_size_right,
tile_sched_params,
aux_data,