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mainboard/novacustom/nuc_box/: add
This is a copy of the System76 Meer9 code, which is an initial port of the ASROCK NUC BOX hardware. This platform is also based on that hardware. Signed-off-by: Filip Lewiński <[email protected]>
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configs/config.novacustom_nuc_box

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CONFIG_CCACHE=y
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CONFIG_VENDOR_NOVACUSTOM=y
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CONFIG_CBFS_SIZE=0x800000
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# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
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CONFIG_CONSOLE_SPI_FLASH=y
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CONFIG_CONSOLE_SPI_FLASH_BUFFER_SIZE=0x40000
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CONFIG_OPTION_BACKEND_NONE=y
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CONFIG_MAINBOARD_VENDOR="NovaCustom"
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CONFIG_BOARD_NOVACUSTOM_NUC_BOX=y
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CONFIG_FMDFILE=""
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# CONFIG_CONSOLE_SERIAL is not set
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# CONFIG_POST_IO is not set
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CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x40000
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CONFIG_PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS=36
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CONFIG_PCIEXP_HOTPLUG_BUSES=42
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CONFIG_PCIEXP_HOTPLUG_MEM=0xc200000
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CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x1c000000
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CONFIG_DRIVERS_UART_8250IO=y
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CONFIG_COREBOOT_ROMSIZE_KB_32768=y
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CONFIG_INTEL_KEYLOCKER=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE=y
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CONFIG_X2APIC_LATE_WORKAROUND=y
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CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y
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CONFIG_CPU_UCODE_BINARIES="microcode.rom"
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CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
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CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS=y
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CONFIG_SMMSTORE=y
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CONFIG_SMMSTORE_V2=y
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CONFIG_TPM_PPI=y
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CONFIG_VBT_CBFS_COMPRESSION_LZ4=y
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CONFIG_ADD_FSP_BINARIES=y
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CONFIG_FSP_FULL_FD=y
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CONFIG_FSP_HEADER_PATH="3rdparty/dasharo-blobs/novacustom/v5x0tu/MeteorLakeFspBinPkg/Include/"
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CONFIG_FSP_FD_PATH="3rdparty/dasharo-blobs/novacustom/v5x0tu/MeteorLakeFspBinPkg/Fsp.fd"
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CONFIG_DRIVERS_EFI_VARIABLE_STORE=y
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CONFIG_PAYLOAD_EDK2=y
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CONFIG_NO_GFX_INIT=y
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CONFIG_EDK2_REPOSITORY="https://github.com/Dasharo/edk2"
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CONFIG_EDK2_TAG_OR_REV="c3fc85d27c65a6cd728aa839679d88207fe703dd"
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CONFIG_EDK2_GOP_DRIVER=y
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CONFIG_EDK2_GOP_FILE="3rdparty/dasharo-blobs/novacustom/v5x0tu/IntelGopDriver.efi"
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## SPDX-License-Identifier: GPL-2.0-only
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config BOARD_NOVACUSTOM_NUC_BOX_COMMON
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def_bool n
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select BOARD_ROMSIZE_KB_32768
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select CRB_TPM
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select DRIVERS_GENERIC_CBFS_SERIAL
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select DRIVERS_GENERIC_CBFS_UUID
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select DRIVERS_UART_8250IO
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select HAVE_ACPI_RESUME
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select HAVE_ACPI_TABLES
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select HAVE_CMOS_DEFAULT
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select HAVE_INTEL_PTT
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select HAVE_OPTION_TABLE
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select INTEL_GMA_HAVE_VBT
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select MAINBOARD_HAS_TPM2
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select NO_UART_ON_SUPERIO
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select PCIEXP_SUPPORT_RESIZABLE_BARS
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select SOC_INTEL_COMMON_BLOCK_HDA_VERB
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select SOC_INTEL_CRASHLOG
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select SOC_INTEL_METEORLAKE
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select SPD_READ_BY_WORD
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config BOARD_NOVACUSTOM_NUC_BOX
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select BOARD_NOVACUSTOM_NUC_BOX_COMMON
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select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES
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select SOC_INTEL_METEORLAKE_U_H
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if BOARD_NOVACUSTOM_NUC_BOX_COMMON
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config MAINBOARD_DIR
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default "novacustom/nuc_box"
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config VARIANT_DIR
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default "nuc_box" if BOARD_NOVACUSTOM_NUC_BOX
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config OVERRIDE_DEVICETREE
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default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
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config MAINBOARD_PART_NUMBER
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default "NUC BOX" if BOARD_NOVACUSTOM_NUC_BOX
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config MAINBOARD_SMBIOS_PRODUCT_NAME
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default "NUC_BOX" if BOARD_NOVACUSTOM_NUC_BOX
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config MAINBOARD_VERSION
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default "nuc_box" if BOARD_NOVACUSTOM_NUC_BOX
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config CMOS_DEFAULT_FILE
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default "src/mainboard/\$(MAINBOARDDIR)/cmos.default"
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config CONSOLE_POST
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default y
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config D3COLD_SUPPORT
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default n
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config DIMM_SPD_SIZE
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default 1024
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config FMDFILE
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default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/variants/\$(CONFIG_VARIANT_DIR)/board.fmd"
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config ONBOARD_VGA_IS_PRIMARY
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default y
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config PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS
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default 36
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config POST_DEVICE
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default n
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config TPM_MEASURED_BOOT
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default y
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config UART_FOR_CONSOLE
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default 0
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# PM Timer Disabled, saves power
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config USE_PM_ACPI_TIMER
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default n
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endif
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## SPDX-License-Identifier: GPL-2.0-only
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config BOARD_NOVACUSTOM_NUC_BOX
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bool "nuc_box"
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## SPDX-License-Identifier: GPL-2.0-only
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CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include
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bootblock-y += bootblock.c
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bootblock-y += variants/$(VARIANT_DIR)/gpio_early.c
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romstage-y += variants/$(VARIANT_DIR)/romstage.c
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ramstage-y += ramstage.c
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ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c
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ramstage-y += variants/$(VARIANT_DIR)/gpio.c
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ramstage-y += variants/$(VARIANT_DIR)/ramstage.c
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/* SPDX-License-Identifier: GPL-2.0-only */
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Scope (\_SB) {
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#include "sio.asl"
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#include "sleep.asl"
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}
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/* SPDX-License-Identifier: GPL-2.0-only */
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Device (SIO) {
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Name (_ADR, 0x2E)
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OperationRegion (SIOA, SystemIO, 0x2E, 0x02)
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Field (SIOA, ByteAcc, NoLock, Preserve)
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{
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SI2E, 8,
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SI2F, 8,
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}
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IndexField (SI2E, SI2F, ByteAcc, NoLock, Preserve)
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{
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Offset (0x07),
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SLDN, 8, /* Logical Device Number */
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Offset(0xE5),
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SRE5, 8, /* Register 0xE5 */
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}
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Method (ENTR, 0, Serialized) {
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// Enter config mode
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SI2E = 0x87
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SI2E = 0x87
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}
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Method (EXIT, 0, Serialized) {
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// Exit config mode
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SI2E = 0xAA
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}
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Method (PTS, 0, Serialized) {
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ENTR()
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// Turn on fading LED
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SLDN = 0x15
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SRE5 = 0x43
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EXIT()
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}
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Method (WAK, 0, Serialized) {
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ENTR()
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// Turn off fading LED
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SLDN = 0x15
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SRE5 = 0x42
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EXIT()
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}
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}
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* Method called from _PTS prior to enter sleep state */
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Method (MPTS, 1) {
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\_SB.SIO.PTS()
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}
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/* Method called from _WAK prior to wakeup */
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Method (MWAK, 1) {
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\_SB.SIO.WAK()
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}
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Vendor name: NovaCustom
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Category: desktop
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ROM package: WSON-8
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ROM protocol: SPI
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ROM socketed: y
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Flashrom support: y

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