Skip to content

Commit b1ecd05

Browse files
committed
mb/msi/ms7d25,7eo6: Fix USB 3.x port mapping
The USB-C port is Gen2x2 and occupies two USB3.x line pairs. The missing second pair caused all the ports to be shifted by one and port 10 not being enabled as USB3.x capable. As a result one of the JUSB3 ports was working in HighSpeed only. Also revise the USB OC mappings again and put correct OC pins to macros. Signed-off-by: Michał Żygowski <[email protected]>
1 parent de85fb2 commit b1ecd05

File tree

2 files changed

+48
-49
lines changed

2 files changed

+48
-49
lines changed

src/mainboard/msi/ms7d25/devicetree.cb

Lines changed: 24 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -57,33 +57,33 @@ chip soc/intel/alderlake
5757
"M2_1" "SlotDataBusWidth4X"
5858
end
5959
device ref xhci on
60-
register "usb2_ports[0]" = "USB2_PORT_SHORT(OC2)" # USB-C LAN_USB1
61-
register "usb2_ports[1]" = "USB2_PORT_SHORT(OC1)" # MSI MYSTIC LIGHT
62-
register "usb2_ports[2]" = "USB2_PORT_SHORT(OC0)" # USB-A LAN_USB1
63-
register "usb2_ports[3]" = "USB2_PORT_LONG(OC0)" # JUSB5
64-
register "usb2_ports[4]" = "USB2_PORT_SHORT(OC3)" # HUB to rear USB 2.0
65-
register "usb2_ports[5]" = "USB2_PORT_LONG(OC3)" # empty?
66-
register "usb2_ports[6]" = "USB2_PORT_LONG(OC7)" # JUSB4
67-
register "usb2_ports[7]" = "USB2_PORT_LONG(OC0)" # JUSB4
68-
register "usb2_ports[8]" = "USB2_PORT_LONG(OC2)" # JUSB3
69-
register "usb2_ports[9]" = "USB2_PORT_LONG(OC7)" # JUSB3
70-
register "usb2_ports[10]" = "USB2_PORT_SHORT(OC0)" # PS2_USB1
71-
register "usb2_ports[11]" = "USB2_PORT_SHORT(OC0)" # PS2_USB1
72-
register "usb2_ports[12]" = "USB2_PORT_SHORT(OC0)" # HUB to USB 2.0 headers
73-
register "usb2_ports[13]" = "USB2_PORT_SHORT(OC6)" # CNVi BT
60+
register "usb2_ports[0]" = "USB2_PORT_LONG(OC0)" # USB-C LAN_USB1
61+
register "usb2_ports[1]" = "USB2_PORT_MID(OC0)" # MSI MYSTIC LIGHT
62+
register "usb2_ports[2]" = "USB2_PORT_LONG(OC1)" # USB-A LAN_USB1
63+
register "usb2_ports[3]" = "USB2_PORT_LONG(OC1)" # JUSB5
64+
register "usb2_ports[4]" = "USB2_PORT_MID(OC2)" # HUB to rear USB 2.0
65+
register "usb2_ports[5]" = "USB2_PORT_EMPTY"
66+
register "usb2_ports[6]" = "USB2_PORT_LONG(OC3)" # JUSB4
67+
register "usb2_ports[7]" = "USB2_PORT_LONG(OC3)" # JUSB4
68+
register "usb2_ports[8]" = "USB2_PORT_LONG(OC4)" # JUSB3
69+
register "usb2_ports[9]" = "USB2_PORT_LONG(OC4)" # JUSB3
70+
register "usb2_ports[10]" = "USB2_PORT_LONG(OC5)" # PS2_USB1
71+
register "usb2_ports[11]" = "USB2_PORT_LONG(OC5)" # PS2_USB1
72+
register "usb2_ports[12]" = "USB2_PORT_MID(OC6)" # HUB to USB 2.0 headers
73+
register "usb2_ports[13]" = "USB2_PORT_LONG(OC6)" # CNVi BT
7474
register "usb2_ports[14]" = "USB2_PORT_EMPTY" # USB Redirection port 1
7575
register "usb2_ports[15]" = "USB2_PORT_EMPTY" # USB Redirection port 2
7676

77-
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC2)" # USB-C LAN_USB1
78-
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC2)" # USB-A LAN_USB1
79-
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC3)" # JUSB5
80-
register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC0)" # USB-A USB2
81-
register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC7)" # USB-A USB2
82-
register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC7)" # JUSB4
83-
register "usb3_ports[6]" = "USB3_PORT_DEFAULT(OC2)" # JUSB4
84-
register "usb3_ports[7]" = "USB3_PORT_DEFAULT(OC2)" # JUSB3
85-
register "usb3_ports[8]" = "USB3_PORT_DEFAULT(OC0)" # JUSB3
86-
register "usb3_ports[9]" = "USB3_PORT_EMPTY"
77+
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" # USB-C Gen2x2 LAN_USB1
78+
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC0)" # USB-C Gen2x2 LAN_USB1
79+
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC1)" # USB-A LAN_USB1
80+
register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC1)" # JUSB5
81+
register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC2)" # USB-A USB2
82+
register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC2)" # USB-A USB2
83+
register "usb3_ports[6]" = "USB3_PORT_DEFAULT(OC3)" # JUSB4
84+
register "usb3_ports[7]" = "USB3_PORT_DEFAULT(OC3)" # JUSB4
85+
register "usb3_ports[8]" = "USB3_PORT_DEFAULT(OC4)" # JUSB3
86+
register "usb3_ports[9]" = "USB3_PORT_DEFAULT(OC4)" # JUSB3
8787
end
8888
device ref cnvi_wifi on
8989
# Enable CNVi BT

src/mainboard/msi/ms7e06/devicetree.cb

Lines changed: 24 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -58,34 +58,33 @@ chip soc/intel/alderlake
5858
end
5959
device ref crashlog off end
6060
device ref xhci on
61-
# USB Configuration
62-
register "usb2_ports[0]" = "USB2_PORT_SHORT(OC2)" # USB-C LAN_USB1
63-
register "usb2_ports[1]" = "USB2_PORT_SHORT(OC1)" # MSI MYSTIC LIGHT
64-
register "usb2_ports[2]" = "USB2_PORT_SHORT(OC0)" # USB-A LAN_USB1
65-
register "usb2_ports[3]" = "USB2_PORT_LONG(OC0)" # JUSB5
66-
register "usb2_ports[4]" = "USB2_PORT_SHORT(OC3)" # HUB to rear USB 2.0
67-
register "usb2_ports[5]" = "USB2_PORT_LONG(OC3)" # empty?
68-
register "usb2_ports[6]" = "USB2_PORT_LONG(OC7)" # JUSB4
69-
register "usb2_ports[7]" = "USB2_PORT_LONG(OC0)" # JUSB4
70-
register "usb2_ports[8]" = "USB2_PORT_LONG(OC2)" # JUSB3
71-
register "usb2_ports[9]" = "USB2_PORT_LONG(OC7)" # JUSB3
72-
register "usb2_ports[10]" = "USB2_PORT_SHORT(OC0)" # PS2_USB1
73-
register "usb2_ports[11]" = "USB2_PORT_SHORT(OC0)" # PS2_USB1
74-
register "usb2_ports[12]" = "USB2_PORT_SHORT(OC0)" # HUB to USB 2.0 headers
75-
register "usb2_ports[13]" = "USB2_PORT_SHORT(OC6)" # CNVi BT
61+
register "usb2_ports[0]" = "USB2_PORT_LONG(OC0)" # USB-C LAN_USB1
62+
register "usb2_ports[1]" = "USB2_PORT_MID(OC0)" # MSI MYSTIC LIGHT
63+
register "usb2_ports[2]" = "USB2_PORT_LONG(OC1)" # USB-A LAN_USB1
64+
register "usb2_ports[3]" = "USB2_PORT_LONG(OC1)" # JUSB5
65+
register "usb2_ports[4]" = "USB2_PORT_MID(OC2)" # HUB to rear USB 2.0
66+
register "usb2_ports[5]" = "USB2_PORT_EMPTY"
67+
register "usb2_ports[6]" = "USB2_PORT_LONG(OC3)" # JUSB4
68+
register "usb2_ports[7]" = "USB2_PORT_LONG(OC3)" # JUSB4
69+
register "usb2_ports[8]" = "USB2_PORT_LONG(OC4)" # JUSB3
70+
register "usb2_ports[9]" = "USB2_PORT_LONG(OC4)" # JUSB3
71+
register "usb2_ports[10]" = "USB2_PORT_LONG(OC5)" # PS2_USB1
72+
register "usb2_ports[11]" = "USB2_PORT_LONG(OC5)" # PS2_USB1
73+
register "usb2_ports[12]" = "USB2_PORT_MID(OC6)" # HUB to USB 2.0 headers
74+
register "usb2_ports[13]" = "USB2_PORT_LONG(OC6)" # CNVi BT
7675
register "usb2_ports[14]" = "USB2_PORT_EMPTY" # USB Redirection port 1
7776
register "usb2_ports[15]" = "USB2_PORT_EMPTY" # USB Redirection port 2
7877

79-
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC2)" # USB-C LAN_USB1
80-
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC2)" # USB-A LAN_USB1
81-
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC3)" # JUSB5
82-
register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC0)" # USB-A USB2
83-
register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC7)" # USB-A USB2
84-
register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC7)" # JUSB4
85-
register "usb3_ports[6]" = "USB3_PORT_DEFAULT(OC2)" # JUSB4
86-
register "usb3_ports[7]" = "USB3_PORT_DEFAULT(OC2)" # JUSB3
87-
register "usb3_ports[8]" = "USB3_PORT_DEFAULT(OC0)" # JUSB3
88-
register "usb3_ports[9]" = "USB3_PORT_EMPTY"
78+
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" # USB-C Gen2x2 LAN_USB1
79+
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC0)" # USB-C Gen2x2 LAN_USB1
80+
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC1)" # USB-A LAN_USB1
81+
register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC1)" # JUSB5
82+
register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC2)" # USB-A USB2
83+
register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC2)" # USB-A USB2
84+
register "usb3_ports[6]" = "USB3_PORT_DEFAULT(OC3)" # JUSB4
85+
register "usb3_ports[7]" = "USB3_PORT_DEFAULT(OC3)" # JUSB4
86+
register "usb3_ports[8]" = "USB3_PORT_DEFAULT(OC4)" # JUSB3
87+
register "usb3_ports[9]" = "USB3_PORT_DEFAULT(OC4)" # JUSB3
8988
end
9089
device ref cnvi_wifi on
9190
# Enable CNVi BT

0 commit comments

Comments
 (0)