Skip to content

Commit fd8574b

Browse files
committed
Merge tag 'rtm1_0_81' into time_var_rtm_iss32
Update testlist_rtm
2 parents 82ea3a1 + 658cb73 commit fd8574b

File tree

1 file changed

+26
-8
lines changed

1 file changed

+26
-8
lines changed

cime_config/testdefs/testlist_rtm.xml

Lines changed: 26 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,25 @@
11
<?xml version="1.0"?>
22
<testlist version="2.0">
33

4-
<test name="ERS_Ld5" grid="f10_f10_mg37" compset="I2000Clm50BgcCropRtm" testmods="rtm/default">
4+
<test name="ERS_D_Ld5" grid="f10_f10_mg37" compset="I2000Clm45Sp" testmods="rtm/default">
5+
<machines>
6+
<machine name="derecho" compiler="intel" category="rtm"></machine>
7+
</machines>
8+
<options>
9+
<option name="wallclock">00:20:00</option>
10+
<option name="comment" >Restart test with DEBUG on</option>
11+
</options>
12+
</test>
13+
<test name="ERS_D_Ld5" grid="f10_f10_mg37" compset="I2000Clm50SpRtmFl" testmods="rtm/default">
14+
<machines>
15+
<machine name="derecho" compiler="intel" category="rtm"></machine>
16+
</machines>
17+
<options>
18+
<option name="wallclock">00:20:00</option>
19+
<option name="comment" >Restart test with DEBUG on</option>
20+
</options>
21+
</test>
22+
<test name="ERS_Ld5" grid="f09_f09_mg17" compset="I1850Clm60SpNoAnthro" testmods="rtm/default">
523
<machines>
624
<machine name="derecho" compiler="intel" category="rtm"></machine>
725
<machine name="derecho" compiler="gnu" category="rtm"></machine>
@@ -11,7 +29,7 @@
1129
<option name="comment" >Restart test without DEBUG on all machines/compilers (except nag because of a CTSM issue)</option>
1230
</options>
1331
</test>
14-
<test name="SMS_D_Ld5" grid="f10_f10_mg37" compset="I2000Clm50BgcCropRtm" testmods="rtm/default">
32+
<test name="SMS_D_Ld5" grid="f09_f09_mg17" compset="I1850Clm60SpNoAnthro" testmods="rtm/default">
1533
<machines>
1634
<machine name="derecho" compiler="intel" category="rtm"></machine>
1735
<machine name="derecho" compiler="gnu" category="rtm"></machine>
@@ -21,7 +39,7 @@
2139
<option name="comment" >Run with DEBUG compiler option all machine/compilers</option>
2240
</options>
2341
</test>
24-
<test name="SMS_Ld5" grid="f10_f10_mg37" compset="I2000Clm50BgcCropRtm" testmods="rtm/rtmColdStart">
42+
<test name="SMS_Ld5" grid="f09_f09_mg17" compset="I1850Clm60SpNoAnthro" testmods="rtm/rtmColdStart">
2543
<machines>
2644
<machine name="derecho" compiler="intel" category="rtm"></machine>
2745
<machine name="derecho" compiler="gnu" category="rtm"></machine>
@@ -31,7 +49,7 @@
3149
<option name="comment" >Run a Cold-Start with main machine all compilers</option>
3250
</options>
3351
</test>
34-
<test name="ERS_Ld5" grid="f10_f10_mg37" compset="I2000Clm50BgcCropRtm" testmods="rtm/rtmOnIceOff">
52+
<test name="ERS_Ld5" grid="f09_f09_mg17" compset="I1850Clm60SpNoAnthro" testmods="rtm/rtmOnIceOff">
3553
<machines>
3654
<machine name="derecho" compiler="intel" category="rtm">
3755
<options>
@@ -44,7 +62,7 @@
4462
<option name="comment" >Run with ice off</option>
4563
</options>
4664
</test>
47-
<test name="ERS_Ld5" grid="f10_f10_mg37" compset="I2000Clm50BgcCropRtm" testmods="rtm/rtmOnFloodOnEffvelOn">
65+
<test name="ERS_Ld5" grid="f09_f09_mg17" compset="I1850Clm60SpNoAnthro" testmods="rtm/rtmOnFloodOnEffvelOn">
4866
<machines>
4967
<machine name="derecho" compiler="intel" category="rtm">
5068
<options>
@@ -57,7 +75,7 @@
5775
<option name="comment" >Run with flooding on and effective velocity on</option>
5876
</options>
5977
</test>
60-
<test name="ERS_D_Ld5" grid="f10_f10_mg37" compset="I2000Clm50BgcCropRtm" testmods="rtm/rtmOnFloodOnEffvelOn">
78+
<test name="ERS_D_Ld5" grid="f09_f09_mg17" compset="I1850Clm60SpNoAnthro" testmods="rtm/rtmOnFloodOnEffvelOn">
6179
<machines>
6280
<machine name="derecho" compiler="intel" category="rtm">
6381
<options>
@@ -70,7 +88,7 @@
7088
<option name="comment" >Run with flooding on and effective velocity on, DEBUG on, all machines/compilers</option>
7189
</options>
7290
</test>
73-
<test name="ERS_Ld5" grid="f10_f10_mg37" compset="I2000Clm50BgcCropRtm" testmods="rtm/rtmOnFloodOnEffvelOff">
91+
<test name="ERS_Ld5" grid="f09_f09_mg17" compset="I1850Clm60SpNoAnthro" testmods="rtm/rtmOnFloodOnEffvelOff">
7492
<machines>
7593
<machine name="derecho" compiler="intel" category="rtm">
7694
<options>
@@ -83,7 +101,7 @@
83101
<option name="comment" >Run with flooding on and effective velocity off</option>
84102
</options>
85103
</test>
86-
<test name="ERS_Ld5" grid="f10_f10_mg37" compset="I2000Clm50BgcCropRtm" testmods="rtm/rtmOff">
104+
<test name="ERS_Ld5" grid="f09_f09_mg17" compset="I1850Clm60SpNoAnthro" testmods="rtm/rtmOff">
87105
<machines>
88106
<machine name="derecho" compiler="intel" category="rtm">
89107
<options>

0 commit comments

Comments
 (0)