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apple2gs: fix slow_cycle() usage (mamedev#15487)
* only slot ROM should be slow, not internal ROM * fix double-slow write_slot_rom() * inhibited memory access should be slow
1 parent 0846f16 commit 04a5015

1 file changed

Lines changed: 13 additions & 36 deletions

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src/mame/apple/apple2gs.cpp

Lines changed: 13 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -307,8 +307,6 @@ class apple2gs_state : public driver_device
307307

308308
bool m_adb_line = false;
309309

310-
address_space *m_maincpu_space = nullptr;
311-
312310
// align timing to match observed hardware behavior
313311
static constexpr int ALIGN_VBL = 4;
314312
static constexpr int ALIGN_CNT = 2;
@@ -859,8 +857,6 @@ void apple2gs_state::machine_reset()
859857
m_sndglu_addr = 0;
860858
m_sndglu_dummy_read = 0;
861859

862-
m_maincpu_space = &m_maincpu->space(AS_PROGRAM);
863-
864860
m_b0_0000bank.select(0);
865861
m_e0_0000bank.select(0);
866862
m_b0_0200bank.select(0);
@@ -2376,6 +2372,7 @@ u8 apple2gs_state::read_slot_rom(int slotbias, int offset)
23762372
const int slotnum = ((offset>>8) & 0xf) + slotbias;
23772373

23782374
// printf("read_slot_rom: sl %d offs %x, cnxx_slot %d\n", slotnum, offset, m_cnxx_slot);
2375+
slow_cycle();
23792376

23802377
if (m_slotdevice[slotnum] != nullptr)
23812378
{
@@ -2425,8 +2422,6 @@ u8 apple2gs_state::c100_r(offs_t offset)
24252422
{
24262423
const int slot = ((offset>>8) & 0xf) + 1;
24272424

2428-
slow_cycle();
2429-
24302425
// SETSLOTCXROM is disabled, so the $C02D SLOT register controls what's in each slot
24312426
if (!BIT(m_slotromsel, slot))
24322427
{
@@ -2440,24 +2435,20 @@ void apple2gs_state::c100_w(offs_t offset, u8 data)
24402435
{
24412436
const int slot = ((offset>>8) & 0xf) + 1;
24422437

2443-
slow_cycle();
2444-
24452438
if (BIT(m_slotromsel, slot))
24462439
{
24472440
write_slot_rom(1, offset, data);
24482441
}
24492442
}
24502443

2451-
u8 apple2gs_state::c300_int_r(offs_t offset) { slow_cycle(); return read_int_rom(0x3c300, offset); }
2452-
u8 apple2gs_state::c300_r(offs_t offset) { slow_cycle(); return read_slot_rom(3, offset); }
2453-
void apple2gs_state::c300_w(offs_t offset, u8 data) { slow_cycle(); write_slot_rom(3, offset, data); }
2444+
u8 apple2gs_state::c300_int_r(offs_t offset) { return read_int_rom(0x3c300, offset); }
2445+
u8 apple2gs_state::c300_r(offs_t offset) { return read_slot_rom(3, offset); }
2446+
void apple2gs_state::c300_w(offs_t offset, u8 data) { write_slot_rom(3, offset, data); }
24542447

24552448
u8 apple2gs_state::c400_r(offs_t offset)
24562449
{
24572450
const int slot = ((offset>>8) & 0xf) + 4;
24582451

2459-
slow_cycle();
2460-
24612452
if (!BIT(m_slotromsel, slot))
24622453
{
24632454
return read_int_rom(0x3c400, offset);
@@ -2470,8 +2461,6 @@ void apple2gs_state::c400_w(offs_t offset, u8 data)
24702461
{
24712462
const int slot = ((offset>>8) & 0xf) + 4;
24722463

2473-
slow_cycle();
2474-
24752464
if (BIT(m_slotromsel, slot))
24762465
{
24772466
write_slot_rom(4, offset, data);
@@ -2480,8 +2469,6 @@ void apple2gs_state::c400_w(offs_t offset, u8 data)
24802469

24812470
u8 apple2gs_state::c800_r(offs_t offset)
24822471
{
2483-
slow_cycle();
2484-
24852472
if ((offset == 0x7ff) && !machine().side_effects_disabled())
24862473
{
24872474
m_cnxx_slot = CNXX_UNCLAIMED;
@@ -2496,6 +2483,7 @@ u8 apple2gs_state::c800_r(offs_t offset)
24962483

24972484
if ((m_cnxx_slot > 0) && (m_slotdevice[m_cnxx_slot] != nullptr))
24982485
{
2486+
slow_cycle();
24992487
return m_slotdevice[m_cnxx_slot]->read_c800(offset&0xfff);
25002488
}
25012489

@@ -2504,10 +2492,9 @@ u8 apple2gs_state::c800_r(offs_t offset)
25042492

25052493
void apple2gs_state::c800_w(offs_t offset, u8 data)
25062494
{
2507-
slow_cycle();
2508-
25092495
if ((m_cnxx_slot > 0) && (m_slotdevice[m_cnxx_slot] != nullptr))
25102496
{
2497+
slow_cycle();
25112498
m_slotdevice[m_cnxx_slot]->write_c800(offset&0xfff, data);
25122499
}
25132500

@@ -2550,6 +2537,7 @@ u8 apple2gs_state::inh_r(offs_t offset)
25502537
{
25512538
if (m_inh_slot != -1)
25522539
{
2540+
slow_cycle();
25532541
return m_slotdevice[m_inh_slot]->read_inh_rom(offset + 0xd000);
25542542
}
25552543

@@ -2561,6 +2549,7 @@ void apple2gs_state::inh_w(offs_t offset, u8 data)
25612549
{
25622550
if (m_inh_slot != -1)
25632551
{
2552+
slow_cycle();
25642553
m_slotdevice[m_inh_slot]->write_inh_rom(offset + 0xd000, data);
25652554
}
25662555
}
@@ -3087,23 +3076,17 @@ void apple2gs_state::bank1_0000_sh_w(offs_t offset, u8 data)
30873076
{
30883077
m_ram_ptr[offset + 0x10000] = data;
30893078

3090-
switch (offset>>8)
3079+
switch (offset>>10)
30913080
{
3092-
case 0x04: // text page 1
3093-
case 0x05:
3094-
case 0x06:
3095-
case 0x07:
3081+
case 0x01: // text page 1
30963082
if (!(m_shadow & SHAD_TXTPG1))
30973083
{
30983084
slow_cycle();
30993085
m_megaii_ram[offset + 0x10000] = data;
31003086
}
31013087
break;
31023088

3103-
case 0x08: // text page 2 (only shadowable on ROM 03)
3104-
case 0x09:
3105-
case 0x0a:
3106-
case 0x0b:
3089+
case 0x02: // text page 2 (only shadowable on ROM 03)
31073090
if ((!(m_shadow & SHAD_TXTPG2)) && (m_is_rom3))
31083091
{
31093092
slow_cycle();
@@ -3112,21 +3095,15 @@ void apple2gs_state::bank1_0000_sh_w(offs_t offset, u8 data)
31123095
break;
31133096

31143097
// hi-res page 1
3115-
case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
3116-
case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f:
3117-
case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
3118-
case 0x38: case 0x39: case 0x3a: case 0x3b: case 0x3c: case 0x3d: case 0x3e: case 0x3f:
3098+
case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f:
31193099
if ((!(m_shadow & SHAD_HIRESPG1) && !(m_shadow & SHAD_AUXHIRES)) || !(m_shadow & SHAD_SUPERHIRES))
31203100
{
31213101
auxram0000_w(offset, data);
31223102
}
31233103
break;
31243104

31253105
// hi-res page 2
3126-
case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47:
3127-
case 0x48: case 0x49: case 0x4a: case 0x4b: case 0x4c: case 0x4d: case 0x4e: case 0x4f:
3128-
case 0x50: case 0x51: case 0x52: case 0x53: case 0x54: case 0x55: case 0x56: case 0x57:
3129-
case 0x58: case 0x59: case 0x5a: case 0x5b: case 0x5c: case 0x5d: case 0x5e: case 0x5f:
3106+
case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
31303107
if ((!(m_shadow & SHAD_HIRESPG2) && !(m_shadow & SHAD_AUXHIRES)) || !(m_shadow & SHAD_SUPERHIRES))
31313108
{
31323109
auxram0000_w(offset, data);

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