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[llvm][LoongArch] Changing the default code model from small to medium for 64-bit (llvm#132173)
Link: https://discourse.llvm.org/t/rfc-changing-the-default-code-model-for-loongarch
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57 files changed

+760
-380
lines changed

‎llvm/docs/ReleaseNotes.md

+2
Original file line numberDiff line numberDiff line change
@@ -105,6 +105,8 @@ Changes to the Hexagon Backend
105105
Changes to the LoongArch Backend
106106
--------------------------------
107107

108+
* Changing the default code model from `small` to `medium` for 64-bit.
109+
108110
Changes to the MIPS Backend
109111
---------------------------
110112

‎llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -70,7 +70,7 @@ static CodeModel::Model
7070
getEffectiveLoongArchCodeModel(const Triple &TT,
7171
std::optional<CodeModel::Model> CM) {
7272
if (!CM)
73-
return CodeModel::Small;
73+
return TT.isArch64Bit() ? CodeModel::Medium : CodeModel::Small;
7474

7575
switch (*CM) {
7676
case CodeModel::Small:

‎llvm/test/CodeGen/LoongArch/addrspacecast.ll

+2-1
Original file line numberDiff line numberDiff line change
@@ -35,7 +35,8 @@ define void @cast1(ptr %ptr) {
3535
; LA64-NEXT: .cfi_def_cfa_offset 16
3636
; LA64-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
3737
; LA64-NEXT: .cfi_offset 1, -8
38-
; LA64-NEXT: bl %plt(foo)
38+
; LA64-NEXT: pcaddu18i $ra, %call36(foo)
39+
; LA64-NEXT: jirl $ra, $ra, 0
3940
; LA64-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
4041
; LA64-NEXT: addi.d $sp, $sp, 16
4142
; LA64-NEXT: ret

‎llvm/test/CodeGen/LoongArch/alloca.ll

+6-3
Original file line numberDiff line numberDiff line change
@@ -39,7 +39,8 @@ define void @simple_alloca(i32 %n) nounwind {
3939
; LA64-NEXT: slli.d $a0, $a0, 4
4040
; LA64-NEXT: sub.d $a0, $sp, $a0
4141
; LA64-NEXT: move $sp, $a0
42-
; LA64-NEXT: bl %plt(notdead)
42+
; LA64-NEXT: pcaddu18i $ra, %call36(notdead)
43+
; LA64-NEXT: jirl $ra, $ra, 0
4344
; LA64-NEXT: addi.d $sp, $fp, -16
4445
; LA64-NEXT: ld.d $fp, $sp, 0 # 8-byte Folded Reload
4546
; LA64-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
@@ -89,7 +90,8 @@ define void @scoped_alloca(i32 %n) nounwind {
8990
; LA64-NEXT: slli.d $a0, $a0, 4
9091
; LA64-NEXT: sub.d $a0, $sp, $a0
9192
; LA64-NEXT: move $sp, $a0
92-
; LA64-NEXT: bl %plt(notdead)
93+
; LA64-NEXT: pcaddu18i $ra, %call36(notdead)
94+
; LA64-NEXT: jirl $ra, $ra, 0
9395
; LA64-NEXT: move $sp, $s0
9496
; LA64-NEXT: addi.d $sp, $fp, -32
9597
; LA64-NEXT: ld.d $s0, $sp, 8 # 8-byte Folded Reload
@@ -171,7 +173,8 @@ define void @alloca_callframe(i32 %n) nounwind {
171173
; LA64-NEXT: ori $a6, $zero, 7
172174
; LA64-NEXT: ori $a7, $zero, 8
173175
; LA64-NEXT: st.d $t0, $sp, 0
174-
; LA64-NEXT: bl %plt(func)
176+
; LA64-NEXT: pcaddu18i $ra, %call36(func)
177+
; LA64-NEXT: jirl $ra, $ra, 0
175178
; LA64-NEXT: addi.d $sp, $sp, 32
176179
; LA64-NEXT: addi.d $sp, $fp, -16
177180
; LA64-NEXT: ld.d $fp, $sp, 0 # 8-byte Folded Reload

‎llvm/test/CodeGen/LoongArch/analyze-branch.ll

+8-4
Original file line numberDiff line numberDiff line change
@@ -19,13 +19,15 @@ define void @test_bcc_fallthrough_taken(i64 %in) nounwind {
1919
; CHECK-NEXT: ori $a1, $zero, 42
2020
; CHECK-NEXT: bne $a0, $a1, .LBB0_3
2121
; CHECK-NEXT: # %bb.1: # %true
22-
; CHECK-NEXT: bl %plt(test_true)
22+
; CHECK-NEXT: pcaddu18i $ra, %call36(test_true)
23+
; CHECK-NEXT: jirl $ra, $ra, 0
2324
; CHECK-NEXT: .LBB0_2: # %true
2425
; CHECK-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
2526
; CHECK-NEXT: addi.d $sp, $sp, 16
2627
; CHECK-NEXT: ret
2728
; CHECK-NEXT: .LBB0_3: # %false
28-
; CHECK-NEXT: bl %plt(test_false)
29+
; CHECK-NEXT: pcaddu18i $ra, %call36(test_false)
30+
; CHECK-NEXT: jirl $ra, $ra, 0
2931
; CHECK-NEXT: b .LBB0_2
3032
%tst = icmp eq i64 %in, 42
3133
br i1 %tst, label %true, label %false, !prof !0
@@ -51,13 +53,15 @@ define void @test_bcc_fallthrough_nottaken(i64 %in) nounwind {
5153
; CHECK-NEXT: ori $a1, $zero, 42
5254
; CHECK-NEXT: beq $a0, $a1, .LBB1_3
5355
; CHECK-NEXT: # %bb.1: # %false
54-
; CHECK-NEXT: bl %plt(test_false)
56+
; CHECK-NEXT: pcaddu18i $ra, %call36(test_false)
57+
; CHECK-NEXT: jirl $ra, $ra, 0
5558
; CHECK-NEXT: .LBB1_2: # %true
5659
; CHECK-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
5760
; CHECK-NEXT: addi.d $sp, $sp, 16
5861
; CHECK-NEXT: ret
5962
; CHECK-NEXT: .LBB1_3: # %true
60-
; CHECK-NEXT: bl %plt(test_true)
63+
; CHECK-NEXT: pcaddu18i $ra, %call36(test_true)
64+
; CHECK-NEXT: jirl $ra, $ra, 0
6165
; CHECK-NEXT: b .LBB1_2
6266
%tst = icmp eq i64 %in, 42
6367
br i1 %tst, label %true, label %false, !prof !1

‎llvm/test/CodeGen/LoongArch/bnez-beqz.ll

+8-4
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,8 @@ define void @bnez_i32(i32 signext %0) nounwind {
1919
; LA64-NEXT: # %bb.1: # %f
2020
; LA64-NEXT: ret
2121
; LA64-NEXT: .LBB0_2: # %t
22-
; LA64-NEXT: b %plt(bar)
22+
; LA64-NEXT: pcaddu18i $t8, %call36(bar)
23+
; LA64-NEXT: jr $t8
2324
start:
2425
%1 = icmp eq i32 %0, 0
2526
br i1 %1, label %t, label %f
@@ -45,7 +46,8 @@ define void @beqz_i32(i32 signext %0) nounwind {
4546
; LA64: # %bb.0: # %start
4647
; LA64-NEXT: beqz $a0, .LBB1_2
4748
; LA64-NEXT: # %bb.1: # %t
48-
; LA64-NEXT: b %plt(bar)
49+
; LA64-NEXT: pcaddu18i $t8, %call36(bar)
50+
; LA64-NEXT: jr $t8
4951
; LA64-NEXT: .LBB1_2: # %f
5052
; LA64-NEXT: ret
5153
start:
@@ -76,7 +78,8 @@ define void @bnez_i64(i64 %0) nounwind {
7678
; LA64-NEXT: # %bb.1: # %f
7779
; LA64-NEXT: ret
7880
; LA64-NEXT: .LBB2_2: # %t
79-
; LA64-NEXT: b %plt(bar)
81+
; LA64-NEXT: pcaddu18i $t8, %call36(bar)
82+
; LA64-NEXT: jr $t8
8083
start:
8184
%1 = icmp eq i64 %0, 0
8285
br i1 %1, label %t, label %f
@@ -103,7 +106,8 @@ define void @beqz_i64(i64 %0) nounwind {
103106
; LA64: # %bb.0: # %start
104107
; LA64-NEXT: beqz $a0, .LBB3_2
105108
; LA64-NEXT: # %bb.1: # %t
106-
; LA64-NEXT: b %plt(bar)
109+
; LA64-NEXT: pcaddu18i $t8, %call36(bar)
110+
; LA64-NEXT: jr $t8
107111
; LA64-NEXT: .LBB3_2: # %f
108112
; LA64-NEXT: ret
109113
start:

‎llvm/test/CodeGen/LoongArch/calling-conv-common.ll

+18-9
Original file line numberDiff line numberDiff line change
@@ -24,7 +24,8 @@ define i64 @caller_i128_in_regs() nounwind {
2424
; CHECK-NEXT: ori $a0, $zero, 1
2525
; CHECK-NEXT: ori $a1, $zero, 2
2626
; CHECK-NEXT: move $a2, $zero
27-
; CHECK-NEXT: bl %plt(callee_i128_in_regs)
27+
; CHECK-NEXT: pcaddu18i $ra, %call36(callee_i128_in_regs)
28+
; CHECK-NEXT: jirl $ra, $ra, 0
2829
; CHECK-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
2930
; CHECK-NEXT: addi.d $sp, $sp, 16
3031
; CHECK-NEXT: ret
@@ -82,7 +83,8 @@ define i64 @caller_many_scalars() nounwind {
8283
; CHECK-NEXT: ori $a7, $zero, 7
8384
; CHECK-NEXT: st.d $zero, $sp, 0
8485
; CHECK-NEXT: move $a5, $zero
85-
; CHECK-NEXT: bl %plt(callee_many_scalars)
86+
; CHECK-NEXT: pcaddu18i $ra, %call36(callee_many_scalars)
87+
; CHECK-NEXT: jirl $ra, $ra, 0
8688
; CHECK-NEXT: ld.d $ra, $sp, 24 # 8-byte Folded Reload
8789
; CHECK-NEXT: addi.d $sp, $sp, 32
8890
; CHECK-NEXT: ret
@@ -133,7 +135,8 @@ define i64 @caller_large_scalars() nounwind {
133135
; CHECK-NEXT: addi.d $a0, $sp, 32
134136
; CHECK-NEXT: addi.d $a1, $sp, 0
135137
; CHECK-NEXT: st.d $a2, $sp, 32
136-
; CHECK-NEXT: bl %plt(callee_large_scalars)
138+
; CHECK-NEXT: pcaddu18i $ra, %call36(callee_large_scalars)
139+
; CHECK-NEXT: jirl $ra, $ra, 0
137140
; CHECK-NEXT: ld.d $ra, $sp, 72 # 8-byte Folded Reload
138141
; CHECK-NEXT: addi.d $sp, $sp, 80
139142
; CHECK-NEXT: ret
@@ -197,7 +200,8 @@ define i64 @caller_large_scalars_exhausted_regs() nounwind {
197200
; CHECK-NEXT: ori $a6, $zero, 7
198201
; CHECK-NEXT: addi.d $a7, $sp, 48
199202
; CHECK-NEXT: vst $vr0, $sp, 56
200-
; CHECK-NEXT: bl %plt(callee_large_scalars_exhausted_regs)
203+
; CHECK-NEXT: pcaddu18i $ra, %call36(callee_large_scalars_exhausted_regs)
204+
; CHECK-NEXT: jirl $ra, $ra, 0
201205
; CHECK-NEXT: ld.d $ra, $sp, 88 # 8-byte Folded Reload
202206
; CHECK-NEXT: addi.d $sp, $sp, 96
203207
; CHECK-NEXT: ret
@@ -244,7 +248,8 @@ define i64 @caller_large_struct() nounwind {
244248
; CHECK-NEXT: st.d $a2, $sp, 24
245249
; CHECK-NEXT: st.d $a3, $sp, 32
246250
; CHECK-NEXT: addi.d $a0, $sp, 8
247-
; CHECK-NEXT: bl %plt(callee_large_struct)
251+
; CHECK-NEXT: pcaddu18i $ra, %call36(callee_large_struct)
252+
; CHECK-NEXT: jirl $ra, $ra, 0
248253
; CHECK-NEXT: ld.d $ra, $sp, 72 # 8-byte Folded Reload
249254
; CHECK-NEXT: addi.d $sp, $sp, 80
250255
; CHECK-NEXT: ret
@@ -277,7 +282,8 @@ define i64 @caller_small_scalar_ret() nounwind {
277282
; CHECK: # %bb.0:
278283
; CHECK-NEXT: addi.d $sp, $sp, -16
279284
; CHECK-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
280-
; CHECK-NEXT: bl %plt(callee_small_scalar_ret)
285+
; CHECK-NEXT: pcaddu18i $ra, %call36(callee_small_scalar_ret)
286+
; CHECK-NEXT: jirl $ra, $ra, 0
281287
; CHECK-NEXT: addi.w $a2, $zero, -2
282288
; CHECK-NEXT: xor $a0, $a0, $a2
283289
; CHECK-NEXT: orn $a0, $a0, $a1
@@ -309,7 +315,8 @@ define i64 @caller_small_struct_ret() nounwind {
309315
; CHECK: # %bb.0:
310316
; CHECK-NEXT: addi.d $sp, $sp, -16
311317
; CHECK-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
312-
; CHECK-NEXT: bl %plt(callee_small_struct_ret)
318+
; CHECK-NEXT: pcaddu18i $ra, %call36(callee_small_struct_ret)
319+
; CHECK-NEXT: jirl $ra, $ra, 0
313320
; CHECK-NEXT: add.d $a0, $a0, $a1
314321
; CHECK-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
315322
; CHECK-NEXT: addi.d $sp, $sp, 16
@@ -344,7 +351,8 @@ define void @caller_large_scalar_ret() nounwind {
344351
; CHECK-NEXT: addi.d $sp, $sp, -48
345352
; CHECK-NEXT: st.d $ra, $sp, 40 # 8-byte Folded Spill
346353
; CHECK-NEXT: addi.d $a0, $sp, 0
347-
; CHECK-NEXT: bl %plt(callee_large_scalar_ret)
354+
; CHECK-NEXT: pcaddu18i $ra, %call36(callee_large_scalar_ret)
355+
; CHECK-NEXT: jirl $ra, $ra, 0
348356
; CHECK-NEXT: ld.d $ra, $sp, 40 # 8-byte Folded Reload
349357
; CHECK-NEXT: addi.d $sp, $sp, 48
350358
; CHECK-NEXT: ret
@@ -383,7 +391,8 @@ define i64 @caller_large_struct_ret() nounwind {
383391
; CHECK-NEXT: addi.d $sp, $sp, -48
384392
; CHECK-NEXT: st.d $ra, $sp, 40 # 8-byte Folded Spill
385393
; CHECK-NEXT: addi.d $a0, $sp, 8
386-
; CHECK-NEXT: bl %plt(callee_large_struct_ret)
394+
; CHECK-NEXT: pcaddu18i $ra, %call36(callee_large_struct_ret)
395+
; CHECK-NEXT: jirl $ra, $ra, 0
387396
; CHECK-NEXT: ld.d $a0, $sp, 8
388397
; CHECK-NEXT: ld.d $a1, $sp, 32
389398
; CHECK-NEXT: add.d $a0, $a0, $a1

‎llvm/test/CodeGen/LoongArch/calling-conv-lp64d.ll

+6-3
Original file line numberDiff line numberDiff line change
@@ -31,7 +31,8 @@ define i64 @caller_float_in_fpr() nounwind {
3131
; CHECK-NEXT: movgr2fr.w $fa0, $zero
3232
; CHECK-NEXT: movgr2fr.d $fa1, $zero
3333
; CHECK-NEXT: ori $a0, $zero, 1
34-
; CHECK-NEXT: bl %plt(callee_float_in_fpr)
34+
; CHECK-NEXT: pcaddu18i $ra, %call36(callee_float_in_fpr)
35+
; CHECK-NEXT: jirl $ra, $ra, 0
3536
; CHECK-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
3637
; CHECK-NEXT: addi.d $sp, $sp, 16
3738
; CHECK-NEXT: ret
@@ -74,7 +75,8 @@ define i64 @caller_double_in_gpr_exhausted_fprs() nounwind {
7475
; CHECK-NEXT: vldi $vr5, -1000
7576
; CHECK-NEXT: vldi $vr6, -996
7677
; CHECK-NEXT: vldi $vr7, -992
77-
; CHECK-NEXT: bl %plt(callee_double_in_gpr_exhausted_fprs)
78+
; CHECK-NEXT: pcaddu18i $ra, %call36(callee_double_in_gpr_exhausted_fprs)
79+
; CHECK-NEXT: jirl $ra, $ra, 0
7880
; CHECK-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
7981
; CHECK-NEXT: addi.d $sp, $sp, 16
8082
; CHECK-NEXT: ret
@@ -99,7 +101,8 @@ define i64 @caller_double_ret() nounwind {
99101
; CHECK: # %bb.0:
100102
; CHECK-NEXT: addi.d $sp, $sp, -16
101103
; CHECK-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
102-
; CHECK-NEXT: bl %plt(callee_double_ret)
104+
; CHECK-NEXT: pcaddu18i $ra, %call36(callee_double_ret)
105+
; CHECK-NEXT: jirl $ra, $ra, 0
103106
; CHECK-NEXT: movfr2gr.d $a0, $fa0
104107
; CHECK-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
105108
; CHECK-NEXT: addi.d $sp, $sp, 16

‎llvm/test/CodeGen/LoongArch/calling-conv-lp64s.ll

+8-4
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,8 @@ define i64 @callee_float_in_regs(i64 %a, float %b) nounwind {
1111
; CHECK-NEXT: st.d $fp, $sp, 0 # 8-byte Folded Spill
1212
; CHECK-NEXT: move $fp, $a0
1313
; CHECK-NEXT: move $a0, $a1
14-
; CHECK-NEXT: bl %plt(__fixsfdi)
14+
; CHECK-NEXT: pcaddu18i $ra, %call36(__fixsfdi)
15+
; CHECK-NEXT: jirl $ra, $ra, 0
1516
; CHECK-NEXT: add.d $a0, $fp, $a0
1617
; CHECK-NEXT: ld.d $fp, $sp, 0 # 8-byte Folded Reload
1718
; CHECK-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
@@ -29,7 +30,8 @@ define i64 @caller_float_in_regs() nounwind {
2930
; CHECK-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
3031
; CHECK-NEXT: lu12i.w $a1, 262144
3132
; CHECK-NEXT: ori $a0, $zero, 1
32-
; CHECK-NEXT: bl %plt(callee_float_in_regs)
33+
; CHECK-NEXT: pcaddu18i $ra, %call36(callee_float_in_regs)
34+
; CHECK-NEXT: jirl $ra, $ra, 0
3335
; CHECK-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
3436
; CHECK-NEXT: addi.d $sp, $sp, 16
3537
; CHECK-NEXT: ret
@@ -64,7 +66,8 @@ define i64 @caller_float_on_stack() nounwind {
6466
; CHECK-NEXT: move $a3, $zero
6567
; CHECK-NEXT: move $a5, $zero
6668
; CHECK-NEXT: move $a7, $zero
67-
; CHECK-NEXT: bl %plt(callee_float_on_stack)
69+
; CHECK-NEXT: pcaddu18i $ra, %call36(callee_float_on_stack)
70+
; CHECK-NEXT: jirl $ra, $ra, 0
6871
; CHECK-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
6972
; CHECK-NEXT: addi.d $sp, $sp, 16
7073
; CHECK-NEXT: ret
@@ -85,7 +88,8 @@ define i64 @caller_tiny_scalar_ret() nounwind {
8588
; CHECK: # %bb.0:
8689
; CHECK-NEXT: addi.d $sp, $sp, -16
8790
; CHECK-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
88-
; CHECK-NEXT: bl %plt(callee_tiny_scalar_ret)
91+
; CHECK-NEXT: pcaddu18i $ra, %call36(callee_tiny_scalar_ret)
92+
; CHECK-NEXT: jirl $ra, $ra, 0
8993
; CHECK-NEXT: addi.w $a0, $a0, 0
9094
; CHECK-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
9195
; CHECK-NEXT: addi.d $sp, $sp, 16

‎llvm/test/CodeGen/LoongArch/can-not-realign-stack.ll

+4-2
Original file line numberDiff line numberDiff line change
@@ -33,7 +33,8 @@ define dso_local noundef signext i32 @main() nounwind {
3333
; CHECK-NEXT: xvst $xr2, $sp, 200
3434
; CHECK-NEXT: xvst $xr3, $sp, 232
3535
; CHECK-NEXT: addi.d $a0, $sp, 136
36-
; CHECK-NEXT: bl %plt(foo)
36+
; CHECK-NEXT: pcaddu18i $ra, %call36(foo)
37+
; CHECK-NEXT: jirl $ra, $ra, 0
3738
; CHECK-NEXT: xvld $xr0, $sp, 96 # 32-byte Folded Reload
3839
; CHECK-NEXT: xvst $xr0, $sp, 136
3940
; CHECK-NEXT: xvld $xr0, $sp, 64 # 32-byte Folded Reload
@@ -43,7 +44,8 @@ define dso_local noundef signext i32 @main() nounwind {
4344
; CHECK-NEXT: xvld $xr0, $sp, 0 # 32-byte Folded Reload
4445
; CHECK-NEXT: xvst $xr0, $sp, 232
4546
; CHECK-NEXT: addi.d $a0, $sp, 136
46-
; CHECK-NEXT: bl %plt(bar)
47+
; CHECK-NEXT: pcaddu18i $ra, %call36(bar)
48+
; CHECK-NEXT: jirl $ra, $ra, 0
4749
; CHECK-NEXT: move $a0, $zero
4850
; CHECK-NEXT: ld.d $ra, $sp, 264 # 8-byte Folded Reload
4951
; CHECK-NEXT: addi.d $sp, $sp, 272

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