info.yaml

# Tiny Tapeout project information
project:
  title:        "2x2 Systolic array with DFT and bfloat16 - v2"   
  author:       "Julia Desmazes"            
  discord:      "__essen"                         
  description:  "Second version of the 2x2 systollic array with DFT intrastructure, including bfloat16 floating point arithmetic and DFT scan chain." 
  language:     "Verilog" 
  clock_hz:     100000000    # I want to suffer during timing closure

  # How many tiles your design occupies? A single tile is about 167x108 uM.
  tiles: "2x2"          # Valid values: 1x1, 1x2, 2x2, 3x2, 4x2, 6x2 or 8x2

  top_module:  "tt_um_essen"

  # List your project's source files here.
  # Source files must be in ./src and you must list each source file separately, one per line.
  # Don't forget to also update `PROJECT_SOURCES` in test/Makefile.
  source_files:
    - "tt_um_essen.v"
    - "bsc.v"
    - "jtag.v" 
    -  "mac_fsm.v"
    - "ir.v"
    - "mac.v"
    - "mac_unit.v"
    - "mac_streamin.v"
    - "mac_streamout.v"
    - "bf16/src/bf16_add.v"
    - "bf16/src/bf16_mul.v"
    - "bf16/src/booth_unsigned_mul.v"
    - "bf16/src/lzc.v"
    - "bf16/src/pmux.v"

# The pinout of your project. Leave unused pins blank. DO NOT delete or add any pins.
# This section is for the datasheet/website. Use descriptive names (e.g., RX, TX, MOSI, SCL, SEG_A, etc.).
pinout:
  # Inputs
  ui[0]: "tck"
  ui[1]: "data_i[0]"
  ui[2]: "data_i[1]"
  ui[3]: "data_i[2]"
  ui[4]: "data_i[3]"
  ui[5]: "data_i[4]"
  ui[6]: "data_i[5]"
  ui[7]: "data_i[6]"

  # Outputs
  uo[0]: "result_o"
  uo[1]: "result_o"
  uo[2]: "result_o"
  uo[3]: "result_o"
  uo[4]: "result_o"
  uo[5]: "result_o"
  uo[6]: "result_o"
  uo[7]: "result_o"

  # Bidirectional pins
  uio[0]: "data_i[7]"
  uio[1]: "data_valid_i"
  uio[2]: "data_mode_i[1]"
  uio[3]: "data_mode_i[0]"
  uio[4]: "tdi"
  uio[5]: "tms"
  uio[6]: "tdo"
  uio[7]: "result_v_o"


# Do not change!
yaml_version: 6