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Sonic0anacromaniac
Sonic0
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anacromaniac
authored
Advanced configurations to enter in DeepSleep
Co-authored-by: an4cr0n <[email protected]>
1 parent 0ab114d commit fffb25b

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6 files changed

+76
-27
lines changed

6 files changed

+76
-27
lines changed

‎examples/StandardRTLSTag_TWR/StandardRTLSTag_TWR.ino

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -54,6 +54,17 @@ frame_filtering_configuration_t TAG_FRAME_FILTER_CONFIG = {
5454
false
5555
};
5656

57+
sleep_configuration_t SLEEP_CONFIG = {
58+
false, // onWakeUpRunADC reg 0x2C:00
59+
false, // onWakeUpReceive
60+
false, // onWakeUpLoadEUI
61+
true, // onWakeUpLoadL64Param
62+
true, // preserveSleep
63+
true, // enableSLP reg 0x2C:06
64+
false, // enableWakePIN
65+
true // enableWakeSPI
66+
};
67+
5768
void setup() {
5869
// DEBUG monitoring
5970
Serial.begin(115200);
@@ -75,6 +86,8 @@ void setup() {
7586

7687
DW1000Ng::setAntennaDelay(16436);
7788

89+
DW1000Ng::applySleepConfiguration(SLEEP_CONFIG);
90+
7891
DW1000Ng::setPreambleDetectionTimeout(15);
7992
DW1000Ng::setSfdDetectionTimeout(273);
8093
DW1000Ng::setReceiveFrameWaitTimeoutPeriod(2000);

‎keywords.txt

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -20,9 +20,10 @@ select KEYWORD2
2020
end KEYWORD2
2121
enableDebounceClock KEYWORD2
2222
enableLedBlinking KEYWORD2
23-
setGPIOMode KEYWORD2
24-
deepSleep KEYWORD2
25-
spiWakeup KEYWORD2
23+
setGPIOMode KEYWORD2
24+
applySleepConfiguration KEYWORD2
25+
deepSleep KEYWORD2
26+
spiWakeup KEYWORD2
2627
reset KEYWORD2
2728
softwareReset KEYWORD2
2829
setNetworkId KEYWORD2

‎src/DW1000Ng.cpp

Lines changed: 30 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -1194,6 +1194,13 @@ namespace DW1000Ng {
11941194
DW1000NgUtils::writeValueToBytes(enable_mask, 0x005FFF00, LEN_RX_CONF_SUB);
11951195
_writeBytesToRegister(RF_CONF, RF_CONF_SUB, enable_mask, LEN_RX_CONF_SUB);
11961196
}
1197+
1198+
void _uploadConfigToAON() {
1199+
/* Write 1 in UPL_CFG_BIT */
1200+
_writeToRegister(AON, AON_CTRL_SUB, 0x04, LEN_AON_CTRL);
1201+
/* Clear the register */
1202+
_writeToRegister(AON, AON_CTRL_SUB, 0x00, LEN_AON_CTRL);
1203+
}
11971204
}
11981205

11991206
/* ####################### PUBLIC ###################### */
@@ -1388,31 +1395,35 @@ namespace DW1000Ng {
13881395
_writeBytesToRegister(GPIO_CTRL, GPIO_MODE_SUB, gpiomode, LEN_GPIO_MODE);
13891396
}
13901397

1391-
void deepSleep() {
1398+
void applySleepConfiguration(sleep_configuration_t sleep_config) {
13921399
byte aon_wcfg[LEN_AON_WCFG];
1393-
memset(aon_wcfg, 0, LEN_AON_WCFG);
13941400
_readBytes(AON, AON_WCFG_SUB, aon_wcfg, LEN_AON_WCFG);
1401+
byte aon_cfg0[1];
1402+
memset(aon_cfg0, 0, 1);
1403+
1404+
DW1000NgUtils::setBit(aon_wcfg, LEN_AON_WCFG, ONW_RADC_BIT, sleep_config.onWakeUpRunADC);
1405+
DW1000NgUtils::setBit(aon_wcfg, LEN_AON_WCFG, ONW_RX_BIT, sleep_config.onWakeUpReceive);
1406+
DW1000NgUtils::setBit(aon_wcfg, LEN_AON_WCFG, ONW_LEUI_BIT, sleep_config.onWakeUpLoadEUI);
13951407
DW1000NgUtils::setBit(aon_wcfg, LEN_AON_WCFG, ONW_LDC_BIT, true);
1396-
DW1000NgUtils::setBit(aon_wcfg, LEN_AON_WCFG, ONW_PRES_SLEEP_BIT, false);
1408+
DW1000NgUtils::setBit(aon_wcfg, LEN_AON_WCFG, ONW_L64P_BIT, sleep_config.onWakeUpLoadL64Param);
1409+
DW1000NgUtils::setBit(aon_wcfg, LEN_AON_WCFG, ONW_PRES_SLEEP_BIT, sleep_config.preserveSleep);
13971410
DW1000NgUtils::setBit(aon_wcfg, LEN_AON_WCFG, ONW_LLDE_BIT, true);
1398-
DW1000NgUtils::setBit(aon_wcfg, LEN_AON_WCFG, ONW_LDD0_BIT, true);
1411+
DW1000NgUtils::setBit(aon_wcfg, LEN_AON_WCFG, ONW_LLDO_BIT, true);
13991412
_writeBytesToRegister(AON, AON_WCFG_SUB, aon_wcfg, LEN_AON_WCFG);
14001413

1401-
byte aon_cfg0[LEN_AON_CFG0];
1402-
memset(aon_cfg0, 0, LEN_AON_CFG0);
1403-
_readBytes(AON, AON_CFG0_SUB, aon_cfg0, LEN_AON_CFG0);
1404-
DW1000NgUtils::setBit(aon_cfg0, LEN_AON_CFG0, WAKE_PIN_BIT, true);
1405-
DW1000NgUtils::setBit(aon_cfg0, LEN_AON_CFG0, WAKE_SPI_BIT, true);
1406-
DW1000NgUtils::setBit(aon_cfg0, LEN_AON_CFG0, WAKE_CNT_BIT, false);
1407-
DW1000NgUtils::setBit(aon_cfg0, LEN_AON_CFG0, SLEEP_EN_BIT, true);
1408-
_writeBytesToRegister(AON, AON_CFG0_SUB, aon_cfg0, LEN_AON_CFG0);
1409-
1410-
byte aon_ctrl[LEN_AON_CTRL];
1411-
memset(aon_ctrl, 0, LEN_AON_CTRL);
1412-
_readBytes(AON, AON_CTRL_SUB, aon_ctrl, LEN_AON_CTRL);
1413-
//DW1000NgUtils::setBit(aon_ctrl, LEN_AON_CTRL, UPL_CFG_BIT, true);
1414-
DW1000NgUtils::setBit(aon_ctrl, LEN_AON_CTRL, SAVE_BIT, true);
1415-
_writeBytesToRegister(AON, AON_CTRL_SUB, aon_ctrl, LEN_AON_CTRL);
1414+
DW1000NgUtils::setBit(aon_cfg0, 1, WAKE_PIN_BIT, sleep_config.enableWakePIN);
1415+
DW1000NgUtils::setBit(aon_cfg0, 1, WAKE_SPI_BIT, sleep_config.enableWakeSPI);
1416+
DW1000NgUtils::setBit(aon_cfg0, 1, WAKE_CNT_BIT, false);
1417+
DW1000NgUtils::setBit(aon_cfg0, 1, SLEEP_EN_BIT, sleep_config.enableSLP);
1418+
_writeBytesToRegister(AON, AON_CFG0_SUB, aon_cfg0, 1); //Deletes 3 bits of the unused LPCLKDIVA
1419+
}
1420+
1421+
/*Puts the device into sleep/deepSleep mode. This function also upload sleep config to AON. */
1422+
void deepSleep() {
1423+
/* Clear the register */
1424+
_writeToRegister(AON, AON_CTRL_SUB, 0x00, LEN_AON_CTRL);
1425+
/* Write 1 in SAVE_BIT */
1426+
_writeToRegister(AON, AON_CTRL_SUB, 0x02, LEN_AON_CTRL);
14161427
}
14171428

14181429
void spiWakeup(){

‎src/DW1000Ng.hpp

Lines changed: 11 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -87,7 +87,17 @@ namespace DW1000Ng {
8787
void setGPIOMode(uint8_t msgp, uint8_t mode);
8888

8989
/**
90-
Enable deep sleep mode
90+
Applies the common sleep configuration and on-wake mode to the DW1000 for both DEEP_SLEEP and SLEEP modes.
91+
ONW_LLDO_BIT and ONW_LLDE_BIT are 1 to default.
92+
93+
@param [in] config struct The sleep/deepsleep configuration to apply to the DW1000
94+
*/
95+
void applySleepConfiguration(sleep_configuration_t sleep_config);
96+
97+
/**
98+
Enter in DeepSleep. applySleepConfiguration must be called first.
99+
Either spi wakeup or pin wakeup must be enabled.
100+
-- In case of future implementation of Sleep mode, you must reset proper antenna delay with setTxAntennaDelay() after wakeUp event. --
91101
*/
92102
void deepSleep();
93103

‎src/DW1000NgConfiguration.hpp

Lines changed: 12 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -59,4 +59,15 @@ typedef struct frame_filtering_configuration_t {
5959
boolean allowAllReserved;
6060
boolean allowReservedFour;
6161
boolean allowReservedFive;
62-
} frame_filtering_configuration_t;
62+
} frame_filtering_configuration_t;
63+
64+
typedef struct sleep_configuration_t {
65+
boolean onWakeUpRunADC;
66+
boolean onWakeUpReceive;
67+
boolean onWakeUpLoadEUI;
68+
boolean onWakeUpLoadL64Param;
69+
boolean preserveSleep;
70+
boolean enableSLP;
71+
boolean enableWakePIN;
72+
boolean enableWakeSPI;
73+
} sleep_configuration_t;

‎src/DW1000NgRegisters.hpp

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -299,11 +299,14 @@ constexpr uint16_t LEN_FS_XTALT = 1;
299299
// AON
300300
constexpr uint16_t AON = 0x2C;
301301
constexpr uint16_t AON_WCFG_SUB = 0x00;
302-
constexpr uint16_t ONW_RX = 1;
302+
constexpr uint16_t ONW_RADC_BIT = 0;
303+
constexpr uint16_t ONW_RX_BIT = 1;
304+
constexpr uint16_t ONW_LEUI_BIT = 3;
303305
constexpr uint16_t ONW_LDC_BIT = 6;
306+
constexpr uint16_t ONW_L64P_BIT = 7;
304307
constexpr uint16_t ONW_PRES_SLEEP_BIT = 8;
305308
constexpr uint16_t ONW_LLDE_BIT = 11;
306-
constexpr uint16_t ONW_LDD0_BIT = 12;
309+
constexpr uint16_t ONW_LLDO_BIT = 12;
307310
constexpr uint16_t LEN_AON_WCFG = 2;
308311

309312
constexpr uint16_t AON_CTRL_SUB = 0x02;
@@ -321,7 +324,7 @@ constexpr uint16_t LPDIV_EN_BIT = 4;
321324
constexpr uint16_t LEN_AON_CFG0 = 4;
322325

323326
constexpr uint16_t AON_CFG1_SUB = 0x0A;
324-
constexpr uint16_t SLEEP_CE_BIT = 0;
327+
constexpr uint16_t SLEEP_CEN_BIT = 0;
325328
constexpr uint16_t SMXX_BIT = 1;
326329
constexpr uint16_t LPOSC_CAL_BIT = 2;
327330
constexpr uint16_t LEN_AON_CFG1 = 2;

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