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Add example ledon for the Basys3 board (Xilinx FPGA)
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‎examples/basys3/ledon/apio.ini‎

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; Apio project configuration file.
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; See https://fpgawars.github.io/apio/docs/project-file for details.
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[env:default]
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board = basys3
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top-module = ledon

‎examples/basys3/ledon/basys3.xdc‎

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#-- Placa Basys3
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#-- Reloj del sistema
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set_property -dict { PACKAGE_PIN W5 IOSTANDARD LVCMOS33 } [get_ports {clk}]
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#-- LEDs
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set_property -dict { PACKAGE_PIN U16 IOSTANDARD LVCMOS33 } [get_ports {leds[0]}]
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set_property -dict { PACKAGE_PIN E19 IOSTANDARD LVCMOS33 } [get_ports {leds[1]}]
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set_property -dict { PACKAGE_PIN U19 IOSTANDARD LVCMOS33 } [get_ports {leds[2]}]
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set_property -dict { PACKAGE_PIN V19 IOSTANDARD LVCMOS33 } [get_ports {leds[3]}]
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set_property -dict { PACKAGE_PIN W18 IOSTANDARD LVCMOS33 } [get_ports {leds[4]}]
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set_property -dict { PACKAGE_PIN U15 IOSTANDARD LVCMOS33 } [get_ports {leds[5]}]
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set_property -dict { PACKAGE_PIN U14 IOSTANDARD LVCMOS33 } [get_ports {leds[6]}]
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set_property -dict { PACKAGE_PIN V14 IOSTANDARD LVCMOS33 } [get_ports {leds[7]}]
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set_property -dict { PACKAGE_PIN V13 IOSTANDARD LVCMOS33 } [get_ports {leds[8]}]
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set_property -dict { PACKAGE_PIN V3 IOSTANDARD LVCMOS33 } [get_ports {leds[9]}]
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set_property -dict { PACKAGE_PIN W3 IOSTANDARD LVCMOS33 } [get_ports {leds[10]}]
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set_property -dict { PACKAGE_PIN U3 IOSTANDARD LVCMOS33 } [get_ports {leds[11]}]
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set_property -dict { PACKAGE_PIN P3 IOSTANDARD LVCMOS33 } [get_ports {leds[12]}]
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set_property -dict { PACKAGE_PIN N3 IOSTANDARD LVCMOS33 } [get_ports {leds[13]}]
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set_property -dict { PACKAGE_PIN P1 IOSTANDARD LVCMOS33 } [get_ports {leds[14]}]
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set_property -dict { PACKAGE_PIN L1 IOSTANDARD LVCMOS33 } [get_ports {leds[15]}]
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#------------- Botones
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#-- Centro
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set_property -dict { PACKAGE_PIN U18 IOSTANDARD LVCMOS33 } [get_ports {buttons[0]}]
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#-- Arriba
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set_property -dict { PACKAGE_PIN T18 IOSTANDARD LVCMOS33 } [get_ports {buttons[1]}]
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#-- Izquierda
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set_property -dict { PACKAGE_PIN W19 IOSTANDARD LVCMOS33 } [get_ports {buttons[2]}]
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#-- Derecha
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set_property -dict { PACKAGE_PIN T17 IOSTANDARD LVCMOS33 } [get_ports {buttons[3]}]
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#-- Abajo
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set_property -dict { PACKAGE_PIN U17 IOSTANDARD LVCMOS33 } [get_ports {buttons[4]}]
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#------------ Switches
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set_property -dict { PACKAGE_PIN V17 IOSTANDARD LVCMOS33 } [get_ports {switches[0]}]
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set_property -dict { PACKAGE_PIN V16 IOSTANDARD LVCMOS33 } [get_ports {switches[1]}]
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set_property -dict { PACKAGE_PIN W17 IOSTANDARD LVCMOS33 } [get_ports {switches[2]}]
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set_property -dict { PACKAGE_PIN W16 IOSTANDARD LVCMOS33 } [get_ports {switches[3]}]
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set_property -dict { PACKAGE_PIN W15 IOSTANDARD LVCMOS33 } [get_ports {switches[4]}]
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set_property -dict { PACKAGE_PIN V15 IOSTANDARD LVCMOS33 } [get_ports {switches[5]}]
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set_property -dict { PACKAGE_PIN W14 IOSTANDARD LVCMOS33 } [get_ports {switches[6]}]
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set_property -dict { PACKAGE_PIN W13 IOSTANDARD LVCMOS33 } [get_ports {switches[7]}]
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set_property -dict { PACKAGE_PIN V2 IOSTANDARD LVCMOS33 } [get_ports {switches[8]}]
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set_property -dict { PACKAGE_PIN T3 IOSTANDARD LVCMOS33 } [get_ports {switches[9]}]
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set_property -dict { PACKAGE_PIN T2 IOSTANDARD LVCMOS33 } [get_ports {switches[10]}]
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set_property -dict { PACKAGE_PIN R3 IOSTANDARD LVCMOS33 } [get_ports {switches[11]}]
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set_property -dict { PACKAGE_PIN W2 IOSTANDARD LVCMOS33 } [get_ports {switches[12]}]
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set_property -dict { PACKAGE_PIN U1 IOSTANDARD LVCMOS33 } [get_ports {switches[13]}]
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set_property -dict { PACKAGE_PIN T1 IOSTANDARD LVCMOS33 } [get_ports {switches[14]}]
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set_property -dict { PACKAGE_PIN R2 IOSTANDARD LVCMOS33 } [get_ports {switches[15]}]
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#------------ Displays de 7 segmentos
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#-- Seleccion del display donde mostrar los segmentos
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set_property -dict { PACKAGE_PIN U2 IOSTANDARD LVCMOS33 } [get_ports {display_sel[0]}]
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set_property -dict { PACKAGE_PIN U4 IOSTANDARD LVCMOS33 } [get_ports {display_sel[1]}]
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set_property -dict { PACKAGE_PIN V4 IOSTANDARD LVCMOS33 } [get_ports {display_sel[2]}]
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set_property -dict { PACKAGE_PIN W4 IOSTANDARD LVCMOS33 } [get_ports {display_sel[3]}]
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#-- Segmentos de los displays
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set_property -dict { PACKAGE_PIN W7 IOSTANDARD LVCMOS33 } [get_ports {segments[0]}]
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set_property -dict { PACKAGE_PIN W6 IOSTANDARD LVCMOS33 } [get_ports {segments[1]}]
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set_property -dict { PACKAGE_PIN U8 IOSTANDARD LVCMOS33 } [get_ports {segments[2]}]
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set_property -dict { PACKAGE_PIN V8 IOSTANDARD LVCMOS33 } [get_ports {segments[3]}]
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set_property -dict { PACKAGE_PIN U5 IOSTANDARD LVCMOS33 } [get_ports {segments[4]}]
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set_property -dict { PACKAGE_PIN V5 IOSTANDARD LVCMOS33 } [get_ports {segments[5]}]
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set_property -dict { PACKAGE_PIN U7 IOSTANDARD LVCMOS33 } [get_ports {segments[6]}]
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set_property -dict { PACKAGE_PIN V7 IOSTANDARD LVCMOS33 } [get_ports {segments[7]}]
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#--------- VGA
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set_property -dict { PACKAGE_PIN G19 IOSTANDARD LVCMOS33 } [get_ports {vga_red[0]}]
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set_property -dict { PACKAGE_PIN H19 IOSTANDARD LVCMOS33 } [get_ports {vga_red[1]}]
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set_property -dict { PACKAGE_PIN J19 IOSTANDARD LVCMOS33 } [get_ports {vga_red[2]}]
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set_property -dict { PACKAGE_PIN N19 IOSTANDARD LVCMOS33 } [get_ports {vga_red[3]}]
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set_property -dict { PACKAGE_PIN N18 IOSTANDARD LVCMOS33 } [get_ports {vga_blue[0]}]
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set_property -dict { PACKAGE_PIN L18 IOSTANDARD LVCMOS33 } [get_ports {vga_blue[1]}]
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set_property -dict { PACKAGE_PIN K18 IOSTANDARD LVCMOS33 } [get_ports {vga_blue[2]}]
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set_property -dict { PACKAGE_PIN J18 IOSTANDARD LVCMOS33 } [get_ports {vga_blue[3]}]
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set_property -dict { PACKAGE_PIN J17 IOSTANDARD LVCMOS33 } [get_ports {vga_green[0]}]
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set_property -dict { PACKAGE_PIN H17 IOSTANDARD LVCMOS33 } [get_ports {vga_green[1]}]
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set_property -dict { PACKAGE_PIN G17 IOSTANDARD LVCMOS33 } [get_ports {vga_green[2]}]
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set_property -dict { PACKAGE_PIN D17 IOSTANDARD LVCMOS33 } [get_ports {vga_green[3]}]
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set_property -dict { PACKAGE_PIN P19 IOSTANDARD LVCMOS33 } [get_ports {vga_hsync}]
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set_property -dict { PACKAGE_PIN R19 IOSTANDARD LVCMOS33 } [get_ports {vga_vsync}]
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#--- UART
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set_property -dict { PACKAGE_PIN B18 IOSTANDARD LVCMOS33 } [get_ports {uart_rx_async}]
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set_property -dict { PACKAGE_PIN A18 IOSTANDARD LVCMOS33 } [get_ports {uart_tx}]

‎examples/basys3/ledon/info‎

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Turning on a led

‎examples/basys3/ledon/ledon.v‎

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`default_nettype none
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//-- Ejemplo basico para encender un led
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module ledon (
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//-- LEDs de la BASYS3
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output wire [15:0] leds
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);
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//-- Encender led15!
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assign leds[15] = 1'b1;
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endmodule
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‎examples/basys3/ledon/ledon_tb.gtkw‎

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[*]
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[*] GTKWave Analyzer v3.4.0 (w)1999-2022 BSI
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[*] Sat Jun 6 18:41:25 2026
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[*]
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[dumpfile] "/home/obijuan/Develop/FPGAwars/apio/ledon/_build/default/ledon_tb.vcd"
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[dumpfile_mtime] "Sat Jun 6 18:40:47 2026"
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[dumpfile_size] 441
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[savefile] "/home/obijuan/Develop/FPGAwars/apio/ledon/ledon_tb.gtkw"
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[timestart] 0
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[size] 1000 600
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[pos] -1 -1
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*-8.389495 146000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
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[treeopen] ledon_tb.
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[sst_width] 297
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[signals_width] 129
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[sst_expanded] 1
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[sst_vpaned_height] 144
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@28
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ledon_tb.led15
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[pattern_trace] 1
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[pattern_trace] 0

‎examples/basys3/ledon/ledon_tb.v‎

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//-------------------------------------------------------------------
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//-- ledon_tb.v
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//-- Testbench
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//-------------------------------------------------------------------
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//-- Juan Gonzalez (Obijuan)
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//-- GPL license
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//-------------------------------------------------------------------
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`default_nettype none `timescale 100 ns / 10 ns
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module ledon_tb ();
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//-- Simulation time: 1us (10 * 100ns)
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parameter DURATION = 10;
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//-- Leds port
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wire [15:0] leds;
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wire led15 = leds[15];
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//-- Instantiate the unit to test
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ledon UUT (
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.leds(leds)
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);
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initial begin
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//-- Dump vars to the .vcd output file
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$dumpvars(0, ledon_tb);
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#(DURATION) $display("End of simulation");
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$finish;
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end
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endmodule

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