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Commit 48e15a1

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cargo fmt
1 parent b3117e0 commit 48e15a1

2 files changed

Lines changed: 13 additions & 12 deletions

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src/pass/check.rs

Lines changed: 7 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -280,16 +280,15 @@ impl<'a> Checker<'a> {
280280
| BinOp::BitOr
281281
| BinOp::BitXor => check_eq(self),
282282
BinOp::Shl | BinOp::Shr => {
283-
let u32_ty: MaybeRc<Type> =
284-
TypeT::Int { signed: false, width: 32 }
285-
.with_loc(rhs.loc.clone())
286-
.into();
283+
let u32_ty: MaybeRc<Type> = TypeT::Int {
284+
signed: false,
285+
width: 32,
286+
}
287+
.with_loc(rhs.loc.clone())
288+
.into();
287289
if !env.vtype_eq(rhs_ty.clone().into(), u32_ty) {
288290
self.report(
289-
format!(
290-
"shift amount must be uint32_t, not {}",
291-
rhs_ty
292-
),
291+
format!("shift amount must be uint32_t, not {}", rhs_ty),
293292
&rval.loc,
294293
)
295294
}

src/pass/elab.rs

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -266,10 +266,12 @@ impl<'a> Elaborator<'a> {
266266
}
267267
}
268268
BinOp::Shl | BinOp::Shr => {
269-
let u32_ty: MaybeRc<Type> =
270-
TypeT::Int { signed: false, width: 32 }
271-
.with_loc(rhs.loc.clone())
272-
.into();
269+
let u32_ty: MaybeRc<Type> = TypeT::Int {
270+
signed: false,
271+
width: 32,
272+
}
273+
.with_loc(rhs.loc.clone())
274+
.into();
273275
if !env.vtype_eq(rhs_ty, u32_ty.clone()) {
274276
cast_to(rhs, u32_ty.to_rc())
275277
}

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