@@ -55,6 +55,8 @@ struct DispatchRaysTopLevelData
5555 uint32 accelStructTrackerSrd[MaxBufferSrdSize]; // Structured buffer SRD pointing to the accel struct tracker
5656};
5757
58+ #define DISPATCHRAYSCONSTANTDATA_STRUCT_OFFSET_DISPATCHID 48
59+
5860// Dispatch rays constant buffer data (GPU structure). Note, using unaligned uint64_t in HLSL constant buffers requires
5961// -no-legacy-cbuf-layout for cpp style structure alignment to work. But currently that support is incomplete in DXC
6062// and until that is resolved we need to use uint32's explicitly.
@@ -74,7 +76,8 @@ struct DispatchRaysConstantData
7476 uint32 hitGroupTableBaseAddressLo; // Hit group table base address low 32-bits
7577 uint32 hitGroupTableBaseAddressHi; // Hit group table base address high 32-bits
7678 uint32 hitGroupTableStrideInBytes; // Hit group table record byte stride
77- uint32 reserved0; // Reserved padding
79+ uint32 cpsDispatchId; // Continuations DispatchId, written in the persistent mode.
80+ // This value should not be read via constant buffer.
7881 uint32 callableTableBaseAddressLo; // Callable shader table base address low 32-bits
7982 uint32 callableTableBaseAddressHi; // Callable shader table base address high 32-bits
8083 uint32 callableTableStrideInBytes; // Callable shader table byte stride
@@ -96,6 +99,8 @@ struct DispatchRaysConstantData
9699 uint32 cpsGlobalMemoryAddressLo; // Separate CPS stack memory base address low 32-bits
97100 uint32 cpsGlobalMemoryAddressHi; // Separate CPS stack memory base address high 32-bits
98101 uint32 counterMask; // Mask for filtering ray history token
102+ uint32 cpsDispatchIdAddressLo; // Continuations cpsDispatchId address low 32-bits
103+ uint32 cpsDispatchIdAddressHi; // Continuations cpsDispatchId address high 32-bits
99104};
100105#pragma pack(pop)
101106
@@ -109,6 +114,8 @@ struct DispatchRaysConstants
109114#if __cplusplus
110115static_assert ((sizeof (DispatchRaysConstants) % sizeof (uint32)) == 0 ,
111116 " DispatchRaysConstants is not dword-aligned" );
117+ static_assert (DISPATCHRAYSCONSTANTDATA_STRUCT_OFFSET_DISPATCHID == offsetof(DispatchRaysConstantData, cpsDispatchId),
118+ " DISPATCHRAYSCONSTANTDATA_STRUCT_OFFSET_DISPATCHID mismatches to cpsDispatchId" );
112119
113120constexpr uint32 DispatchRaysConstantsDw = sizeof (DispatchRaysConstants) / sizeof (uint32);
114121#endif
@@ -132,6 +139,17 @@ struct InitExecuteIndirectUserData
132139// Constants for InitExecuteIndirect shader
133140struct InitExecuteIndirectConstants
134141{
142+ #if __cplusplus
143+ // Internal counter buffer SRDs
144+ uint32 internalUavSrd[MaxSupportedIndirectCounters][MaxBufferSrdSize];
145+
146+ // Internal acceleration structure tracker buffer SRD.
147+ uint32 accelStructTrackerSrd[MaxBufferSrdSize];
148+ #else
149+ uint4 internalUavSrd[MaxSupportedIndirectCounters][MaxBufferSrdSize / 4 ];
150+ uint4 accelStructTrackerSrd[MaxBufferSrdSize / 4 ];
151+ #endif
152+
135153 uint32 inputBytesPerDispatch; // Size of application indirect arguments
136154 uint32 outputBytesPerDispatch; // Size of resulting driver internal arguments
137155 uint32 bindingArgsSize; // Size of binding arguments in the app buffer preceeding the dispatch
@@ -160,18 +178,10 @@ struct InitExecuteIndirectConstants
160178 uint32 counterRayIdRangeBegin; // Counter ray ID range begin
161179 uint32 counterRayIdRangeEnd; // Counter ray ID range end
162180 uint32 cpsBackendStackSize; // Scratch memory used by a compiler backend, start at offset 0
163- uint32 padding0 ; // Padding for 16-byte alignment
181+ uint32 cpsFrontendStackSize ; // Scratch memory used by IR (Intermediate Representation), for a continuation passing shader
164182
165- #if __cplusplus
166- // Internal counter buffer SRDs
167- uint32 internalUavSrd[MaxSupportedIndirectCounters][MaxBufferSrdSize];
168-
169- // Internal acceleration structure tracker buffer SRD.
170- uint32 accelStructTrackerSrd[MaxBufferSrdSize];
171- #else
172- uint4 internalUavSrd[MaxSupportedIndirectCounters][MaxBufferSrdSize / 4 ];
173- uint4 accelStructTrackerSrd[MaxBufferSrdSize / 4 ];
174- #endif
183+ uint32 cpsGlobalMemoryAddressLo; // Separate CPS stack memory base address low 32-bits
184+ uint32 cpsGlobalMemoryAddressHi; // Separate CPS stack memory base address high 32-bits
175185};
176186
177187constexpr uint32 InitExecuteIndirectConstantsDw = sizeof (InitExecuteIndirectConstants) / sizeof (uint32);
@@ -184,7 +194,7 @@ static_assert((MaxBufferSrdSize == 4), "Buffer SRD size changed, affected shader
184194#endif
185195static_assert ((sizeof (InitExecuteIndirectConstants) % sizeof (uint32)) == 0 ,
186196 " InitExecuteIndirectConstants is not dword-aligned" );
187- }
197+ } // namespace GpuRt
188198#endif
189199
190200#endif
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