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Update gpurt from commit b0e4674a
Support cpsGlobal in DispatchRaysIndirect First attempt at shared file validation Move CopyAS to shadersClean Use global atomic to get dispatch id Fix line length limits for GPURT_ENABLE_GPU_DEBUG=ON Updated stages for CmdWriteImmediate gpurtDevice: Add public numprims calc function [Continuations] Introduce helper structs for packed and unpacked Vpc values Defines an RT IP enumeration inside GpuRT that is more stable (across driver versions) than the PAL equivalent [Continuations] Remove SuspendWave mode [Continuations] Revamp scheduling to not use wait masks Add float3 versions of AmdExtD3DShaderIntrinsics_WaveClusterMax / AmdExtD3DShaderIntrinsics_WaveClusterMin
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+578
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lines changed

backends/pal/gpurtPalBackend.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -152,11 +152,11 @@ void PalBackend::WriteImmediateSingle(
152152
ImmediateDataWidth width
153153
) const
154154
{
155-
// We want to use HwPipePreCs (ME) so that the writes do not occur before UAV barriers are done waiting.
155+
// We want to use StagePostPrefetch (ME) so that the writes do not occur before UAV barriers are done waiting.
156156
// Both internal barriers during the build and application barriers synchronizing access to acceleration
157-
// structure memory wait at HwPipePreCs.
157+
// structure memory wait at StagePostPrefetch.
158158
GetCmdBuffer(cmdBuffer)->CmdWriteImmediate(
159-
Pal::HwPipePoint::HwPipePreCs,
159+
Pal::PipelineStageFlag::PipelineStagePostPrefetch,
160160
value,
161161
GpuRtToPalImmediateDataWidth(width),
162162
destVa);

cmake/GpuRtGenerateShaders.cmake

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -76,6 +76,7 @@ if (GPURT_ENABLE_GPU_DEBUG)
7676
set(debugShaderDirectory "${CMAKE_CURRENT_BINARY_DIR}/debugShaders/src/shaders/")
7777
set(gpurtShaderSource ${GPURT_SHADER_SOURCE_FILES})
7878
set(gpurtShadersSourceDir ${debugShaderDirectory})
79+
set(gpurtShadersPreprocessInputFile "${CMAKE_CURRENT_BINARY_DIR}/debugShaders/DebugPreprocessShadersInput.txt")
7980
list(TRANSFORM gpurtShaderSource PREPEND "${debugShaderDirectory}")
8081
set(preprocessArgs "")
8182
foreach(originalSourceFile ${GPURT_SHADER_SOURCE_FILES})
@@ -84,10 +85,13 @@ if (GPURT_ENABLE_GPU_DEBUG)
8485
list(APPEND preprocessArgs "${originalSourcePath}" "${newSourceFilePath}")
8586
endforeach()
8687
set(gpurtDebugPreprocessorScript "${gpurtToolsDir}/DebugPreprocessShaders.py")
88+
configure_file("${gpurtToolsDir}/DebugPreprocessShadersInput.txt.in"
89+
${gpurtShadersPreprocessInputFile}
90+
)
8791
add_custom_command(
8892
OUTPUT ${gpurtShaderSource} ${gpurtDebugInfoFile}
89-
DEPENDS ${originalShaderSource} ${gpurtDebugPreprocessorScript}
90-
COMMAND Python3::Interpreter ${gpurtDebugPreprocessorScript} ${preprocessArgs} ${gpurtDebugInfoFile}
93+
DEPENDS ${originalShaderSource} ${gpurtDebugPreprocessorScript} ${gpurtShadersPreprocessInputFile}
94+
COMMAND Python3::Interpreter ${gpurtDebugPreprocessorScript} -i ${gpurtShadersPreprocessInputFile} -o ${gpurtDebugInfoFile}
9195
)
9296
else()
9397
set(gpurtShaderSource "${originalShaderSource}")

gpurt/gpurt.h

Lines changed: 12 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1471,13 +1471,21 @@ class IDevice
14711471
// @param pDispatchRaysConstants (in/out) Non-null pointer to a DispatchRaysConstants
14721472
// @param cpsMemoryGpuAddr (in) GPU address pointing to the beginning of cps memory
14731473
// @param cpsMemoryBytes (in) Cps allocated memory size in bytes
1474-
//
1475-
// @return the required global memory allocation size in bytes
14761474
virtual void PatchDispatchRaysConstants(
14771475
DispatchRaysConstants* pDispatchRaysConstants,
14781476
const gpusize cpsMemoryGpuAddr,
14791477
const gpusize cpsMemoryBytes) = 0;
14801478

1479+
// Populates the GPU addresses in the InitExecuteIndirectConstants structure
1480+
//
1481+
// @param pInitExecuteIndirectConstants (in/out) Non-null pointer to a InitExecuteIndirectConstants
1482+
// @param cpsMemoryGpuAddr (in) GPU address pointing to the beginning of cps memory
1483+
// @param cpsMemoryBytes (in) Cps allocated memory size in bytes
1484+
virtual void PatchInitExecuteIndirectConstants(
1485+
GpuRt::InitExecuteIndirectConstants* pInitExecuteIndirectConstants,
1486+
const gpusize cpsMemoryGpuAddr,
1487+
const gpusize cpsMemoryBytes) = 0;
1488+
14811489
//
14821490
// @param cpsVideoMem [in] Cps video memory
14831491
// @param cpsMemoryBytes [in] Cps allocated memory size in bytes
@@ -1630,6 +1638,8 @@ class IDevice
16301638
// Check if a build is a good candidate for ACE offload (typically barrier-free cases)
16311639
virtual bool ShouldUseGangedAceForBuild(const AccelStructBuildInputs& inputs) const = 0;
16321640

1641+
virtual uint32 CalculateBvhPrimitiveCount(const AccelStructBuildInputs& inputs) const = 0;
1642+
16331643
protected:
16341644

16351645
/// Client must create objects by explicitly calling CreateDevice method

gpurt/gpurtDispatch.h

Lines changed: 23 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -55,6 +55,8 @@ struct DispatchRaysTopLevelData
5555
uint32 accelStructTrackerSrd[MaxBufferSrdSize]; // Structured buffer SRD pointing to the accel struct tracker
5656
};
5757

58+
#define DISPATCHRAYSCONSTANTDATA_STRUCT_OFFSET_DISPATCHID 48
59+
5860
// Dispatch rays constant buffer data (GPU structure). Note, using unaligned uint64_t in HLSL constant buffers requires
5961
// -no-legacy-cbuf-layout for cpp style structure alignment to work. But currently that support is incomplete in DXC
6062
// and until that is resolved we need to use uint32's explicitly.
@@ -74,7 +76,8 @@ struct DispatchRaysConstantData
7476
uint32 hitGroupTableBaseAddressLo; // Hit group table base address low 32-bits
7577
uint32 hitGroupTableBaseAddressHi; // Hit group table base address high 32-bits
7678
uint32 hitGroupTableStrideInBytes; // Hit group table record byte stride
77-
uint32 reserved0; // Reserved padding
79+
uint32 cpsDispatchId; // Continuations DispatchId, written in the persistent mode.
80+
// This value should not be read via constant buffer.
7881
uint32 callableTableBaseAddressLo; // Callable shader table base address low 32-bits
7982
uint32 callableTableBaseAddressHi; // Callable shader table base address high 32-bits
8083
uint32 callableTableStrideInBytes; // Callable shader table byte stride
@@ -96,6 +99,8 @@ struct DispatchRaysConstantData
9699
uint32 cpsGlobalMemoryAddressLo; // Separate CPS stack memory base address low 32-bits
97100
uint32 cpsGlobalMemoryAddressHi; // Separate CPS stack memory base address high 32-bits
98101
uint32 counterMask; // Mask for filtering ray history token
102+
uint32 cpsDispatchIdAddressLo; // Continuations cpsDispatchId address low 32-bits
103+
uint32 cpsDispatchIdAddressHi; // Continuations cpsDispatchId address high 32-bits
99104
};
100105
#pragma pack(pop)
101106

@@ -109,6 +114,8 @@ struct DispatchRaysConstants
109114
#if __cplusplus
110115
static_assert((sizeof(DispatchRaysConstants) % sizeof(uint32)) == 0,
111116
"DispatchRaysConstants is not dword-aligned");
117+
static_assert(DISPATCHRAYSCONSTANTDATA_STRUCT_OFFSET_DISPATCHID == offsetof(DispatchRaysConstantData, cpsDispatchId),
118+
"DISPATCHRAYSCONSTANTDATA_STRUCT_OFFSET_DISPATCHID mismatches to cpsDispatchId");
112119

113120
constexpr uint32 DispatchRaysConstantsDw = sizeof(DispatchRaysConstants) / sizeof(uint32);
114121
#endif
@@ -132,6 +139,17 @@ struct InitExecuteIndirectUserData
132139
// Constants for InitExecuteIndirect shader
133140
struct InitExecuteIndirectConstants
134141
{
142+
#if __cplusplus
143+
// Internal counter buffer SRDs
144+
uint32 internalUavSrd[MaxSupportedIndirectCounters][MaxBufferSrdSize];
145+
146+
// Internal acceleration structure tracker buffer SRD.
147+
uint32 accelStructTrackerSrd[MaxBufferSrdSize];
148+
#else
149+
uint4 internalUavSrd[MaxSupportedIndirectCounters][MaxBufferSrdSize / 4];
150+
uint4 accelStructTrackerSrd[MaxBufferSrdSize / 4];
151+
#endif
152+
135153
uint32 inputBytesPerDispatch; // Size of application indirect arguments
136154
uint32 outputBytesPerDispatch; // Size of resulting driver internal arguments
137155
uint32 bindingArgsSize; // Size of binding arguments in the app buffer preceeding the dispatch
@@ -160,18 +178,10 @@ struct InitExecuteIndirectConstants
160178
uint32 counterRayIdRangeBegin; // Counter ray ID range begin
161179
uint32 counterRayIdRangeEnd; // Counter ray ID range end
162180
uint32 cpsBackendStackSize; // Scratch memory used by a compiler backend, start at offset 0
163-
uint32 padding0; // Padding for 16-byte alignment
181+
uint32 cpsFrontendStackSize; // Scratch memory used by IR (Intermediate Representation), for a continuation passing shader
164182

165-
#if __cplusplus
166-
// Internal counter buffer SRDs
167-
uint32 internalUavSrd[MaxSupportedIndirectCounters][MaxBufferSrdSize];
168-
169-
// Internal acceleration structure tracker buffer SRD.
170-
uint32 accelStructTrackerSrd[MaxBufferSrdSize];
171-
#else
172-
uint4 internalUavSrd[MaxSupportedIndirectCounters][MaxBufferSrdSize / 4];
173-
uint4 accelStructTrackerSrd[MaxBufferSrdSize / 4];
174-
#endif
183+
uint32 cpsGlobalMemoryAddressLo; // Separate CPS stack memory base address low 32-bits
184+
uint32 cpsGlobalMemoryAddressHi; // Separate CPS stack memory base address high 32-bits
175185
};
176186

177187
constexpr uint32 InitExecuteIndirectConstantsDw = sizeof(InitExecuteIndirectConstants) / sizeof(uint32);
@@ -184,7 +194,7 @@ static_assert((MaxBufferSrdSize == 4), "Buffer SRD size changed, affected shader
184194
#endif
185195
static_assert((sizeof(InitExecuteIndirectConstants) % sizeof(uint32)) == 0,
186196
"InitExecuteIndirectConstants is not dword-aligned");
187-
}
197+
} // namespace GpuRt
188198
#endif
189199

190200
#endif

src/gpurtBvhBuilder.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1629,7 +1629,7 @@ AccelStructHeader BvhBuilder::InitAccelStructHeader() const
16291629
header.geometryType = static_cast<uint32>(m_buildConfig.geometryType);
16301630
header.uuidLo = Util::LowPart(m_deviceSettings.accelerationStructureUUID);
16311631
header.uuidHi = Util::HighPart(m_deviceSettings.accelerationStructureUUID);
1632-
header.rtIpLevel = uint32(m_pDevice->GetRtIpLevel());
1632+
header.rtIpLevel = static_cast<uint32>(PalToGpuRtIpLevel(m_pDevice->GetRtIpLevel()));
16331633

16341634
if (m_buildConfig.topLevelBuild)
16351635
{
@@ -2313,8 +2313,8 @@ void BvhBuilder::GetAccelerationStructurePrebuildInfo(
23132313
// the build when performing the update causing page faults.
23142314
scratchDataSize = Util::Max(scratchDataSize, updateDataSize);
23152315

2316-
// Some applications crash when the driver reports 0 scratch size. Use 1 instead.
2317-
scratchDataSize = Util::Max(1u, scratchDataSize);
2316+
// Some applications crash when the driver reports 0 scratch size. Use 1 DWORD instead.
2317+
scratchDataSize = Util::Max(static_cast<uint32>(sizeof(uint32)), scratchDataSize);
23182318

23192319
prebuildInfo.scratchDataSizeInBytes = scratchDataSize;
23202320
prebuildInfo.updateScratchDataSizeInBytes = updateDataSize;

src/gpurtDevice.cpp

Lines changed: 43 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -467,16 +467,36 @@ Pal::Result Device::InitializeCpsMemory(
467467
return result;
468468
}
469469

470+
//=====================================================================================================================
471+
// Populates the GPU addresses in the Constant structure
472+
template<typename ConstantsType>
473+
void Device::PatchConstants(ConstantsType* pConstant,
474+
const gpusize cpsMemoryGpuAddr,
475+
const gpusize cpsMemoryBytes)
476+
{
477+
pConstant->cpsGlobalMemoryAddressLo = Util::LowPart(cpsMemoryGpuAddr);
478+
pConstant->cpsGlobalMemoryAddressHi = Util::HighPart(cpsMemoryGpuAddr);
479+
480+
}
481+
470482
//=====================================================================================================================
471483
// Populates the GPU addresses in the DispatchRaysConstants structure
472484
void Device::PatchDispatchRaysConstants(
473485
DispatchRaysConstants* pDispatchRaysConstants,
474486
const gpusize cpsMemoryGpuAddr,
475487
const gpusize cpsMemoryBytes)
476488
{
477-
pDispatchRaysConstants->constData.cpsGlobalMemoryAddressLo = Util::LowPart(cpsMemoryGpuAddr);
478-
pDispatchRaysConstants->constData.cpsGlobalMemoryAddressHi = Util::HighPart(cpsMemoryGpuAddr);
489+
PatchConstants(&pDispatchRaysConstants->constData, cpsMemoryGpuAddr, cpsMemoryBytes);
490+
}
479491

492+
//=====================================================================================================================
493+
// Populates the GPU addresses in the InitExecuteIndirectConstants structure
494+
void Device::PatchInitExecuteIndirectConstants(
495+
GpuRt::InitExecuteIndirectConstants* pInitExecuteIndirectConstants,
496+
const gpusize cpsMemoryGpuAddr,
497+
const gpusize cpsMemoryBytes)
498+
{
499+
PatchConstants(pInitExecuteIndirectConstants, cpsMemoryGpuAddr, cpsMemoryBytes);
480500
}
481501

482502
//=====================================================================================================================
@@ -2125,6 +2145,27 @@ bool Device::ShouldUseGangedAceForBuild(
21252145
return shouldUseGangedAce;
21262146
}
21272147

2148+
// =====================================================================================================================
2149+
uint32 Device::CalculateBvhPrimitiveCount(
2150+
const AccelStructBuildInputs& inputs
2151+
) const
2152+
{
2153+
// For top-level acceleration structure, inputElementCount represents the number of instances
2154+
uint32 primitiveCount = (inputs.type == AccelStructType::TopLevel) ? inputs.inputElemCount : 0;
2155+
2156+
if (inputs.type == AccelStructType::BottomLevel)
2157+
{
2158+
for (uint32 i = 0; i < inputs.inputElemCount; ++i)
2159+
{
2160+
const Geometry geometry = m_clientCb.pfnConvertAccelStructBuildGeometry(inputs, i);
2161+
const uint32 geometryPrimCount = BvhBuilder::GetGeometryPrimCount(geometry);
2162+
primitiveCount += geometryPrimCount;
2163+
}
2164+
}
2165+
2166+
return primitiveCount;
2167+
}
2168+
21282169
// =====================================================================================================================
21292170
const AccelStructBuildInputs Device::OverrideBuildInputs(
21302171
const AccelStructBuildInputs& inputs

src/gpurtInternal.h

Lines changed: 54 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -106,6 +106,42 @@ enum EncodeFlags : uint32
106106
EncodeFlagFusedInstanceNode = 0x00000008,
107107
};
108108

109+
// Values should remain stable for RRA binary-compatibility (PAL equivalents do not guarantee stability)
110+
enum RtIpLevel : uint32
111+
{
112+
RtIpNone = 0x0, ///< The device does not have an RayTracing Ip Level
113+
RtIp1_0 = 0x1, ///< First Implementation of HW RT
114+
RtIp1_1 = 0x2, ///< Added computation of triangle barycentrics into HW
115+
RtIp2_0 = 0x3, ///< Added more Hardware RayTracing features, such as BoxSort, PointerFlag, etc
116+
RtIpReserved = 0x5, ///< Special value, should not be used
117+
};
118+
119+
// =====================================================================================================================
120+
// Convert PAL RtIpLevel values to their GpuRT equivalent
121+
static RtIpLevel PalToGpuRtIpLevel(Pal::RayTracingIpLevel palRtIpLevel)
122+
{
123+
RtIpLevel gpuRtIpLevel = RtIpLevel::RtIpNone;
124+
125+
switch (palRtIpLevel)
126+
{
127+
case Pal::RayTracingIpLevel::RtIp1_0:
128+
gpuRtIpLevel = RtIpLevel::RtIp1_0;
129+
break;
130+
case Pal::RayTracingIpLevel::RtIp1_1:
131+
gpuRtIpLevel = RtIpLevel::RtIp1_1;
132+
break;
133+
case Pal::RayTracingIpLevel::RtIp2_0:
134+
gpuRtIpLevel = RtIpLevel::RtIp2_0;
135+
break;
136+
case Pal::RayTracingIpLevel::None:
137+
default:
138+
gpuRtIpLevel = RtIpLevel::RtIpNone;
139+
break;
140+
}
141+
142+
return gpuRtIpLevel;
143+
}
144+
109145
struct RadixSortConfig
110146
{
111147
uint32 workGroupSize;
@@ -336,13 +372,21 @@ class Device : public IDevice
336372
// @param pDispatchRaysConstants (in/out) Non-null pointer to a DispatchRaysConstants
337373
// @param cpsMemoryGpuAddr (in) GPU address pointing to the beginning of cps memory
338374
// @param cpsMemoryBytes (in) Cps allocated memory size in bytes
339-
//
340-
// @return the required global memory allocation size in bytes
341375
virtual void PatchDispatchRaysConstants(
342376
DispatchRaysConstants* pDispatchRaysConstants,
343377
const gpusize cpsMemoryGpuAddr,
344378
const gpusize cpsMemoryBytes) override;
345379

380+
// Populates the GPU addresses in the InitExecuteIndirectConstants structure
381+
//
382+
// @param pInitExecuteIndirectConstants (in/out) Non-null pointer to a InitExecuteIndirectConstants
383+
// @param cpsMemoryGpuAddr (in) GPU address pointing to the beginning of cps memory
384+
// @param cpsMemoryBytes (in) Cps allocated memory size in bytes
385+
virtual void PatchInitExecuteIndirectConstants(
386+
GpuRt::InitExecuteIndirectConstants* pInitExecuteIndirectConstants,
387+
const gpusize cpsMemoryGpuAddr,
388+
const gpusize cpsMemoryBytes) override;
389+
346390
//
347391
// @param cpsVideoMem [in] Cps video memory
348392
// @param cpsMemoryBytes [in] Cps allocated memory size in bytes
@@ -683,6 +727,8 @@ class Device : public IDevice
683727

684728
virtual bool ShouldUseGangedAceForBuild(const AccelStructBuildInputs& inputs) const override;
685729

730+
virtual uint32 CalculateBvhPrimitiveCount(const AccelStructBuildInputs& inputs) const override;
731+
686732
// Returns size in DWORDs of a typed buffer view SRD
687733
uint32 GetTypedBufferSrdSizeDw() const { return m_typedBufferSrdSizeDw; };
688734

@@ -722,6 +768,12 @@ class Device : public IDevice
722768

723769
virtual ~Device() override;
724770

771+
template<typename ConstantsType>
772+
void PatchConstants(
773+
ConstantsType* pConstant,
774+
const gpusize cpsMemoryGpuAddr,
775+
const gpusize cpsMemoryBytes);
776+
725777
DeviceInitInfo m_info;
726778

727779
Util::GenericAllocatorTracked m_allocator;

src/gpurtTraceSource.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -51,7 +51,7 @@ void AccelStructTraceSource::OnTraceBegin(
5151
if (m_pDevice->AccelStructTrackerGpuAddr() != 0)
5252
{
5353
// Before starting the trace set tracking to enabled.
54-
pCmdBuf->CmdWriteImmediate(Pal::HwPipeBottom, 1, Pal::ImmediateDataWidth::ImmediateData32Bit,
54+
pCmdBuf->CmdWriteImmediate(Pal::PipelineStageBottomOfPipe, 1, Pal::ImmediateDataWidth::ImmediateData32Bit,
5555
m_pDevice->AccelStructTrackerGpuAddr() + offsetof(AccelStructTracker, enabled));
5656
m_pDevice->RaytracingBarrier(pCmdBuf, BarrierFlagSyncPostCpWrite);
5757
}
@@ -67,7 +67,7 @@ void AccelStructTraceSource::OnTraceEnd(
6767
if (m_pDevice->AccelStructTrackerGpuAddr() != 0)
6868
{
6969
// Disable tracking.
70-
pCmdBuf->CmdWriteImmediate(Pal::HwPipeBottom, 0, Pal::ImmediateDataWidth::ImmediateData32Bit,
70+
pCmdBuf->CmdWriteImmediate(Pal::PipelineStageBottomOfPipe, 0, Pal::ImmediateDataWidth::ImmediateData32Bit,
7171
m_pDevice->AccelStructTrackerGpuAddr() + offsetof(AccelStructTracker, enabled));
7272
m_pDevice->RaytracingBarrier(pCmdBuf, BarrierFlagSyncPostCpWrite);
7373
}

src/options.yaml

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -32,12 +32,12 @@ enum CpsCandidatePrimitiveMode:
3232
# Controls how candidate primitives are handled in the continuations (CPS) software Traversal loop.
3333
SuspendLane: # Suspend a lane upon candidate hits and wait for other lanes to end the Traversal loop.
3434
# This is the default. Other modes are experimental and might not be implemented on all RtIps.
35-
SuspendWave: # On each Traversal iteration, check whether any lane has a candidate, and break if so.
36-
# Only implemented for RtIp 2.0, all other cases use SuspendLane.
3735
DeferFirst: # When finding the first candidate, record it and ignore it for the time being. At the end of the
3836
# Traversal loop, process pending candidates. When finding the second candidate, immediately break
3937
# out of the loop to first process the first one.
40-
# Only implemented for triangle primitives on RtIp 2.0, all other cases use SuspendLane.
38+
# Implementation status:
39+
# * RtIp 1.1: Not supported, SuspendLane is always used.
40+
# * RtIp 2.0: DeferFirst is supported, but only for triangle primitives.
4141

4242
# ------------------------------------------------------------------------------------------------------------------
4343
# This is the definition of the single options struct.

src/shaders/BuildBVH.hlsl

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -24,7 +24,7 @@
2424
**********************************************************************************************************************/
2525
#if NO_SHADER_ENTRYPOINT == 0
2626
//=====================================================================================================================
27-
#include "../shared/rayTracingDefs.h"
27+
#include "../shadersClean/common/ShaderDefs.hlsli"
2828

2929
#include "BuildRootSignature.hlsl"
3030

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