Update pal from commit d543c4af

Fix some CodeQL alerts
Do not try query value for empty components
Add Gfxip Major.Minor.Stepping to DbgOverlay
Add instruction timing flag to SqttData chunk
Update submodule address-lib
Refresh chip headers
Restore the hard-coded AsicRevision values
Remove the IsVirtual CP DMA checks
Begin QueueTimings in the PAL Trace preparation phase
Fix SetcutoffSeverityLevel/SetOriginationTypeMask
Fix the random core dump of dEQP-VK.wsi.wayland.swapchain.render.10swapchains2 when enabling zwp_linux_dmabuf_v1_interface
Remove UsesUavs check for DepthOnlyOpt
GpuProfiler forces RequestDebugVMID
Deprecate some unused fields in InheritedStateParams
Tweak handling of PAL Private Pm4Opt key
Support dynamic lds from DynamicSharedPointer
Fix null-pointer access issue
Check for nullptr in case MALLOC fails
Update FileArchiveCacheLayer to fix some race conditions, corruption issues, and inefficiencies
Advertise untypedBufferView separately in srdSizes
Optimize CmdFillMemory
Use Max(...) function instead of a recursive call
Omit the DevDriver overlay if a RGP trace is actively running or if a PALTrace trace is actively running
Disable OREO mode
typedBufferView is bytes, not DWs
Move ShouldUploadUsingDma to Device and Check for Valid Dma Upload Ring
Update submodule devdriver
Enable displayDcc by default except strix1
Update numWorkGroupsReg on a Per-Dispatch Basis
Fix potential memleak in CrashAnalyzer
Add strix1 support

Author: qiaojbao

cmake/PalBuildParameters.cmake

@@ -124,6 +124,16 @@ if (PAL_BUILD_GFX9)
     endif()
 #endif
 
+#if PAL_BUILD_STRIX1
+    pal_bp( PAL_BUILD_STRIX1 OFF MODE "AUTHOR_WARNING"
+            ASIC_CONFIG
+                PAL_BUILD_GFX11
+                PAL_BUILD_GFX115
+                PAL_BUILD_STRIX
+                CHIP_HDR_STRIX1
+          )
+#endif
+
 endif() # PAL_BUILD_GFX9
 
 #if PAL_BUILD_RDF

cmake/PalCompileDefinitions.cmake

@@ -49,6 +49,9 @@ function(pal_compile_definitions_gpu TARGET)
 #if PAL_BUILD_GFX11
         target_compile_definitions(${TARGET} INTERFACE PAL_BUILD_GFX11=$<BOOL:${PAL_BUILD_GFX11}>)
 #endif
+#if PAL_BUILD_GFX115
+        target_compile_definitions(${TARGET} PUBLIC PAL_BUILD_GFX115=$<BOOL:${PAL_BUILD_GFX115}>)
+#endif
 
         # PAL no longer references these defines and our clients must remove their references when upgrading.
         if (PAL_CLIENT_INTERFACE_MAJOR_VERSION LESS 845)
@@ -77,6 +80,16 @@ function(pal_compile_definitions_gpu TARGET)
             target_compile_definitions(${TARGET} INTERFACE PAL_BUILD_PHOENIX2=$<BOOL:${PAL_BUILD_GFX9}>)
         endif()
 
+#if PAL_BUILD_STRIX
+        # Define for ASIC Family and is not associated with a CHIP_HDR
+        target_compile_definitions(${TARGET} PUBLIC PAL_BUILD_STRIX=$<BOOL:${PAL_BUILD_STRIX}>)
+#endif
+
+#if PAL_BUILD_STRIX1
+        target_compile_definitions(${TARGET} PUBLIC PAL_BUILD_STRIX1=$<BOOL:${PAL_BUILD_STRIX1}>)
+        target_compile_definitions(${TARGET} PRIVATE CHIP_HDR_STRIX1=$<BOOL:${CHIP_HDR_STRIX1}>)
+#endif
+
     endif()
 endfunction()
 

cmake/PalOverrides.cmake

@@ -61,5 +61,12 @@ if(PAL_BUILD_GFX9)
     set(PAL_SWD_BUILD_PHX1   ON)
     set(PAL_SWD_BUILD_PHX2   ON)
 
+#if PAL_BUILD_STRIX1
+    set(PAL_SWD_BUILD_STRIX1       ${PAL_BUILD_STRIX1})
+    pal_set_or(ADDR_STRIX_BUILD    ${PAL_BUILD_STRIX1})
+    pal_set_or(ADDR_STRIX1_BUILD   ${PAL_BUILD_STRIX1})
+    pal_set_or(PAL_SWD_BUILD_STRIX ${PAL_BUILD_STRIX1})
+#endif
+
 endif() # PAL_BUILD_GFX9
 

inc/core/g_palPipelineAbiMetadataImpl.h

@@ -432,8 +432,11 @@ inline Result DeserializeEnum(
         case HashLiteralString("_amdgpu_cs_shdr_intrl_tbl"):
             *pValue = Abi::PipelineSymbolType::CsShdrIntrlTblPtr;
             break;
-        case HashLiteralString("_amdgpu_ps_dual_source_shdr_intrl_tbl"):
-            *pValue = Abi::PipelineSymbolType::PsDualSourceShdrIntrlTblPtr;
+        case HashLiteralString("_amdgpu_ps_export_shader_shdr_intrl_tbl"):
+            *pValue = Abi::PipelineSymbolType::PsExportShaderShdrIntrlTblPtr;
+            break;
+        case HashLiteralString("_amdgpu_ps_export_shader_dual_source_shdr_intrl_tbl"):
+            *pValue = Abi::PipelineSymbolType::PsExportShaderDualSourceShdrIntrlTblPtr;
             break;
         case HashLiteralString("_amdgpu_ls_disasm"):
             *pValue = Abi::PipelineSymbolType::LsDisassembly;
@@ -456,8 +459,11 @@ inline Result DeserializeEnum(
         case HashLiteralString("_amdgpu_cs_disasm"):
             *pValue = Abi::PipelineSymbolType::CsDisassembly;
             break;
-        case HashLiteralString("_amdgpu_ps_dual_source_disasm"):
-            *pValue = Abi::PipelineSymbolType::PsDualSourceDisassembly;
+        case HashLiteralString("_amdgpu_ps_export_shader_disasm"):
+            *pValue = Abi::PipelineSymbolType::PsExportShaderDisassembly;
+            break;
+        case HashLiteralString("_amdgpu_ps_export_shader_dual_source_disasm"):
+            *pValue = Abi::PipelineSymbolType::PsExportShaderDualSourceDisassembly;
             break;
         case HashLiteralString("_amdgpu_ls_shdr_intrl_data"):
             *pValue = Abi::PipelineSymbolType::LsShdrIntrlData;
@@ -550,8 +556,11 @@ inline Result SerializeEnum(
     case Abi::PipelineSymbolType::CsShdrIntrlTblPtr:
         pWriter->Pack("_amdgpu_cs_shdr_intrl_tbl");
         break;
-    case Abi::PipelineSymbolType::PsDualSourceShdrIntrlTblPtr:
-        pWriter->Pack("_amdgpu_ps_dual_source_shdr_intrl_tbl");
+    case Abi::PipelineSymbolType::PsExportShaderShdrIntrlTblPtr:
+        pWriter->Pack("_amdgpu_ps_export_shader_shdr_intrl_tbl");
+        break;
+    case Abi::PipelineSymbolType::PsExportShaderDualSourceShdrIntrlTblPtr:
+        pWriter->Pack("_amdgpu_ps_export_shader_dual_source_shdr_intrl_tbl");
         break;
     case Abi::PipelineSymbolType::LsDisassembly:
         pWriter->Pack("_amdgpu_ls_disasm");
@@ -574,8 +583,11 @@ inline Result SerializeEnum(
     case Abi::PipelineSymbolType::CsDisassembly:
         pWriter->Pack("_amdgpu_cs_disasm");
         break;
-    case Abi::PipelineSymbolType::PsDualSourceDisassembly:
-        pWriter->Pack("_amdgpu_ps_dual_source_disasm");
+    case Abi::PipelineSymbolType::PsExportShaderDisassembly:
+        pWriter->Pack("_amdgpu_ps_export_shader_disasm");
+        break;
+    case Abi::PipelineSymbolType::PsExportShaderDualSourceDisassembly:
+        pWriter->Pack("_amdgpu_ps_export_shader_dual_source_disasm");
         break;
     case Abi::PipelineSymbolType::LsShdrIntrlData:
         pWriter->Pack("_amdgpu_ls_shdr_intrl_data");

inc/core/palCmdBuffer.h

@@ -494,12 +494,13 @@ union InheritedStateFlags
 /// Specifies parameters inherited from primary command buffer into nested command buffer.
 struct InheritedStateParams
 {
+#if PAL_CLIENT_INTERFACE_MAJOR_VERSION < 891
     uint32                      colorTargetCount;                            ///< Number of color targets bound in the
                                                                              ///  root-level command buffer.
     SwizzledFormat              colorTargetSwizzledFormats[MaxColorTargets]; ///< Format and swizzle for each color
                                                                              ///  target.
     uint32                      sampleCount[MaxColorTargets];                ///< Sample count for each color target.
-
+#endif
     InheritedStateFlags         stateFlags;                                  ///< States that are inherited from the
                                                                              ///  calling root-level command buffer.
 };

inc/core/palDeveloperHooks.h

@@ -69,6 +69,7 @@ enum class CallbackType : uint32
     BindGpuMemory,          ///< This callback is to inform of a new binding to GPU memory.
     SubAllocGpuMemory,      ///< This callback is to inform of suballocation from base GPU memory allocation.
     SubFreeGpuMemory,       ///< This callback is to inform that GPU memory suballocation has been freed.
+
 #if PAL_DEVELOPER_BUILD
     RpmBlt,                 ///< This callback is to describe the internal RPM blt calls.
 #endif

inc/core/palDevice.h

@@ -626,6 +626,12 @@ struct PalPublicSettings
     /// that currently needs Escape call.
     bool disableEscapeCall;
 
+    /// A hint to the Windows OS that this application has submissions that are expected to run for a long time. This
+    /// tells the OS that checking elapsed execution time is not a good way to judge if the GPU is hung.
+    ///
+    /// If this flag is set, Windows shouldn't TDR long submissions on uncontested hardware queues. Submissions on
+    /// contested queues must preempt within the time limit to avoid a TDR. Setting this may also extend the TDR timer
+    /// on compute queues.
     bool longRunningSubmissions;
 
     /// Disables MCBP on demand. This is a temporary setting until ATOMIC_MEM packet issue with MCBP is resolved.
@@ -1420,19 +1426,29 @@ struct DeviceProperties
 
         struct
         {
-            uint32 bufferView;  ///< Size in bytes (and required alignment) of a buffer view SRD.
-                                ///  @see IDevice::CreateTypedBufferViewSrds() and CreateUntypedBufferViewSrds().
-            uint32 imageView;   ///< Size in bytes (and required alignment) of an image view SRD.
-                                ///  @see IDevice::CreateImageViewSrds().
-            uint32 fmaskView;   ///< Size in bytes (and required alignment) of an fmask view SRD.
-                                ///  @see IDevice::CreateFmaskViewSrds().  This value can be zero to denote
-                                ///  a lack of fMask support.
-            uint32 sampler;     ///< Size in bytes (and required alignment) of a sampler SRD.
-                                ///  @see IDevice::CreateSamplerSrds().
-            uint32 bvh;         ///< Size in bytes (and required alignment) of a BVH SRD
-                                ///  Will be zero if HW doesn't support ray-tracing capabilities.
-                                ///  @see IDevice::CreateBvhSrds().
-        } srdSizes;             ///< Sizes for various types of _shader resource descriptor_ (SRD).
+#if PAL_CLIENT_INTERFACE_MAJOR_VERSION < 892
+            union
+            {
+                uint32 bufferView;
+#endif
+                uint32 typedBufferView; ///< Size in bytes (and required alignment) of a typed buffer view SRD.
+                                        ///  @see IDevice::CreateTypedBufferViewSrds().
+#if PAL_CLIENT_INTERFACE_MAJOR_VERSION < 892
+            };
+#endif
+            uint32 untypedBufferView;  ///< Size in bytes (and required alignment) of a untyped buffer view SRD.
+                                       ///  @see IDevice::CreateUntypedBufferViewSrds().
+            uint32 imageView;          ///< Size in bytes (and required alignment) of an image view SRD.
+                                       ///  @see IDevice::CreateImageViewSrds().
+            uint32 fmaskView;          ///< Size in bytes (and required alignment) of an fmask view SRD.
+                                       ///  @see IDevice::CreateFmaskViewSrds().  This value can be zero to denote
+                                       ///  a lack of fMask support.
+            uint32 sampler;            ///< Size in bytes (and required alignment) of a sampler SRD.
+                                       ///  @see IDevice::CreateSamplerSrds().
+            uint32 bvh;                ///< Size in bytes (and required alignment) of a BVH SRD
+                                       ///  Will be zero if HW doesn't support ray-tracing capabilities.
+                                       ///  @see IDevice::CreateBvhSrds().
+        } srdSizes;                    ///< Sizes for various types of _shader resource descriptor_ (SRD).
 
         struct
         {
@@ -4097,8 +4113,8 @@ class IDevice
 
     /// Creates one or more typed buffer view _shader resource descriptors (SRDs)_ in memory provided by the client.
     ///
-    /// The client is responsible for providing _count_ times the amount of memory reported by srdSizes.bufferView in
-    /// DeviceProperties, and must also ensure the provided memory is aligned to the size of one SRD.
+    /// The client is responsible for providing _count_ times the amount of memory reported by srdSizes.typedBufferView
+    /// in DeviceProperties, and must also ensure the provided memory is aligned to the size of one SRD.
     ///
     /// The SRD can be created in either system memory or pre-mapped GPU memory.  If updating GPU memory, the client
     /// must ensure there are no GPU accesses of this memory in flight before calling this method.
@@ -4131,8 +4147,8 @@ class IDevice
     /// Creates one or more untyped buffer view _shader resource descriptors (SRDs)_ in memory provided by the client.
     /// These SRDs can be accessed in a shader as either _raw_ or _structured_ views.
     ///
-    /// The client is responsible for providing _count_ times the amount of memory reported by srdSizes.bufferView in
-    /// DeviceProperties, and must also ensure the provided memory is aligned to the size of one SRD.
+    /// The client is responsible for providing _count_ times the amount of memory reported by srdSizes.untypedBufferView
+    /// in DeviceProperties, and must also ensure the provided memory is aligned to the size of one SRD.
     ///
     /// The SRD can be created in either system memory or pre-mapped GPU memory.  If updating GPU memory, the client
     /// must ensure there are no GPU accesses of this memory in flight before calling this method.

inc/core/palGpuMemory.h

@@ -567,11 +567,10 @@ class IGpuMemory : public IDestroyable
     /// Makes the GPU memory available for CPU access and gives the client a pointer to reference it.
     ///
     /// The allocation should be unmapped by the client once CPU access is complete, although it _is_ legal to keep an
-    /// allocation mapped while the GPU references the allocation from a command buffer.  The allocation must be
-    /// unmapped before it is destroyed.
+    /// allocation mapped while the GPU references the allocation from a command buffer.
     ///
-    /// It is illegal to map the allocation multiple times concurrently.  Mapping is not available for pinned or virtual
-    /// memory objects.  This call is not thread safe for calls referencing this memory object.
+    /// It is legal to map the allocation multiple times concurrently.  Mapping is not available for pinned or virtual
+    /// memory objects.  This call is thread safe for calls referencing this memory object.
     ///
     /// @see Unmap.
     ///
@@ -589,7 +588,7 @@ class IGpuMemory : public IDestroyable
 
     /// Removes CPU access from a previously mapped GPU memory object.
     ///
-    /// This call is not thread safe for calls referencing the same memory object.
+    /// This call is thread safe for calls referencing the same memory object.
     ///
     /// @see Map
     ///

inc/core/palHsaAbiMetadata.h

@@ -70,7 +70,8 @@ enum class ValueKind : uint32
     HiddenRemainderY,       ///< Dispatch workgroup size of the partial work group of the Y dimension, if it exists.
     HiddenRemainderZ,       ///< Dispatch workgroup size of the partial work group of the Z dimension, if it exists.
     HiddenGridDims,         ///< Dispatch grid dimensionality, value between 1 and 3
-    HiddenHeapV1            ///< Global address pointer to an initialized memory buffer for device side malloc/free
+    HiddenHeapV1,           ///< Global address pointer to an initialized memory buffer for device side malloc/free
+    HiddenDynamicLdsSize    ///< Size of the dynamically allocated LDS memory is passed in the kernarg.
 };
 
 /// An enum of the legal ".address_space" strings.
@@ -207,7 +208,7 @@ class CodeObjectMetadata final
     uint32 GroupSegmentFixedSize() const { return m_groupSegmentFixedSize; }
 
     /// Returns the amount of fixed private address space memory (scratch) required by a work-item in bytes.
-    uint32 PrivateSegmentFixedSize() const { return m_privateSegmentFixedSize; }
+    uint32 PrivateSegmentFixedSize() const;
 
     uint32 UniformWorkgroupSize() const { return m_uniformWorkgroupSize; }
 

inc/core/palLib.h

@@ -47,7 +47,7 @@
 #endif
 ///
 /// @ingroup LibInit
-#define PAL_INTERFACE_MAJOR_VERSION 890
+#define PAL_INTERFACE_MAJOR_VERSION 892
 
 #if PAL_CLIENT_INTERFACE_MAJOR_VERSION < 831
 /// Minor interface version.  Note that the interface version is distinct from the PAL version itself, which is returned
@@ -126,6 +126,9 @@ enum class NullGpuId : uint32
     Navi33,        ///< 11.0.2
     Phoenix1,      ///< 11.0.3
     Phoenix2,      ///< 11.0.3
+#if PAL_BUILD_STRIX1
+    Strix1,        ///< 11.5.0
+#endif
 #if  (PAL_CLIENT_INTERFACE_MAJOR_VERSION>= 888)
 #endif
     Max,           ///< The maximum count of null devices.
@@ -147,6 +150,9 @@ enum class GfxIpLevel : uint32
     GfxIp10_1,     ///< GFXIP 10.1 (Navi1x)
     GfxIp10_3,     ///< GFXIP 10.3 (Navi2x, Rembrandt, Raphael, Mendocino)
     GfxIp11_0,     ///< GFXIP 11.0 (Navi3x, Phoenix)
+#if PAL_BUILD_GFX115
+    GfxIp11_5,     ///< GFXIP 11.5 (Strix)
+#endif
 #else // PAL_CLIENT_INTERFACE_MAJOR_VERSION >= 888
     GfxIp6    = 0x1,
     GfxIp7    = 0x2,
@@ -156,58 +162,64 @@ enum class GfxIpLevel : uint32
     GfxIp10_1 = 0x7,
     GfxIp10_3 = 0x9,
     GfxIp11_0 = 0xC,
+#if PAL_BUILD_GFX115
+    GfxIp11_5 = 0xF,
+#endif
 #endif
 };
 
-/// Specifies the hardware revision.  Enumerations are in family order (Southern Islands, Sea Islands, Kaveri,
-/// Carrizo, Volcanic Islands, etc.)
+/// Specifies the hardware revision. Some AMD tools hard-code these values so we cannot change them. New ASICs should
+/// be added at the end of the list and be given the next highest value.
 enum class AsicRevision : uint32
 {
-    Unknown = 0,
+    Unknown          = 0x00,
 #if PAL_CLIENT_INTERFACE_MAJOR_VERSION < 888
-    Tahiti,
-    Pitcairn,
-    Capeverde,
-    Oland,
-    Hainan,
-    Bonaire,
-    Hawaii,
-    HawaiiPro,
-    Kalindi,
-    Godavari,
-    Spectre,
-    Spooky,
-    Carrizo,
-    Bristol,
-    Stoney,
-    Iceland,
-    Tonga,
-    TongaPro = Tonga,
-    Fiji,
-    Polaris10,
-    Polaris11,
-    Polaris12,
-    Vega10,
-    Vega12,
-    Vega20,
-    Raven,
-    Raven2,
-    Renoir,
+    Tahiti           = 0x01,
+    Pitcairn         = 0x02,
+    Capeverde        = 0x03,
+    Oland            = 0x04,
+    Hainan           = 0x05,
+    Bonaire          = 0x06,
+    Hawaii           = 0x07,
+    HawaiiPro        = 0x08,
+    Kalindi          = 0x0A,
+    Godavari         = 0x0B,
+    Spectre          = 0x0C,
+    Spooky           = 0x0D,
+    Carrizo          = 0x0E,
+    Bristol          = 0x0F,
+    Stoney           = 0x10,
+    Iceland          = 0x11,
+    Tonga            = 0x12,
+    TongaPro         = Tonga,
+    Fiji             = 0x13,
+    Polaris10        = 0x14,
+    Polaris11        = 0x15,
+    Polaris12        = 0x16,
+    Vega10           = 0x18,
+    Vega12           = 0x19,
+    Vega20           = 0x1A,
+    Raven            = 0x1B,
+    Raven2           = 0x1C,
+    Renoir           = 0x1D,
 #endif
-    Navi10,        ///< 10.1.0
-    Navi12,        ///< 10.1.1
-    Navi14,        ///< 10.1.2
-    Navi21,        ///< 10.3.0
-    Navi22,        ///< 10.3.1
-    Navi23,        ///< 10.3.2
-    Navi24,        ///< 10.3.4
-    Rembrandt,     ///< 10.3.5
-    Raphael,       ///< 10.3.6
-    Navi31,        ///< 11.0.0
-    Navi32,        ///< 11.0.1
-    Navi33,        ///< 11.0.2
-    Phoenix1,      ///< 11.0.3
-    Phoenix2,      ///< 11.0.3
+    Navi10           = 0x1F, ///< 10.1.0
+    Navi12           = 0x21, ///< 10.1.1
+    Navi14           = 0x23, ///< 10.1.2
+    Navi21           = 0x24, ///< 10.3.0
+    Navi22           = 0x25, ///< 10.3.1
+    Navi23           = 0x26, ///< 10.3.2
+    Navi24           = 0x27, ///< 10.3.4
+    Navi31           = 0x2C, ///< 11.0.0
+    Navi32           = 0x2D, ///< 11.0.1
+    Navi33           = 0x2E, ///< 11.0.2
+    Rembrandt        = 0x2F, ///< 10.3.5
+#if PAL_BUILD_STRIX1
+    Strix1           = 0x33, ///< 11.5.0
+#endif
+    Raphael          = 0x34, ///< 10.3.6
+    Phoenix1         = 0x35, ///< 11.0.3
+    Phoenix2         = 0x38, ///< 11.0.3
 };
 
 /// Maps a null GPU ID to its associated text name.