How are DACs and ADC are implemented?

[matifali]

I am confused about how DACs and ADCs are implemented in aihwkit. I am specifically interested in the scaling and clipping of inputs/outputs.

A real DAC would have a fixed max voltage range, e.g., it can convert an 8-bit number to a [-5, 5] volts range. And then, these voltages will be multiplied by the conductance matrix, giving us an output current. That current needs to be converted to a digital number again to be passed to the non-linearity implemented in digital.

How is this managed in aihwkit? I could not find any docs on this except a single paragraph (para 2) here

[maljoras]

Hi @matifali, correct we also use a fixed ADC range which is governed by forward.out_bound. The input range of the DAC is fixed in -1 to 1 and a (learnable) or dynamically adjusted input scale scales the input into that range. The weights and inputs are in normalized units so the output bound is in relation to that. Then there exist a digital scale at the output to convert the ADC ticks back to a FP range.

[maljoras]

You can also take a look at the description in this paper Section III. D (Configurable MVM nonidealities)