MSL backend reorders an aliasing PhysicalStorageBuffer load after a store

[abhinavsns]

Reproduced on SPIRV-Cross main at 6c09849.

Description

A compute shader loads 7 through one PhysicalStorageBuffer pointer, stores 99 through another pointer, then writes the loaded value to an output. The two pointers contain the same address at runtime.
SPIRV-Cross moves the load after the store:
*alias = 99u;
*output = *source;
The output is therefore 99 instead of 7.
The pointers are direct SSA results of separate OpConvertUToPtr instructions. According to the SPIR-V aliasing rules, a consumer cannot assume that memory reached through non-memory-object declarations does not overlap.

Steps to reproduce

git clone https://github.com/abhinavsns/MoltenVK-pointer-Issue.git
cd MoltenVK-pointer-Issue

spirv-as --target-env vulkan1.2 \
  spirv/physical_load_direct.spvasm \
  -o physical_load_direct.spv

spirv-val --target-env vulkan1.2 physical_load_direct.spv

spirv-cross physical_load_direct.spv \
  --msl --msl-version 23000

Expected MSL

uint loaded = *source;
*alias = 99u;
*output = loaded;

Actual MSL

*alias = 99u;
*output = *source;

An AliasedPointer control preserves the required order. The failing module is physical_load_direct.spvasm.