Makefile

# Root Makefile for AND Gate Project

# Subdirectories
SUBDIRS = iverilog_pure iverilog_vpitb myhdl verilator verilator_manualtb vpi_iverilogtb \
          dpi-c_verilator dpi-c_verilatortb ghdl_IEEE ghdl_c_IEEE verilator_impl_iverilogtb \
          ghdl_verilator_driver cxxrtl cxxrtl_impl_iverilogtb \
          verilator_impl_cxxrtltb cxxrtl_impl_verilatortb amaranth_cocotb \
          amaranth_sim amaranth_extsim xilinx_synth xilinx_synth_sim

# Phony targets
.PHONY: all clean $(SUBDIRS) build run

# Default target
all: build

# Build target
build: $(SUBDIRS)

# Build each subdirectory
$(SUBDIRS):
	@echo "Building $@..."
	@$(MAKE) -C $@

# Clean all subdirectories
clean:
	@for dir in $(SUBDIRS); do \
		echo "Cleaning $$dir..."; \
		$(MAKE) -C $$dir clean; \
	done

# Run targets for each implementation
run_iverilog_pure:
	@$(MAKE) -C iverilog_pure

run_iverilog_vpitb:
	@$(MAKE) -C iverilog_vpitb

run_myhdl:
	@$(MAKE) -C myhdl

run_verilator:
	@$(MAKE) -C verilator
run_verilator_ghdltb:
	@$(MAKE) -C verilator_ghdltb


run_verilator_manualtb:
	@$(MAKE) -C verilator_manualtb


run_vpi_iverilogtb:
	@$(MAKE) -C vpi_iverilogtb

run_dpi-c_verilator:
	@$(MAKE) -C dpi-c_verilator

run_dpi-c_verilatortb:
	@$(MAKE) -C dpi-c_verilatortb

run_ghdl_IEEE:
	@$(MAKE) -C ghdl_IEEE

run_ghdl_c_IEEE:
	@$(MAKE) -C ghdl_c_IEEE

run_ghdl_verilator_driver:
	@$(MAKE) -C ghdl_verilator_driver all
	@$(MAKE) -C ghdl_verilator_driver run

run_verilator_impl_iverilogtb:
	@$(MAKE) -C verilator_impl_iverilogtb

run_cxxrtl:
	@$(MAKE) -C cxxrtl

run_cxxrtl_impl_iverilogtb:
	@$(MAKE) -C cxxrtl_impl_iverilogtb

run_verilator_impl_cxxrtltb:
	@$(MAKE) -C verilator_impl_cxxrtltb

run_cxxrtl_impl_verilatortb:
	@$(MAKE) -C cxxrtl_impl_verilatortb
run_amaranth_cocotb:
	@$(MAKE) -C amaranth_cocotb
run_amaranth_sim:
	@$(MAKE) -C amaranth_sim
run_amaranth_extsim:
	@$(MAKE) -C amaranth_extsim
run_xilinx_synth:
	@$(MAKE) -C xilinx_synth
run_xilinx_synth_sim:
	@$(MAKE) -C xilinx_synth_sim

# Run all implementations
run: run_iverilog_pure run_iverilog_vpitb run_myhdl run_verilator run_verilator_manualtb \
     run_vpi_iverilogtb run_dpi-c_verilator run_dpi-c_verilatortb \
     run_ghdl_IEEE run_ghdl_c_IEEE run_verilator_impl_iverilogtb run_verilator_ghdltb \
     run_ghdl_verilator_driver run_cxxrtl run_cxxrtl_impl_iverilogtb \
     run_verilator_impl_cxxrtltb run_cxxrtl_impl_verilatortb run_amaranth_cocotb \
     run_amaranth_sim run_amaranth_extsim run_xilinx_synth run_xilinx_synth_sim

# Help target
help:
	@echo "Available targets:"
	@echo "  all                      - Alias for 'build'"
	@echo "  build                    - Build all implementations"
	@echo "  clean                    - Clean all implementations"
	@echo "  run                      - Run all implementations"
	@echo "  run_iverilog_pure        - Run Icarus Verilog pure implementation"
	@echo "  run_iverilog_vpitb       - Run Icarus Verilog with VPI testbench"
	@echo "  run_myhdl                - Run MyHDL implementation"
	@echo "  run_verilator_ghdltb     - Run Verilator+GHDL DPI testbench"
	@echo "  run_verilator            - Run Verilator implementation"
	@echo "  run_verilator_manualtb   - Run Verilator with manual testbench"
	@echo "  run_vpi_iverilogtb       - Run VPI with Icarus Verilog testbench"
	@echo "  run_dpi-c_verilator      - Run Verilator with DPI-C implementation"
	@echo "  run_dpi-c_verilatortb    - Run Verilator with DPI-C testbench"
	@echo "  run_ghdl_IEEE            - Run GHDL IEEE implementation"
	@echo "  run_ghdl_c_IEEE          - Run GHDL with C interface IEEE implementation"
	@echo "  run_ghdl_verilator_driver - Run GHDL and Verilator with VHPIDIRECT and DPI-C"
	@echo "  run_verilator_impl_iverilogtb - Run Verilator implementation with Icarus Verilog VPI testbench"
	@echo "  run_cxxrtl               - Run CXXRTL (Yosys backend) implementation"
	@echo "  run_cxxrtl_impl_iverilogtb - Run CXXRTL implementation with Icarus Verilog VPI testbench"
	@echo "  run_verilator_impl_cxxrtltb - Run Verilator DUT with CXXRTL reference (C++ cosim)"
	@echo "  run_cxxrtl_impl_verilatortb - Run CXXRTL DUT with Verilator reference (C++ cosim)"
	@echo "  run_amaranth_cocotb    - Run Amaranth design with Cocotb testbench"
	@echo "  run_amaranth_sim       - Run Amaranth pure simulator testbench"
	@echo "  run_amaranth_extsim    - Run Amaranth simulator with external backend hooks"
	@echo "  run_xilinx_synth       - Run Yosys synth-only flow for Xilinx"
	@echo "  run_xilinx_synth_sim   - Run Icarus Verilog on Xilinx synth netlist"
	@echo "  help                     - Show this help message"