A Defect in the Simulation of Transistors #39
Description
One of my classmates developed an OR gate and an AND gate with a single pair of transistors separately in logisim. However, this design is impractical because the output voltage is lower than the input voltage, which can lead to signal degradation in practice. It seems that Logisim considers logic high input voltages above the power supply level and logic low input voltages below ground, resulting in inconsistent behavior.