Skip to content

Commit 156940c

Browse files
LonelyGuy-SE1LonelyGuy-SE1
committed
docs update
1 parent f1bc138 commit 156940c

3 files changed

Lines changed: 78 additions & 53 deletions

File tree

‎Readme.md‎

Lines changed: 69 additions & 52 deletions
Original file line numberDiff line numberDiff line change
@@ -1,52 +1,69 @@
1-
# Project Raijin-LOB
2-
3-
**Task-Aligned Latent Inference of Regime-Dependent Liquidity Manifolds**
4-
5-
Project Raijin-LOB aims to provide a high-fidelity latent representation of limit order book dynamics under structured interventional evaluations. Operating as a task-aligned latent inference engine, it hybridizes a bare-metal, cache-aligned C++ microstructure simulator driven by multivariate Hawkes processes and held-out families of strategically adaptive agent policies with a regime-conditioned Joint-Embedding Predictive Architecture.
6-
7-
To reduce entanglement between macro-state and transient microstructure, the model factorizes the latent space into regime and micro components, enforcing regime-invariance on the micro-state via Variance-Invariance-Covariance Regularization (VICReg) with controlled weighting, while encouraging separation through strict orthogonality constraints. Discontinuities are explicitly mapped via event-centric batching and contrastive boundary objectives defined around detected liquidity cliffs (e.g., thresholded spread expansions and queue depletion rates).
8-
9-
Rather than relying on direct autoregressive tick prediction, the architecture learns task-aligned latent transitions to support structured interventions, evaluating parameterized meta-orders in terms of impact response, fill probability, and adverse selection. To aggressively mitigate simulator-induced leakage, training and evaluation are strictly separated across out-of-distribution (OOD) agent policy classes and perturbed market regimes, with performance reported as statistically significant improvements over queue-reactive baselines.
10-
11-
Technical documentation:
12-
13-
> [docs site](https://lonelyguy-se1.github.io/Raijin-LOB/) (source in `docs/`)
14-
15-
## Phase 1 Benchmark Results
16-
17-
Linux CI, AMD EPYC 9V74, median of 3 runs, Release build with LTO.
18-
19-
| Benchmark | Time (ns) | Throughput (M/s) |
20-
|---|---|---|
21-
| BM_BestBidAsk | 0.35 | 5,660 |
22-
| BM_Compare_Arka_AddNoMatch | 41.3 | 24.2 |
23-
| BM_Compare_Arka_CancelOnly | 33.8 | 29.6 |
24-
| BM_Compare_Arka_MatchOneLevel | 37.4 | 26.7 |
25-
| BM_Compare_Arka_MatchWithReceipts | 38.0 | 26.3 |
26-
| BM_Compare_NanoMatch_MixedAdd | 52.2 | 19.1 |
27-
| BM_MultiLevelSweep (5-level) | 82.5 | 12.1 |
28-
| BM_MatchThroughTombstones/0 | 37.8 | 26.5 |
29-
| BM_MatchThroughTombstones/64 | 112 | 8.9 |
30-
| BM_MatchThroughTombstones/256 | 345 | 2.9 |
31-
| BM_RandomAdd | 61.6 | 16.2 |
32-
| BM_RandomCancel | 48.3 | 20.7 |
33-
| BM_RandomMatch | 62.2 | 16.1 |
34-
| BM_ReplaySynthetic (1M msgs) | - | 28.6M msgs/sec |
35-
36-
Latency histograms (CPU cycles):
37-
38-
| Benchmark | p50 | p90 | p99 |
39-
|---|---|---|---|
40-
| AddNoMatch (random IDs) | 130 | 208 | 468 |
41-
| Cancel (random IDs) | 78 | 208 | 520 |
42-
| MatchOneLevel | 78 | 78 | 78 |
43-
| MatchWithReceipts | 78 | 78 | 104 |
44-
| TombstoneMatch/256 | 884 | 910 | 910 |
45-
46-
See CI job summaries for full benchmark output with statistical detail.
47-
48-
> [Benchmarks and perf data](https://lonelyguy-se1.github.io/Raijin-LOB/benchmarks.html)
49-
50-
## License
51-
52-
This project is licensed under the GNU General Public License v3.0. See [LICENSE](LICENSE) for details.
1+
<p align="center">
2+
<pre>
3+
██████╗ ██╗██╗ ███████╗██╗ ██████╗
4+
██╔═══██╗██║██║ ██╔════╝██║██╔════╝
5+
██║ ██║██║██║ █████╗ ██║██║ ███╗
6+
██║ ██║██║██║ ██╔══╝ ██║██║ ██║
7+
╚██████╔╝██║███████╗██║ ██║╚██████╔╝
8+
╚═════╝ ╚═╝╚══════╝╚═╝ ╚═╝ ╚═════╝
9+
</pre>
10+
</p>
11+
12+
<p align="center">
13+
<img src="https://img.shields.io/badge/C%2B%2B-20-00599C?style=for-the-badge&logo=cplusplus&logoColor=white" />
14+
<img src="https://img.shields.io/badge/Linux-GCC%20%7C%20Clang-fcc624?style=for-the-badge&logo=linux&logoColor=white" />
15+
<img src="https://img.shields.io/badge/License-GPLv3-22c55e?style=for-the-badge" />
16+
<img src="https://img.shields.io/badge/CI-GitHub%20Actions-2088ff?style=for-the-badge&logo=githubactions&logoColor=white" />
17+
<img src="https://img.shields.io/badge/Docs-GitHub%20Pages-4a90d9?style=for-the-badge&logo=githubpages&logoColor=white" />
18+
</p>
19+
20+
<p align="center">
21+
<strong>Production-grade limit order book core feeding a JEPA world model for market microstructure.</strong>
22+
</p>
23+
24+
---
25+
26+
Project Raijin-LOB aims to provide a high-fidelity latent representation of limit order book dynamics under structured interventional evaluations. Operating as a task-aligned latent inference engine, it hybridizes a bare-metal, cache-aligned C++ microstructure simulator driven by multivariate Hawkes processes and held-out families of strategically adaptive agent policies with a regime-conditioned Joint-Embedding Predictive Architecture.
27+
28+
To reduce entanglement between macro-state and transient microstructure, the model factorizes the latent space into regime and micro components, enforcing regime-invariance on the micro-state via Variance-Invariance-Covariance Regularization (VICReg) with controlled weighting, while encouraging separation through strict orthogonality constraints. Discontinuities are explicitly mapped via event-centric batching and contrastive boundary objectives defined around detected liquidity cliffs (e.g., thresholded spread expansions and queue depletion rates).
29+
30+
Rather than relying on direct autoregressive tick prediction, the architecture learns task-aligned latent transitions to support structured interventions, evaluating parameterized meta-orders in terms of impact response, fill probability, and adverse selection. To aggressively mitigate simulator-induced leakage, training and evaluation are strictly separated across out-of-distribution (OOD) agent policy classes and perturbed market regimes, with performance reported as statistically significant improvements over queue-reactive baselines.
31+
32+
> [Technical documentation](https://lonelyguy-se1.github.io/Raijin-LOB/)
33+
34+
> [Benchmarks and perf data](https://lonelyguy-se1.github.io/Raijin-LOB/benchmarks.html)
35+
36+
## Phase 1 Benchmark Results
37+
38+
Linux CI, AMD EPYC 9V74, median of 3 runs, Release build with LTO.
39+
40+
| Benchmark | Time (ns) | Throughput (M/s) |
41+
|---|---|---|
42+
| BM_BestBidAsk | 0.35 | 5,660 |
43+
| BM_Compare_Arka_AddNoMatch | 41.3 | 24.2 |
44+
| BM_Compare_Arka_CancelOnly | 33.8 | 29.6 |
45+
| BM_Compare_Arka_MatchOneLevel | 37.4 | 26.7 |
46+
| BM_Compare_Arka_MatchWithReceipts | 38.0 | 26.3 |
47+
| BM_Compare_NanoMatch_MixedAdd | 52.2 | 19.1 |
48+
| BM_MultiLevelSweep (5-level) | 82.5 | 12.1 |
49+
| BM_MatchThroughTombstones/0 | 37.8 | 26.5 |
50+
| BM_MatchThroughTombstones/64 | 112 | 8.9 |
51+
| BM_MatchThroughTombstones/256 | 345 | 2.9 |
52+
| BM_RandomAdd | 61.6 | 16.2 |
53+
| BM_RandomCancel | 48.3 | 20.7 |
54+
| BM_RandomMatch | 62.2 | 16.1 |
55+
| BM_ReplaySynthetic (1M msgs) | - | 28.6M msgs/sec |
56+
57+
Latency histograms (CPU cycles):
58+
59+
| Benchmark | p50 | p90 | p99 |
60+
|---|---|---|---|
61+
| AddNoMatch (random IDs) | 130 | 208 | 468 |
62+
| Cancel (random IDs) | 78 | 208 | 520 |
63+
| MatchOneLevel | 78 | 78 | 78 |
64+
| MatchWithReceipts | 78 | 78 | 104 |
65+
| TombstoneMatch/256 | 884 | 910 | 910 |
66+
67+
## License
68+
69+
Licensed under the GNU General Public License v3.0. See [LICENSE](LICENSE) for details.

‎docs/_config.yml‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
title: Raijin
2-
description: Limit order book core: technical reference
2+
description: "Limit order book core - technical reference"
33
remote_theme: just-the-docs/just-the-docs
44

55
color_scheme: autumn

‎docs/index.md‎

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,14 @@ permalink: /
88

99
# Raijin
1010

11+
<p align="center">
12+
<img src="https://img.shields.io/badge/C%2B%2B-20-00599C?style=for-the-badge&logo=cplusplus&logoColor=white" />
13+
<img src="https://img.shields.io/badge/Linux-GCC%20%7C%20Clang-fcc624?style=for-the-badge&logo=linux&logoColor=white" />
14+
<img src="https://img.shields.io/badge/License-GPLv3-22c55e?style=for-the-badge" />
15+
<img src="https://img.shields.io/badge/CI-GitHub%20Actions-2088ff?style=for-the-badge&logo=githubactions&logoColor=white" />
16+
<img src="https://img.shields.io/badge/Docs-GitHub%20Pages-4a90d9?style=for-the-badge&logo=githubpages&logoColor=white" />
17+
</p>
18+
1119
C++20 limit order book with config-owned dimensions, generational order pools, per-tick FIFO queues, and optional SPSC execution receipts.
1220

1321
## Quick start

0 commit comments

Comments
 (0)