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LouDnlLouDnl
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Init read/write chipconfig
1 parent 6bef29e commit 4444d36

2 files changed

Lines changed: 102 additions & 33 deletions

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‎src/sid_cloneconfig.c‎

Lines changed: 100 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -41,6 +41,8 @@
4141

4242

4343
/* Init local variables */
44+
static volatile bool read_config = false;
45+
static uint8_t * chip_config = NULL;
4446
static uint8_t skpico_config[64] = {0xff};
4547
static uint8_t skpico_version_result[32] = {0xff};
4648
static char skpico_version[32] = {0};
@@ -94,13 +96,15 @@ static void print_fpgasid_sidconfig(int slot, int sidno, uint8_t * configarray)
9496
void read_fpgasid_configuration(uint8_t base_address)
9597
{
9698
if ((usbsid_config.socketOne.chiptype != CHIP_FPGASID) && (usbsid_config.socketTwo.chiptype != CHIP_FPGASID)) {
97-
usERR("No FPGASID configured, socketOne: %s (%d) socketTwo: %s (%d)\n",
98-
chip_type_name((int)usbsid_config.socketOne.chiptype), usbsid_config.socketOne.chiptype,
99-
chip_type_name((int)usbsid_config.socketTwo.chiptype), usbsid_config.socketTwo.chiptype
100-
);
99+
usERR("No FPGASID configured, socketOne: %s (%d) socketTwo: %s (%d)\n",
100+
chip_type_name((int)usbsid_config.socketOne.chiptype), usbsid_config.socketOne.chiptype,
101+
chip_type_name((int)usbsid_config.socketTwo.chiptype), usbsid_config.socketTwo.chiptype
102+
);
101103
return; /* Do nothing if no FPGASID configured */
102104
}
105+
103106
static uint8_t idHi, idLo, cpld, fpga, pca, select_pins, idxa, idxb, flta, fltb;
107+
static uint16_t frequency_r;
104108
static float frequency = 0.0;
105109
static uint8_t unique_id[8];
106110
static uint8_t sid_one_a[3];
@@ -151,6 +155,7 @@ void read_fpgasid_configuration(uint8_t base_address)
151155
for (int i = 0; i < 10; i++) {
152156
frequency += cycled_read_operation((0x0C + base_address), 4); /* Read Ø2 frequency */
153157
}
158+
frequency_r = (uint16_t)frequency; // assign for readback
154159
frequency /= 10; // 10 reads
155160
frequency *= 12.5; // kHz
156161
frequency /= 1000; // to uS
@@ -159,35 +164,59 @@ void read_fpgasid_configuration(uint8_t base_address)
159164
cycled_write_operation((0x19 + base_address), 0x0, 6); /* Clear magic cookie Hi */
160165
cycled_write_operation((0x1A + base_address), 0x0, 6); /* Clear magic cookie Lo */
161166

162-
usCFG("FPGASID Diagnostic result:\n");
163-
usCFG(" Identifier: %04X (FPGASID)\n", fpgasid_id);
164-
usCFG(" CPLD Revision: %02X\n", cpld);
165-
usCFG(" FPGA Revision: %02X\n", fpga);
166-
usCFG(" PCA Revision: %02X\n", pca);
167-
usCFG(" Unique identifier: %02X%02X%02X%02X%02X%02X%02X%02X\n",
168-
unique_id[0], unique_id[1], unique_id[2], unique_id[3],
169-
unique_id[4], unique_id[5], unique_id[6], unique_id[7]);
170-
usCFG(" Clock frequency: %.3fμs\n", frequency);
171-
usCFG(" Select pins: %02X\n", select_pins);
172-
usCFG(" Index config A: %02X\n", idxa);
173-
usCFG(" SID 1 A: %02X%02X%02X\n",
174-
sid_one_a[0], sid_one_a[1], sid_one_a[2]);
175-
usCFG(" SID 2 A: %02X%02X%02X\n",
176-
sid_two_a[0], sid_two_a[1], sid_two_a[2]);
177-
usCFG(" Filterbias A\n");
178-
usCFG(" SID1/SID2: %02x\n", flta);
179-
usCFG(" Index config B: %02X\n", idxb);
180-
usCFG(" SID 1 B: %02X%02X%02X\n",
181-
sid_one_b[0], sid_one_b[1], sid_one_b[2]);
182-
usCFG(" SID 2 B: %02X%02X%02X\n",
183-
sid_two_b[0], sid_two_b[1], sid_two_b[2]);
184-
usCFG(" Filterbias B\n");
185-
usCFG(" SID1/SID2: %02x\n", fltb);
186-
187-
print_fpgasid_sidconfig(0, 1, sid_one_a);
188-
print_fpgasid_sidconfig(0, 2, sid_two_a);
189-
print_fpgasid_sidconfig(1, 1, sid_one_b);
190-
print_fpgasid_sidconfig(1, 2, sid_two_b);
167+
if (!read_config) {
168+
usCFG("FPGASID Diagnostic result:\n");
169+
usCFG(" Identifier: %04X (FPGASID)\n", fpgasid_id);
170+
usCFG(" CPLD Revision: %02X\n", cpld);
171+
usCFG(" FPGA Revision: %02X\n", fpga);
172+
usCFG(" PCA Revision: %02X\n", pca);
173+
usCFG(" Unique identifier: %02X%02X%02X%02X%02X%02X%02X%02X\n",
174+
unique_id[0], unique_id[1], unique_id[2], unique_id[3],
175+
unique_id[4], unique_id[5], unique_id[6], unique_id[7]);
176+
usCFG(" Clock frequency: %.3fμs\n", frequency);
177+
usCFG(" Select pins: %02X\n", select_pins);
178+
usCFG(" Index config A: %02X\n", idxa);
179+
usCFG(" SID 1 A: %02X%02X%02X\n",
180+
sid_one_a[0], sid_one_a[1], sid_one_a[2]);
181+
usCFG(" SID 2 A: %02X%02X%02X\n",
182+
sid_two_a[0], sid_two_a[1], sid_two_a[2]);
183+
usCFG(" Filterbias A\n");
184+
usCFG(" SID1/SID2: %02x\n", flta);
185+
usCFG(" Index config B: %02X\n", idxb);
186+
usCFG(" SID 1 B: %02X%02X%02X\n",
187+
sid_one_b[0], sid_one_b[1], sid_one_b[2]);
188+
usCFG(" SID 2 B: %02X%02X%02X\n",
189+
sid_two_b[0], sid_two_b[1], sid_two_b[2]);
190+
usCFG(" Filterbias B\n");
191+
usCFG(" SID1/SID2: %02x\n", fltb);
192+
193+
print_fpgasid_sidconfig(0, 1, sid_one_a);
194+
print_fpgasid_sidconfig(0, 2, sid_two_a);
195+
print_fpgasid_sidconfig(1, 1, sid_one_b);
196+
print_fpgasid_sidconfig(1, 2, sid_two_b);
197+
}
198+
199+
usNFO("read_config: %d\n",read_config);
200+
if (read_config) {
201+
chip_config[2] = idHi;
202+
chip_config[3] = idLo;
203+
chip_config[4] = cpld;
204+
chip_config[5] = fpga;
205+
chip_config[6] = pca;
206+
chip_config[7] = select_pins;
207+
chip_config[8] = idxa;
208+
chip_config[9] = idxb;
209+
chip_config[10] = flta;
210+
chip_config[11] = fltb;
211+
chip_config[12] = (uint8_t)((frequency_r&0xff00) >> 8);
212+
chip_config[13] = (uint8_t)(frequency_r&0xff);
213+
int idx = 14;
214+
memcpy(chip_config+idx, unique_id, 8);
215+
memcpy(chip_config+(idx+=3), sid_one_a, 3);
216+
memcpy(chip_config+(idx+=3), sid_two_a, 3);
217+
memcpy(chip_config+(idx+=3), sid_one_b, 3);
218+
memcpy(chip_config+(idx+=3), sid_two_b, 3);
219+
}
191220

192221
usNFO("\n");
193222

@@ -581,3 +610,41 @@ void set_sidemu_sidtype(uint8_t base_address, uint8_t type)
581610

582611
return;
583612
}
613+
614+
bool read_chip_configuration(uint8_t base_address, int command, uint8_t * chip_config_r)
615+
{ /* TODO: Finish */
616+
617+
read_config = true;
618+
chip_config = (uint8_t*)calloc(1, MAX_BUFFER_SIZE);
619+
memset(chip_config, 0, MAX_BUFFER_SIZE);
620+
621+
chip_config[0] = command;
622+
chip_config[1] = VERIFICATION_BYTE;
623+
624+
switch (command) {
625+
case READ_FPGASID:
626+
read_fpgasid_configuration(base_address);
627+
break;
628+
default:
629+
break;
630+
}
631+
632+
chip_config[62] = END_BYTE;
633+
chip_config[63] = TERMINATION_BYTE;
634+
635+
usNFO("DATA READ:\n");
636+
for (int i = 0; i < MAX_BUFFER_SIZE; i++) usNFO("%02x ", chip_config[i]);
637+
usNFO("\n");
638+
639+
memcpy(chip_config_r, chip_config, 64);
640+
641+
free(chip_config);
642+
read_config = false;
643+
return true;
644+
}
645+
646+
bool write_chip_configuration(int command)
647+
{ /* TODO: Finish */
648+
649+
return false;
650+
}

‎src/sid_cloneconfig.h‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -48,6 +48,8 @@ void set_backsid_filter_type(uint8_t base_address, uint8_t type);
4848
void read_armsid_configuration(uint8_t base_address);
4949
void read_sidemu_configuration(uint8_t base_address);
5050
void set_sidemu_sidtype(uint8_t base_address, uint8_t type);
51+
bool read_chip_configuration(uint8_t base_address, int command, uint8_t * chip_config_r);
52+
bool write_chip_configuration(int command);
5153

5254
#ifdef __cplusplus
5355
}

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