@@ -595,6 +595,27 @@ uint8_t __no_inline_not_in_flash_func(cycled_read_operation)(uint8_t address, ui
595595 return (read_data & 0xFF );
596596}
597597
598+ void __no_inline_not_in_flash_func (write_operation )(uint8_t address , uint8_t data )
599+ {
600+ sid_memory [(address & 0x7F )] = data ;
601+ vu = (vu == 0 ? 100 : vu ); /* NOTICE: Testfix for core1 setting dtype to 0 */
602+ control_word = 0b111000 ;
603+ dir_mask = 0b1111111111111111 ; /* Always OUT never IN */
604+ if (set_bus_bits (address , data ) != 1 ) {
605+ return ;
606+ }
607+ data_word = (dir_mask << 16 ) | data_word ;
608+
609+ pio_sm_exec (bus_pio , sm_control , pio_encode_irq_set (false, PIO_IRQ0 )); /* Preset the statemachine IRQ to not wait for a 1 */
610+ pio_sm_exec (bus_pio , sm_data , pio_encode_irq_set (false, PIO_IRQ1 )); /* Preset the statemachine IRQ to not wait for a 1 */
611+ pio_sm_exec (bus_pio , sm_data , pio_encode_wait_pin (true, PHI ));
612+ pio_sm_exec (bus_pio , sm_control , pio_encode_wait_pin (true, PHI ));
613+ pio_sm_put_blocking (bus_pio , sm_control , control_word );
614+ pio_sm_put_blocking (bus_pio , sm_data , data_word );
615+
616+ return ;
617+ }
618+
598619void __no_inline_not_in_flash_func (cycled_write_operation )(uint8_t address , uint8_t data , uint16_t cycles )
599620{
600621 delay_word = cycles ;
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