English version draft

Assisted-by: Claude:claude-4.6-sonnet

Author: HepoH3

.github/Intro.md

@@ -1,68 +1,68 @@
 # Summary
 
-[Порядок выполнения лабораторных работ для групп](index.md)
-[Предисловие](Intro.md)
+[Lab schedule by group](index.md)
+[Preface](Intro.md)
 
 ---
 
-# Введение
+# Introduction
 
-- [О данном разделе](Introduction/README.md)
-- [Что такое Язык Описания Аппаратуры](Introduction/What%20is%20HDL.md)
-- [Как работает ПЛИС](Introduction/How%20FPGA%20works.md)
-- [Последовательностная логика](Introduction/Sequential%20logic.md)
-- [Этапы реализации проекта в ПЛИС](Introduction/Implementation%20steps.md)
+- [About this section](Introduction/README.md)
+- [What is a Hardware Description Language](Introduction/What%20is%20HDL.md)
+- [How FPGAs work](Introduction/How%20FPGA%20works.md)
+- [Sequential logic](Introduction/Sequential%20logic.md)
+- [FPGA implementation steps](Introduction/Implementation%20steps.md)
 
 ---
 
-# Лабораторные работы
+# Laboratory works
 
-- [Лабораторная №1. Сумматор](Labs/01.%20Adder/README.md)
-- [Лабораторная №2. АЛУ](Labs/02.%20Arithmetic-logic%20unit/README.md)
-- [Лабораторная №3. Регистровый файл и внешняя память](Labs/03.%20Register%20file%20and%20memory/README.md)
-- [Лабораторная №4. Простейшее программируемое устройство](Labs/04.%20Primitive%20programmable%20device/README.md)
-- [Написание программы под процессор CYBERcobra](Labs/04.%20Primitive%20programmable%20device/Индивидуальное%20задание/README.md)
-- [Лабораторная №5. Декодер инструкций](Labs/05.%20Main%20decoder/README.md)
-- [Лабораторная №6. Основная память](Labs/06.%20Main%20memory/README.md)
-- [Лабораторная №7. Тракт данных](Labs/07.%20Datapath/README.md)
-- [Лабораторная №8. Блок загрузки и сохранения](Labs/08.%20Load-store%20unit/README.md)
-- [Лабораторная №9. Интеграция LSU](Labs/09.%20LSU%20Integration/README.md)
-- [Лабораторная №10. Подсистема прерывания](Labs/10.%20Interrupt%20subsystem/README.md)
-- [Лабораторная №11. Интеграция подсистемы прерывания](Labs/11.%20Interrupt%20integration/README.md)
-- [Лабораторная №12. Блок приоритетных прерываний](Labs/12.%20Daisy%20chain/README.md)
-- [Лабораторная №13. Периферийные устройства](Labs/13.%20Peripheral%20units/README.md)
-- [Лабораторная №14. Программирование](Labs/14.%20Programming/README.md)
-- [Лабораторная №15. Программатор](Labs/15.%20Programming%20device/README.md)
-- [Лабораторная №16. Оценка производительности](Labs/16.%20Coremark/README.md)
+- [Lab 1. Adder](Labs/01.%20Adder/README.md)
+- [Lab 2. ALU](Labs/02.%20Arithmetic-logic%20unit/README.md)
+- [Lab 3. Register file and external memory](Labs/03.%20Regiter%20file%20and%20memory/README.md)
+- [Lab 4. Primitive programmable device](Labs/04.%20Primtive%20programmable%20device/README.md)
+- [Writng a program for the CYBERcobra processor](Labs/04.%20Primtive%20programmable%20device/Индивидуальное%20задание/README.md)
+- [Lab 5. Instruction decoder](Labs/05.%20Main%20decoder/README.md)
+- [Lab 6. Main memory](Labs/06.%20Main%20memory/README.md)
+- [Lab 7. Datapath](Labs/07.%20Datapath/README.md)
+- [Lab 8. Load-store unit](Labs/08.%20Load-store%20unit/README.md)
+- [Lab 9. LSU integration](Labs/09.%20LSU%20Integration/README.md)
+- [Lab 10. Interrupt subsystem](Labs/10.%20Interrupt%20subsystem/README.md)
+- [Lab 11. Interrupt subsystem integration](Labs/11.%20Interrupt%20integration/README.md)
+- [Lab 12. Priority interrupt unit (Daisy chain)](Labs/12.%20Daisy%20chain/README.md)
+- [Lab 13. Peripheral devices](Labs/13.%20Peripheral%20units/README.md)
+- [Lab 14. Programming](Labs/14.%20Programming/README.md)
+- [Lab 15. Programmer device](Labs/15.%20Programming%20device/README.md)
+- [Lab 16. Performance evaluation](Labs/16.%20Coremark/README.md)
 
 ---
 
-# Базовые конструкции SystemVerilog
+# Basic SystemVerilog constructs
 
-- [Описание раздела](Basic%20Verilog%20structures/README.md)
-- [Модули](Basic%20Verilog%20structures/Modules.md)
-- [Мультиплексоры](Basic%20Verilog%20structures/Multiplexors.md)
-- [Регистры](Basic%20Verilog%20structures/Registers.md)
-- [Конкатенация](Basic%20Verilog%20structures/Concatenation.md)
-- [Защелки](Basic%20Verilog%20structures/Latches.md)
-- [О различиях между блокирующими и неблокирующими присваиваниями](Basic%20Verilog%20structures/Assignments.md)
-- [Контроллеры](Basic%20Verilog%20structures/Controllers.md)
+- [Section overview](Basic%20Verilog%20structures/README.md)
+- [Modules](Basic%20Verilog%20structures/Modules.md)
+- [Multiplexers](Basic%20Verilog%20structures/Multiplexors.md)
+- [Registers](Basic%20Verilog%20structures/Registers.md)
+- [Concatenation](Basic%20Verilog%20structures/Concatenation.md)
+- [Latches](Basic%20Verilog%20structures/Latches.md)
+- [Blocking vs non-blocking assignments](Basic%20Verilog%20structures/Assignments.md)
+- [Controllers](Basic%20Verilog%20structures/Controllers.md)
 
 ---
 
-# Основы Vivado
+# Vivado Basics
 
-1. [Создание проекта в Vivado](Vivado%20Basics/01.%20New%20project.md)
-2. [Навигатор по маршруту проектирования](Vivado%20Basics/02.%20Flow%20Navigator.md)
-3. [Менеджер проекта](Vivado%20Basics/03.%20Project%20manager.md)
-4. [Симуляция](Vivado%20Basics/04.%20Simulation.md)
-5. [Руководство по поиску функциональных ошибок](Vivado%20Basics/05.%20Bug%20hunting.md)
-6. [Анализ RTL](Vivado%20Basics/06.%20RTL%20Analysis.md)
-7. [Руководство по прошивке ПЛИС](Vivado%20Basics/07.%20Program%20and%20debug.md)
-8. [Руководство по работе с ошибками обработки кода](Vivado%20Basics/08.%20Code%20processing%20errors.md)
+1. [Creating a project in Vivado](Vivado%20Basics/01.%20New%20project.md)
+2. [Flow Navigator](Vivado%20Basics/02.%20Flow%20Navigator.md)
+3. [Project Manager](Vivado%20Basics/03.%20Project%20manager.md)
+4. [Simulation](Vivado%20Basics/04.%20Simulation.md)
+5. [Functional bug hunting guide](Vivado%20Basics/05.%20Bug%20hunting.md)
+6. [RTL Analysis](Vivado%20Basics/06.%20RTL%20Analysis.md)
+7. [FPGA programming guide](Vivado%20Basics/07.%20Program%20and%20debug.md)
+8. [Code processing errors guide](Vivado%20Basics/08.%20Code%20processing%20errors.md)
 
-# Дополнительные материалы
+# Additional materials
 
-- [RV32I - Стандартный набор целочисленных инструкций RISC-V](Other/rv32i.md)
-- [О регистрах контроля и статуса](Other/CSR.md)
-- [Список типичных ошибок при работе с Vivado и SystemVerilog](Other/FAQ.md)
+- [RV32I — RISC-V Base Integer Instruction Set](Other/rv32i.md)
+- [Control and Status Registers (CSR)](Other/CSR.md)
+- [Common Vivado & SystemVerilog pitfalls](Other/FAQ.md)

.github/SUMMARY.md

@@ -1,10 +1,12 @@
 [book]
 authors = ["Andrei Solodovnikov, Mikhail Popov"]
 language = "ru"
-multilingual = true
 src = "./"
 title = "Архитектуры процессорных систем"
 
 [output.html]
 git-repository-url = "https://github.com/MPSU/APS"
 git-repository-icon = "fa-github"
+site-url = "/APS/"
+additional-js  = ["theme/language-switcher.js"]
+additional-css = ["theme/language-switcher.css"]

.github/book.toml

@@ -0,0 +1,12 @@
+[book]
+authors = ["Andrei Solodovnikov, Mikhail Popov"]
+language = "en"
+src = "./"
+title = "Architectures of Processor Systems"
+
+[output.html]
+git-repository-url = "https://github.com/MPSU/APS"
+git-repository-icon = "fa-github"
+site-url = "/APS/en/"
+additional-js  = ["theme/language-switcher.js"]
+additional-css = ["theme/language-switcher.css"]

.github/book_en.toml

@@ -1,48 +1,48 @@
-# Курс лабораторных работ
+# Lab Course
 
-## Полезное
+## Useful Resources
 
-- [Создание базового проекта с прошивкой ПЛИС в Vivado](Vivado%20Basics/01.%20New%20project.md)
-- [Базовые конструкции Verilog](Basic%20Verilog%20structures/)
-- [Список типичных ошибок в Vivado и SystemVerilog](Other/FAQ.md)
-- [Тестовое окружение](Basic%20Verilog%20structures/Testbench.md)
+- [Creating a basic project with FPGA programming in Vivado](Vivado%20Basics/01.%20New%20project.md)
+- [Basic Verilog Constructs](Basic%20Verilog%20structures/)
+- [List of common errors in Vivado and SystemVerilog](Other/FAQ.md)
+- [Testbench](Basic%20Verilog%20structures/Testbench.md)
 
-## Порядок выполнения лабораторных работ для групп
+## Lab Sequence by Group
 
-### ИБ, ИКТ, КТ, РТ
+### IB, ICT, CT, RT
 
-1. Сумматор ([01. Adder](Labs/01.%20Adder))
-2. АЛУ ([02. Arithmetic-logic unit](Labs/02.%20Arithmetic-logic%20unit))
-3. Регистровый файл и внешняя память ([03. Register file and memory](Labs/03.%20Register%20file%20and%20memory))
-4. Простейшее программируемое устройство ([04. Primitive programmable device](Labs/04.%20Primitive%20programmable%20device))
+1. Adder ([01. Adder](Labs/01.%20Adder))
+2. ALU ([02. Arithmetic-logic unit](Labs/02.%20Arithmetic-logic%20unit))
+3. Register file and external memory ([03. Register file and memory](Labs/03.%20Register%20file%20and%20memory))
+4. Primitive programmable device ([04. Primitive programmable device](Labs/04.%20Primitive%20programmable%20device))
 
-### ПИН, ПМ
+### PIN, PM
 
-1. Сумматор ([01. Adder](Labs/01.%20Adder))
-2. АЛУ ([02. Arithmetic-logic unit](Labs/02.%20Arithmetic-logic%20unit))
-3. Регистровый файл и внешняя память ([03. Register file and memory](Labs/03.%20Register%20file%20and%20memory))
-4. Простейшее программируемое устройство ([04. Primitive programmable device](Labs/04.%20Primitive%20programmable%20device))
-5. Основной дешифратор ([05. Main decoder](Labs/05.%20Main%20decoder))
+1. Adder ([01. Adder](Labs/01.%20Adder))
+2. ALU ([02. Arithmetic-logic unit](Labs/02.%20Arithmetic-logic%20unit))
+3. Register file and external memory ([03. Register file and memory](Labs/03.%20Register%20file%20and%20memory))
+4. Primitive programmable device ([04. Primitive programmable device](Labs/04.%20Primitive%20programmable%20device))
+5. Main decoder ([05. Main decoder](Labs/05.%20Main%20decoder))
 6.
-   1. Тракт данных ([07. Datapath](Labs/07.%20Datapath))
-   2. Интеграция блока загрузки и сохранения ([09. LSU Integration](Labs/09.%20LSU%20Integration))
-   3. Интеграция подсистемы прерываний ([11. Interrupt Integration](Labs/11.%20Interrupt%20integration))
-7. Периферийные устройства ([13. Peripheral units](Labs/13.%20Peripheral%20units))
-8. Программирование ([14. Programming](Labs/14.%20Programming))
+   1. Datapath ([07. Datapath](Labs/07.%20Datapath))
+   2. Load-store unit integration ([09. LSU Integration](Labs/09.%20LSU%20Integration))
+   3. Interrupt subsystem integration ([11. Interrupt Integration](Labs/11.%20Interrupt%20integration))
+7. Peripheral units ([13. Peripheral units](Labs/13.%20Peripheral%20units))
+8. Programming ([14. Programming](Labs/14.%20Programming))
 
-### ИВТ
+### ICS
 
-1. АЛУ ([02. Arithmetic-logic unit](Labs/02.%20Arithmetic-logic%20unit))
+1. ALU ([02. Arithmetic-logic unit](Labs/02.%20Arithmetic-logic%20unit))
 2.
-   1. Память ([03. Register file and memory](Labs/03.%20Register%20file%20and%20memory)),
-   2. Простейшее программируемое устройство ([04. Primitive programmable device](Labs/04.%20Primitive%20programmable%20device))
-3. Основной дешифратор ([05. Main decoder](Labs/05.%20Main%20decoder))
-4. Тракт данных ([07. Datapath](Labs/07.%20Datapath))
+   1. Memory ([03. Register file and memory](Labs/03.%20Register%20file%20and%20memory))
+   2. Primitive programmable device ([04. Primitive programmable device](Labs/04.%20Primitive%20programmable%20device))
+3. Main decoder ([05. Main decoder](Labs/05.%20Main%20decoder))
+4. Datapath ([07. Datapath](Labs/07.%20Datapath))
 5.
-   1. Модуль загрузки и сохранения ([08. Load-store unit](Labs/08.%20Load-store%20unit))
-   2. Интеграция блока загрузки и сохранения ([09. LSU Integration](Labs/09.%20LSU%20Integration))
+   1. Load-store unit ([08. Load-store unit](Labs/08.%20Load-store%20unit))
+   2. Load-store unit integration ([09. LSU Integration](Labs/09.%20LSU%20Integration))
 6.
-   1. Контроллер прерываний ([10. Interrupt subsystem](Labs/10.%20Interrupt%20subsystem))
-   2. Интеграция подсистемы прерываний ([11. Interrupt Integration](Labs/11.%20Interrupt%20integration))
-7. Периферийные устройства ([13. Peripheral units](Labs/13.%20Peripheral%20units))
-8. Программирование ([14. Programming](Labs/14.%20Programming))
+   1. Interrupt controller ([10. Interrupt subsystem](Labs/10.%20Interrupt%20subsystem))
+   2. Interrupt subsystem integration ([11. Interrupt Integration](Labs/11.%20Interrupt%20integration))
+7. Peripheral units ([13. Peripheral units](Labs/13.%20Peripheral%20units))
+8. Programming ([14. Programming](Labs/14.%20Programming))

.github/index.md

@@ -1,4 +1,10 @@
 #!/bin/bash
+set -e
 
-mkdir src
-cp .github/book.toml .github/*.md ./
+mkdir -p src
+cp .github/book.toml .github/*.md ./
+
+# Copy custom theme assets (language switcher, etc.)
+if [ -d ".github/theme" ]; then
+  cp -r .github/theme ./
+fi

.github/prepare.sh

@@ -0,0 +1,44 @@
+/* ── Language Switcher ───────────────────────────────────────────────────── */
+
+#language-switcher {
+  display:     inline-flex;
+  align-items: center;
+  gap:         4px;
+
+  background:  none;
+  border:      1px solid var(--icons);
+  border-radius: 4px;
+  color:       var(--icons);
+  cursor:      pointer;
+  font-size:   0.82em;
+  font-weight: 600;
+  line-height: 1;
+  padding:     3px 8px;
+
+  /* sit nicely alongside the existing icon buttons */
+  margin-right: 4px;
+  vertical-align: middle;
+
+  transition: color 0.15s, border-color 0.15s, background 0.15s;
+}
+
+#language-switcher:hover,
+#language-switcher:focus-visible {
+  color:            var(--icons-hover);
+  border-color:     var(--icons-hover);
+  background-color: rgba(128, 128, 128, 0.08);
+  outline:          none;
+}
+
+/* Keep the flag emoji from being shrunk by the parent flex layout */
+#language-switcher span[aria-hidden] {
+  font-size: 1.1em;
+  line-height: 1;
+}
+
+/* Hide text label on very small screens, show only flag */
+@media (max-width: 420px) {
+  #language-switcher .lang-label {
+    display: none;
+  }
+}

.github/theme/language-switcher.css

@@ -0,0 +1,63 @@
+(function () {
+  "use strict";
+
+  // Detects current language from the URL path.
+  // Russian lives at /APS/...  English lives at /APS/en/...
+  function currentLang() {
+    return /\/en\//.test(window.location.pathname) ? "en" : "ru";
+  }
+
+  function switchLanguage() {
+    var path = window.location.pathname;
+    var newPath;
+
+    if (currentLang() === "en") {
+      // /APS/en/foo/bar.html  →  /APS/foo/bar.html
+      newPath = path.replace("/en/", "/");
+    } else {
+      // /APS/foo/bar.html  →  /APS/en/foo/bar.html
+      // Insert "en/" after the first path segment (the repo root, e.g. /APS/)
+      newPath = path.replace(/^(\/[^\/]+\/)/, "$1en/");
+    }
+
+    window.location.href =
+      newPath + window.location.search + window.location.hash;
+  }
+
+  function addSwitcher() {
+    var lang = currentLang();
+
+    var btn = document.createElement("button");
+    btn.id = "language-switcher";
+    btn.setAttribute(
+      "title",
+      lang === "ru" ? "Switch to English" : "Переключить на русский"
+    );
+    btn.setAttribute("aria-label", btn.getAttribute("title"));
+
+    // Flag + label
+    var icon = document.createElement("span");
+    icon.setAttribute("aria-hidden", "true");
+    icon.textContent = lang === "ru" ? "🇬🇧" : "🇷🇺";
+
+    var label = document.createElement("span");
+    label.className = "lang-label";
+    label.textContent = lang === "ru" ? "EN" : "RU";
+
+    btn.appendChild(icon);
+    btn.appendChild(label);
+    btn.addEventListener("click", switchLanguage);
+
+    // mdBook places theme/print/search buttons in .right-buttons
+    var target = document.querySelector(".right-buttons");
+    if (target) {
+      target.insertBefore(btn, target.firstChild);
+    }
+  }
+
+  if (document.readyState === "loading") {
+    document.addEventListener("DOMContentLoaded", addSwitcher);
+  } else {
+    addSwitcher();
+  }
+})();