From 91d81e509438f6223bec7d4f0ac505a5943b5cbb Mon Sep 17 00:00:00 2001 From: Markus Lassila Date: Fri, 7 Mar 2025 14:51:45 +0200 Subject: [PATCH 1/2] modem: backend: uart: Add hw-flow-control for UART Add Asynchronous UART implementation, which does not drop data when automatic hardware-flow-control is set in the device tree. With automatic hardware flow control, the CTS pin will be automatically deactivated when there are no more asynchronous UART RX buffers available. After buffer space becomes available, and UART RX is restarted, the CTS pin will be activated. Signed-off-by: Markus Lassila --- include/zephyr/modem/backend/uart.h | 23 +- subsys/modem/backends/CMakeLists.txt | 3 +- subsys/modem/backends/Kconfig | 22 + subsys/modem/backends/modem_backend_uart.c | 4 +- .../modem/backends/modem_backend_uart_async.c | 6 +- .../modem/backends/modem_backend_uart_async.h | 4 +- .../backends/modem_backend_uart_async_hwfc.c | 428 ++++++++++++++++++ subsys/modem/modem_cmux.c | 6 +- .../subsys/modem/backends/uart/testcase.yaml | 5 + 9 files changed, 489 insertions(+), 12 deletions(-) create mode 100644 subsys/modem/backends/modem_backend_uart_async_hwfc.c diff --git a/include/zephyr/modem/backend/uart.h b/include/zephyr/modem/backend/uart.h index f68f411c6e222..4812ef1efdda3 100644 --- a/include/zephyr/modem/backend/uart.h +++ b/include/zephyr/modem/backend/uart.h @@ -30,6 +30,25 @@ struct modem_backend_uart_isr { uint32_t transmit_buf_put_limit; }; +#if CONFIG_MODEM_BACKEND_UART_ASYNC_HWFC_ENABLED +struct rx_queue_event_t { + uint8_t *buf; + size_t len; +}; + +struct modem_backend_uart_async { + struct k_mem_slab rx_slab; + struct k_msgq rx_queue; + struct rx_queue_event_t rx_event; + struct rx_queue_event_t rx_queue_buf[CONFIG_MODEM_BACKEND_UART_ASYNC_HWFC_BUFFER_COUNT]; + uint32_t rx_buf_size; + uint8_t rx_buf_count; + uint8_t *transmit_buf; + uint32_t transmit_buf_size; + struct k_work rx_disabled_work; + atomic_t state; +}; +#else struct modem_backend_uart_async { uint8_t *receive_bufs[2]; uint32_t receive_buf_size; @@ -40,7 +59,7 @@ struct modem_backend_uart_async { struct k_work rx_disabled_work; atomic_t state; }; - +#endif /* CONFIG_MODEM_BACKEND_UART_ASYNC_HWFC_ENABLED */ struct modem_backend_uart { const struct device *uart; struct modem_pipe pipe; @@ -60,7 +79,7 @@ struct modem_backend_uart { struct modem_backend_uart_config { const struct device *uart; - uint8_t *receive_buf; + uint8_t *receive_buf __aligned(sizeof(uint32_t)); uint32_t receive_buf_size; uint8_t *transmit_buf; uint32_t transmit_buf_size; diff --git a/subsys/modem/backends/CMakeLists.txt b/subsys/modem/backends/CMakeLists.txt index 471452eebbc79..75294a3a6b4a4 100644 --- a/subsys/modem/backends/CMakeLists.txt +++ b/subsys/modem/backends/CMakeLists.txt @@ -6,4 +6,5 @@ zephyr_library() zephyr_library_sources_ifdef(CONFIG_MODEM_BACKEND_TTY modem_backend_tty.c) zephyr_library_sources_ifdef(CONFIG_MODEM_BACKEND_UART modem_backend_uart.c) zephyr_library_sources_ifdef(CONFIG_MODEM_BACKEND_UART_ISR modem_backend_uart_isr.c) -zephyr_library_sources_ifdef(CONFIG_MODEM_BACKEND_UART_ASYNC modem_backend_uart_async.c) +zephyr_library_sources_ifdef(CONFIG_MODEM_BACKEND_UART_ASYNC_HWFC_DISABLED modem_backend_uart_async.c) +zephyr_library_sources_ifdef(CONFIG_MODEM_BACKEND_UART_ASYNC_HWFC_ENABLED modem_backend_uart_async_hwfc.c) diff --git a/subsys/modem/backends/Kconfig b/subsys/modem/backends/Kconfig index 6bbadc2c588fe..9a3f3947857f3 100644 --- a/subsys/modem/backends/Kconfig +++ b/subsys/modem/backends/Kconfig @@ -48,6 +48,28 @@ config MODEM_BACKEND_UART_ASYNC_RECEIVE_IDLE_TIMEOUT_MS int "Modem async UART receive idle timeout in milliseconds" default 30 +choice MODEM_BACKEND_UART_ASYNC_HWFC_CHOICE + prompt "Modem async UART hardware flow control" + default MODEM_BACKEND_UART_ASYNC_HWFC_DISABLED + help + Select whether to enable or disable hardware flow control (HWFC) + for the modem async UART backend. + +config MODEM_BACKEND_UART_ASYNC_HWFC_DISABLED + bool "Hardware flow control is disabled" + +config MODEM_BACKEND_UART_ASYNC_HWFC_ENABLED + bool "Hardware flow control is enabled" +endchoice + +if MODEM_BACKEND_UART_ASYNC_HWFC_ENABLED + +config MODEM_BACKEND_UART_ASYNC_HWFC_BUFFER_COUNT + int "Modem async UART buffer count" + range 2 4 + default 3 endif +endif # MODEM_BACKEND_UART_ASYNC + endif # MODEM_BACKEND_UART diff --git a/subsys/modem/backends/modem_backend_uart.c b/subsys/modem/backends/modem_backend_uart.c index e182a3acd812c..82242a76c0196 100644 --- a/subsys/modem/backends/modem_backend_uart.c +++ b/subsys/modem/backends/modem_backend_uart.c @@ -45,7 +45,9 @@ struct modem_pipe *modem_backend_uart_init(struct modem_backend_uart *backend, #ifdef CONFIG_MODEM_BACKEND_UART_ASYNC if (modem_backend_uart_async_is_supported(backend)) { - modem_backend_uart_async_init(backend, config); + if (modem_backend_uart_async_init(backend, config)) { + return NULL; + } return &backend->pipe; } #endif /* CONFIG_MODEM_BACKEND_UART_ASYNC */ diff --git a/subsys/modem/backends/modem_backend_uart_async.c b/subsys/modem/backends/modem_backend_uart_async.c index 1b18420f7ed2a..f6dfe15e534e6 100644 --- a/subsys/modem/backends/modem_backend_uart_async.c +++ b/subsys/modem/backends/modem_backend_uart_async.c @@ -310,8 +310,8 @@ static void init_stats(struct modem_backend_uart *backend) } #endif -void modem_backend_uart_async_init(struct modem_backend_uart *backend, - const struct modem_backend_uart_config *config) +int modem_backend_uart_async_init(struct modem_backend_uart *backend, + const struct modem_backend_uart_config *config) { uint32_t receive_buf_size_quarter = config->receive_buf_size / 4; @@ -332,4 +332,6 @@ void modem_backend_uart_async_init(struct modem_backend_uart *backend, #if CONFIG_MODEM_STATS init_stats(backend); #endif + + return 0; } diff --git a/subsys/modem/backends/modem_backend_uart_async.h b/subsys/modem/backends/modem_backend_uart_async.h index dce7e2b71e870..9d271655f1165 100644 --- a/subsys/modem/backends/modem_backend_uart_async.h +++ b/subsys/modem/backends/modem_backend_uart_async.h @@ -15,8 +15,8 @@ extern "C" { bool modem_backend_uart_async_is_supported(struct modem_backend_uart *backend); -void modem_backend_uart_async_init(struct modem_backend_uart *backend, - const struct modem_backend_uart_config *config); +int modem_backend_uart_async_init(struct modem_backend_uart *backend, + const struct modem_backend_uart_config *config); #ifdef __cplusplus } diff --git a/subsys/modem/backends/modem_backend_uart_async_hwfc.c b/subsys/modem/backends/modem_backend_uart_async_hwfc.c new file mode 100644 index 0000000000000..49820c4331316 --- /dev/null +++ b/subsys/modem/backends/modem_backend_uart_async_hwfc.c @@ -0,0 +1,428 @@ +/* + * Copyright (c) 2025 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "modem_backend_uart_async.h" + +#include +LOG_MODULE_REGISTER(modem_backend_uart_async_hwfc, CONFIG_MODEM_MODULES_LOG_LEVEL); + +#include +#include + +struct rx_buf_t { + atomic_t ref_counter; + uint8_t buf[]; +}; + +static inline struct rx_buf_t *block_start_get(struct modem_backend_uart_async *async, uint8_t *buf) +{ + size_t block_num; + + /* Find the correct block. */ + block_num = (((size_t)buf - sizeof(struct rx_buf_t) - (size_t)async->rx_slab.buffer) / + async->rx_buf_size); + + return (struct rx_buf_t *) &async->rx_slab.buffer[block_num * async->rx_buf_size]; +} + +static struct rx_buf_t *rx_buf_alloc(struct modem_backend_uart_async *async) +{ + struct rx_buf_t *buf; + + if (k_mem_slab_alloc(&async->rx_slab, (void **) &buf, K_NO_WAIT)) { + return NULL; + } + atomic_set(&buf->ref_counter, 1); + + return buf; +} + +static void rx_buf_ref(struct modem_backend_uart_async *async, void *buf) +{ + atomic_inc(&(block_start_get(async, buf)->ref_counter)); +} + +static void rx_buf_unref(struct modem_backend_uart_async *async, void *buf) +{ + struct rx_buf_t *uart_buf = block_start_get(async, buf); + atomic_t ref_counter = atomic_dec(&uart_buf->ref_counter); + + if (ref_counter == 1) { + k_mem_slab_free(&async->rx_slab, (void *)uart_buf); + } +} + +enum { + MODEM_BACKEND_UART_ASYNC_STATE_OPEN_BIT, + MODEM_BACKEND_UART_ASYNC_STATE_TRANSMIT_BIT, + MODEM_BACKEND_UART_ASYNC_STATE_RECOVERY_BIT, +}; + +static int modem_backend_uart_async_hwfc_rx_enable(struct modem_backend_uart *backend) +{ + int ret; + struct rx_buf_t *buf = rx_buf_alloc(&backend->async); + + if (!buf) { + return -ENOMEM; + } + + ret = uart_rx_enable(backend->uart, buf->buf, + backend->async.rx_buf_size - sizeof(struct rx_buf_t), + CONFIG_MODEM_BACKEND_UART_ASYNC_RECEIVE_IDLE_TIMEOUT_MS * 1000); + if (ret) { + rx_buf_unref(&backend->async, buf); + return ret; + } + + return 0; +} + +static void modem_backend_uart_async_hwfc_rx_recovery(struct modem_backend_uart *backend) +{ + int err; + + if (!atomic_test_bit(&backend->async.state, + MODEM_BACKEND_UART_ASYNC_STATE_RECOVERY_BIT)) { + return; + } + + err = modem_backend_uart_async_hwfc_rx_enable(backend); + if (err) { + LOG_DBG("RX recovery failed: %d", err); + return; + } + + if (!atomic_test_and_clear_bit(&backend->async.state, + MODEM_BACKEND_UART_ASYNC_STATE_RECOVERY_BIT)) { + /* Closed during recovery. */ + uart_rx_disable(backend->uart); + } else { + LOG_DBG("RX recovery success"); + } +} + +static bool modem_backend_uart_async_hwfc_is_uart_stopped(struct modem_backend_uart *backend) +{ + if (!atomic_test_bit(&backend->async.state, MODEM_BACKEND_UART_ASYNC_STATE_OPEN_BIT) && + !atomic_test_bit(&backend->async.state, MODEM_BACKEND_UART_ASYNC_STATE_RECOVERY_BIT) && + !atomic_test_bit(&backend->async.state, MODEM_BACKEND_UART_ASYNC_STATE_TRANSMIT_BIT)) { + return true; + } + + return false; +} + +static bool modem_backend_uart_async_hwfc_is_open(struct modem_backend_uart *backend) +{ + return atomic_test_bit(&backend->async.state, + MODEM_BACKEND_UART_ASYNC_STATE_OPEN_BIT); +} + +static void modem_backend_uart_async_hwfc_event_handler(const struct device *dev, + struct uart_event *evt, void *user_data) +{ + struct modem_backend_uart *backend = (struct modem_backend_uart *) user_data; + struct rx_queue_event_t rx_event; + int err; + + switch (evt->type) { + case UART_TX_DONE: + atomic_clear_bit(&backend->async.state, + MODEM_BACKEND_UART_ASYNC_STATE_TRANSMIT_BIT); + k_work_submit(&backend->transmit_idle_work); + break; + + case UART_TX_ABORTED: + if (modem_backend_uart_async_hwfc_is_open(backend)) { + LOG_WRN("Transmit aborted (%zu sent)", evt->data.tx.len); + } + atomic_clear_bit(&backend->async.state, + MODEM_BACKEND_UART_ASYNC_STATE_TRANSMIT_BIT); + k_work_submit(&backend->transmit_idle_work); + + break; + + case UART_RX_BUF_REQUEST: + struct rx_buf_t *buf = rx_buf_alloc(&backend->async); + + if (!buf) { + LOG_DBG("No receive buffer, disabling RX"); + break; + } + err = uart_rx_buf_rsp(backend->uart, buf->buf, + backend->async.rx_buf_size - sizeof(struct rx_buf_t)); + if (err) { + LOG_ERR("uart_rx_buf_rsp: %d", err); + rx_buf_unref(&backend->async, buf); + } + break; + + case UART_RX_BUF_RELEASED: + if (evt->data.rx_buf.buf) { + rx_buf_unref(&backend->async, evt->data.rx_buf.buf); + } + break; + + case UART_RX_RDY: + rx_buf_ref(&backend->async, evt->data.rx.buf); + rx_event.buf = &evt->data.rx.buf[evt->data.rx.offset]; + rx_event.len = evt->data.rx.len; + err = k_msgq_put(&backend->async.rx_queue, &rx_event, K_NO_WAIT); + if (err) { + LOG_WRN("RX queue overflow: %d (dropped %u)", err, evt->data.rx.len); + rx_buf_unref(&backend->async, evt->data.rx.buf); + break; + } + k_work_schedule(&backend->receive_ready_work, K_NO_WAIT); + break; + + case UART_RX_DISABLED: + if (atomic_test_bit(&backend->async.state, + MODEM_BACKEND_UART_ASYNC_STATE_OPEN_BIT)) { + atomic_set_bit(&backend->async.state, + MODEM_BACKEND_UART_ASYNC_STATE_RECOVERY_BIT); + k_work_schedule(&backend->receive_ready_work, K_NO_WAIT); + LOG_DBG("RX recovery started"); + } + break; + + case UART_RX_STOPPED: + LOG_WRN("Receive stopped for reasons: %u", (uint8_t)evt->data.rx_stop.reason); + break; + + default: + break; + } + + if (modem_backend_uart_async_hwfc_is_uart_stopped(backend)) { + k_work_submit(&backend->async.rx_disabled_work); + } +} + +static int modem_backend_uart_async_hwfc_open(void *data) +{ + struct modem_backend_uart *backend = (struct modem_backend_uart *)data; + struct rx_buf_t *buf = rx_buf_alloc(&backend->async); + int ret; + + if (!buf) { + return -ENOMEM; + } + + atomic_clear(&backend->async.state); + atomic_set_bit(&backend->async.state, MODEM_BACKEND_UART_ASYNC_STATE_OPEN_BIT); + + ret = uart_rx_enable(backend->uart, buf->buf, + backend->async.rx_buf_size - sizeof(struct rx_buf_t), + CONFIG_MODEM_BACKEND_UART_ASYNC_RECEIVE_IDLE_TIMEOUT_MS * 1000L); + if (ret < 0) { + rx_buf_unref(&backend->async, buf); + atomic_clear(&backend->async.state); + return ret; + } + + modem_pipe_notify_opened(&backend->pipe); + return 0; +} + +#if CONFIG_MODEM_STATS +static uint32_t get_receive_buf_size(struct modem_backend_uart *backend) +{ + return (backend->async.rx_buf_size - sizeof(struct rx_buf_t)) * backend->async.rx_buf_count; +} + +static void advertise_transmit_buf_stats(struct modem_backend_uart *backend, uint32_t length) +{ + modem_stats_buffer_advertise_length(&backend->transmit_buf_stats, length); +} + +static void advertise_receive_buf_stats(struct modem_backend_uart *backend, uint32_t reserved) +{ + modem_stats_buffer_advertise_length(&backend->receive_buf_stats, reserved); +} +#endif + +static uint32_t get_transmit_buf_size(struct modem_backend_uart *backend) +{ + return backend->async.transmit_buf_size; +} + +static int modem_backend_uart_async_hwfc_transmit(void *data, const uint8_t *buf, size_t size) +{ + struct modem_backend_uart *backend = (struct modem_backend_uart *)data; + bool transmitting; + uint32_t bytes_to_transmit; + int ret; + + transmitting = atomic_test_and_set_bit(&backend->async.state, + MODEM_BACKEND_UART_ASYNC_STATE_TRANSMIT_BIT); + if (transmitting) { + return 0; + } + + /* Determine amount of bytes to transmit */ + bytes_to_transmit = MIN(size, get_transmit_buf_size(backend)); + + /* Copy buf to transmit buffer which is passed to UART */ + memcpy(backend->async.transmit_buf, buf, bytes_to_transmit); + + ret = uart_tx(backend->uart, backend->async.transmit_buf, bytes_to_transmit, + CONFIG_MODEM_BACKEND_UART_ASYNC_TRANSMIT_TIMEOUT_MS * 1000L); + +#if CONFIG_MODEM_STATS + advertise_transmit_buf_stats(backend, bytes_to_transmit); +#endif + + if (ret != 0) { + LOG_ERR("Failed to %s %u bytes. (%d)", + "start async transmit for", bytes_to_transmit, ret); + return ret; + } + + return (int)bytes_to_transmit; +} + +static int modem_backend_uart_async_hwfc_receive(void *data, uint8_t *buf, size_t size) +{ + struct modem_backend_uart *backend = (struct modem_backend_uart *)data; + size_t received = 0; + size_t copy_size = 0; + +#if CONFIG_MODEM_STATS + struct rx_queue_event_t rx_event; + size_t reserved = backend->async.rx_event.len; + + for (int i = 0; i < k_msgq_num_used_get(&backend->async.rx_queue); i++) { + if (k_msgq_peek_at(&backend->async.rx_queue, &rx_event, i)) { + break; + } + reserved += rx_event.len; + } + advertise_receive_buf_stats(backend, reserved); +#endif + while (size > received) { + /* Keeping track of the async.rx_event allows us to receive less than what the event + * indicates. + */ + if (backend->async.rx_event.len == 0) { + if (k_msgq_get(&backend->async.rx_queue, &backend->async.rx_event, + K_NO_WAIT)) { + break; + } + } + copy_size = MIN(size - received, backend->async.rx_event.len); + memcpy(buf, backend->async.rx_event.buf, copy_size); + buf += copy_size; + received += copy_size; + backend->async.rx_event.buf += copy_size; + backend->async.rx_event.len -= copy_size; + + if (backend->async.rx_event.len == 0) { + rx_buf_unref(&backend->async, backend->async.rx_event.buf); + } + } + + if (backend->async.rx_event.len != 0 || + k_msgq_num_used_get(&backend->async.rx_queue) != 0) { + k_work_schedule(&backend->receive_ready_work, K_NO_WAIT); + } + + modem_backend_uart_async_hwfc_rx_recovery(backend); + + return (int)received; +} + +static int modem_backend_uart_async_hwfc_close(void *data) +{ + struct modem_backend_uart *backend = (struct modem_backend_uart *)data; + + atomic_clear_bit(&backend->async.state, MODEM_BACKEND_UART_ASYNC_STATE_OPEN_BIT); + uart_tx_abort(backend->uart); + + if (!atomic_test_and_clear_bit(&backend->async.state, + MODEM_BACKEND_UART_ASYNC_STATE_RECOVERY_BIT)) { + /* Disable the RX, if recovery is not ongoing. */ + uart_rx_disable(backend->uart); + } + + return 0; +} + +static const struct modem_pipe_api modem_backend_uart_async_api = { + .open = modem_backend_uart_async_hwfc_open, + .transmit = modem_backend_uart_async_hwfc_transmit, + .receive = modem_backend_uart_async_hwfc_receive, + .close = modem_backend_uart_async_hwfc_close, +}; + +bool modem_backend_uart_async_is_supported(struct modem_backend_uart *backend) +{ + return uart_callback_set(backend->uart, modem_backend_uart_async_hwfc_event_handler, + backend) == 0; +} + +static void modem_backend_uart_async_hwfc_notify_closed(struct k_work *item) +{ + struct modem_backend_uart_async *async = + CONTAINER_OF(item, struct modem_backend_uart_async, rx_disabled_work); + + struct modem_backend_uart *backend = + CONTAINER_OF(async, struct modem_backend_uart, async); + + modem_pipe_notify_closed(&backend->pipe); +} + +#if CONFIG_MODEM_STATS +static void init_stats(struct modem_backend_uart *backend) +{ + char name[CONFIG_MODEM_STATS_BUFFER_NAME_SIZE]; + uint32_t receive_buf_size; + uint32_t transmit_buf_size; + + receive_buf_size = get_receive_buf_size(backend); + transmit_buf_size = get_transmit_buf_size(backend); + + snprintk(name, sizeof(name), "%s_%s", backend->uart->name, "rx"); + modem_stats_buffer_init(&backend->receive_buf_stats, name, receive_buf_size); + snprintk(name, sizeof(name), "%s_%s", backend->uart->name, "tx"); + modem_stats_buffer_init(&backend->transmit_buf_stats, name, transmit_buf_size); +} +#endif + +int modem_backend_uart_async_init(struct modem_backend_uart *backend, + const struct modem_backend_uart_config *config) +{ + int32_t buf_size = (int32_t)config->receive_buf_size; + int err; + + backend->async.rx_buf_count = CONFIG_MODEM_BACKEND_UART_ASYNC_HWFC_BUFFER_COUNT; + + /* Make sure all the buffers will be aligned. */ + buf_size -= (config->receive_buf_size % (sizeof(uint32_t) * backend->async.rx_buf_count)); + backend->async.rx_buf_size = buf_size / backend->async.rx_buf_count; + __ASSERT_NO_MSG(backend->async.rx_buf_size > sizeof(struct rx_buf_t)); + + /* Initialize the RX buffers and event queue. */ + err = k_mem_slab_init(&backend->async.rx_slab, config->receive_buf, + backend->async.rx_buf_size, backend->async.rx_buf_count); + if (err) { + return err; + } + k_msgq_init(&backend->async.rx_queue, (char *)&backend->async.rx_queue_buf, + sizeof(struct rx_queue_event_t), CONFIG_MODEM_BACKEND_UART_ASYNC_HWFC_BUFFER_COUNT); + + backend->async.transmit_buf = config->transmit_buf; + backend->async.transmit_buf_size = config->transmit_buf_size; + k_work_init(&backend->async.rx_disabled_work, modem_backend_uart_async_hwfc_notify_closed); + + modem_pipe_init(&backend->pipe, backend, &modem_backend_uart_async_api); + +#if CONFIG_MODEM_STATS + init_stats(backend); +#endif + return 0; +} diff --git a/subsys/modem/modem_cmux.c b/subsys/modem/modem_cmux.c index 48498f5b72c05..d5547e03da288 100644 --- a/subsys/modem/modem_cmux.c +++ b/subsys/modem/modem_cmux.c @@ -1108,7 +1108,7 @@ static int modem_cmux_dlci_pipe_api_transmit(void *data, const uint8_t *buf, siz { struct modem_cmux_dlci *dlci = (struct modem_cmux_dlci *)data; struct modem_cmux *cmux = dlci->cmux; - int ret; + int ret = 0; K_SPINLOCK(&cmux->work_lock) { if (!cmux->attached) { @@ -1345,7 +1345,7 @@ int modem_cmux_connect(struct modem_cmux *cmux) int modem_cmux_connect_async(struct modem_cmux *cmux) { - int ret; + int ret = 0; if (k_event_test(&cmux->event, MODEM_CMUX_EVENT_CONNECTED_BIT)) { return -EALREADY; @@ -1360,8 +1360,6 @@ int modem_cmux_connect_async(struct modem_cmux *cmux) if (k_work_delayable_is_pending(&cmux->connect_work) == false) { k_work_schedule(&cmux->connect_work, K_NO_WAIT); } - - ret = 0; } return ret; diff --git a/tests/subsys/modem/backends/uart/testcase.yaml b/tests/subsys/modem/backends/uart/testcase.yaml index be53728c7241f..1ba46c00c2e98 100644 --- a/tests/subsys/modem/backends/uart/testcase.yaml +++ b/tests/subsys/modem/backends/uart/testcase.yaml @@ -14,6 +14,11 @@ tests: extra_configs: - CONFIG_UART_ASYNC_API=y + modem.backends.uart.async.hwfc: + extra_configs: + - CONFIG_UART_ASYNC_API=y + - CONFIG_MODEM_BACKEND_UART_ASYNC_HWFC_ENABLED=y + modem.backends.uart.isr: extra_configs: - CONFIG_UART_INTERRUPT_DRIVEN=y From fc8c18eb365e023d09f5932f706774983d781116 Mon Sep 17 00:00:00 2001 From: Markus Lassila Date: Thu, 3 Apr 2025 13:58:06 +0300 Subject: [PATCH 2/2] test results. Signed-off-by: Markus Lassila --- .../boards/nrf5340dk_nrf5340_cpuapp.overlay | 13 +- tests/subsys/modem/backends/uart/result.txt | 1137 +++++++++++++++++ tests/subsys/modem/backends/uart/src/main.c | 5 +- 3 files changed, 1151 insertions(+), 4 deletions(-) create mode 100644 tests/subsys/modem/backends/uart/result.txt diff --git a/tests/subsys/modem/backends/uart/boards/nrf5340dk_nrf5340_cpuapp.overlay b/tests/subsys/modem/backends/uart/boards/nrf5340dk_nrf5340_cpuapp.overlay index 777aebd8d3b9d..2b6563a94f105 100644 --- a/tests/subsys/modem/backends/uart/boards/nrf5340dk_nrf5340_cpuapp.overlay +++ b/tests/subsys/modem/backends/uart/boards/nrf5340dk_nrf5340_cpuapp.overlay @@ -2,20 +2,28 @@ /* * Pins P0.4 and P0.5 must be connected to each other to loopback RX/TX. + * For hw-flow-control, P0.6 and P0.7 must be connected to each other to enable RTS/CTS. */ &pinctrl { uart1_default_alt: uart1_default_alt { group1 { psels = , - ; + ; + }; + group2 { + psels = , + ; + bias-pull-up; }; }; uart1_sleep_alt: uart1_sleep_alt { group1 { psels = , - ; + , + , + ; low-power-enable; }; }; @@ -23,6 +31,7 @@ dut: &uart1 { compatible = "nordic,nrf-uarte"; + hw-flow-control; current-speed = <115200>; status = "okay"; pinctrl-0 = <&uart1_default_alt>; diff --git a/tests/subsys/modem/backends/uart/result.txt b/tests/subsys/modem/backends/uart/result.txt new file mode 100644 index 0000000000000..ebba8978c11ee --- /dev/null +++ b/tests/subsys/modem/backends/uart/result.txt @@ -0,0 +1,1137 @@ +*** Booting Zephyr OS build v4.1.0-1215-g91d81e509438 *** +Running TESTSUITE modem_backend_uart_suite +=================================================================== +START - test_transmit_receive +TX: 2,2 +TX ACC: 2 +RX: 2 +TX: 8,8 +TX ACC: 10 +RX: 8 +TX: 32,32 +TX ACC: 42 +RX: 32 +TX: 128,128 +TX ACC: 170 +RX: 128 +TX: 512,512 +TX ACC: 682 +RX: 492 +RX: 20 +TX: 2048,1024 +TX ACC: 1706 +RX: 492 +RX: 492 +RX: 40 +TX: 2,2 +TX ACC: 1708 +RX: 2 +TX: 8,8 +TX ACC: 1716 +RX: 8 +TX: 32,32 +TX ACC: 1748 +RX: 32 +TX: 128,128 +TX ACC: 1876 +RX: 128 +TX: 512,512 +TX ACC: 2388 +RX: 492 +RX: 20 +TX: 2048,1024 +TX ACC: 3412 +RX: 492 +RX: 492 +RX: 40 +TX: 2,2 +TX ACC: 3414 +RX: 2 +TX: 8,8 +TX ACC: 3422 +RX: 8 +TX: 32,32 +TX ACC: 3454 +RX: 32 +TX: 128,128 +TX ACC: 3582 +RX: 128 +TX: 512,512 +TX ACC: 4094 +RX: 492 +RX: 20 +TX: 2,2 +TX ACC: 4096 +RX: 2 +TX: 1,1 +TX ACC: 4097 +RX: 1 +TX: 4,4 +TX ACC: 4101 +RX: 4 +TX: 16,16 +TX ACC: 4117 +RX: 16 +TX: 64,64 +TX ACC: 4181 +RX: 64 +TX: 256,256 +TX ACC: 4437 +RX: 256 +TX: 1024,1024 +TX ACC: 5461 +RX: 164 +RX: 492 +RX: 368 +TX: 1,1 +TX ACC: 5462 +RX: 1 +TX: 4,4 +TX ACC: 5466 +RX: 4 +TX: 16,16 +TX ACC: 5482 +RX: 16 +TX: 64,64 +TX ACC: 5546 +RX: 64 +TX: 256,256 +TX ACC: 5802 +RX: 256 +TX: 1024,1024 +TX ACC: 6826 +RX: 164 +RX: 492 +RX: 368 +TX: 1366,1024 +TX ACC: 7850 +RX: 492 +RX: 492 +RX: 40 +TX: 2,2 +TX ACC: 7852 +RX: 2 +TX: 8,8 +TX ACC: 7860 +RX: 8 +TX: 32,32 +TX ACC: 7892 +RX: 32 +TX: 128,128 +TX ACC: 8020 +RX: 128 +TX: 172,172 +TX ACC: 8192 +RX: 172 + PASS - test_transmit_receive in 5.089 seconds +=================================================================== +START - test_transmit_receive +TX: 2,2 +TX ACC: 2 +RX: 2 +TX: 8,8 +TX ACC: 10 +RX: 8 +TX: 32,32 +TX ACC: 42 +RX: 32 +TX: 128,128 +TX ACC: 170 +RX: 128 +TX: 512,512 +TX ACC: 682 +RX: 492 +RX: 20 +TX: 2048,1024 +TX ACC: 1706 +RX: 492 +RX: 492 +RX: 40 +TX: 2,2 +TX ACC: 1708 +RX: 2 +TX: 8,8 +TX ACC: 1716 +RX: 8 +TX: 32,32 +TX ACC: 1748 +RX: 32 +TX: 128,128 +TX ACC: 1876 +RX: 128 +TX: 512,512 +TX ACC: 2388 +RX: 492 +RX: 20 +TX: 2048,1024 +TX ACC: 3412 +RX: 492 +RX: 492 +RX: 40 +TX: 2,2 +TX ACC: 3414 +RX: 2 +TX: 8,8 +TX ACC: 3422 +RX: 8 +TX: 32,32 +TX ACC: 3454 +RX: 32 +TX: 128,128 +TX ACC: 3582 +RX: 128 +TX: 512,512 +TX ACC: 4094 +RX: 492 +RX: 20 +TX: 2,2 +TX ACC: 4096 +RX: 2 +TX: 1,1 +TX ACC: 4097 +RX: 1 +TX: 4,4 +TX ACC: 4101 +RX: 4 +TX: 16,16 +TX ACC: 4117 +RX: 16 +TX: 64,64 +TX ACC: 4181 +RX: 64 +TX: 256,256 +TX ACC: 4437 +RX: 256 +TX: 1024,1024 +TX ACC: 5461 +RX: 164 +RX: 492 +RX: 368 +TX: 1,1 +TX ACC: 5462 +RX: 1 +TX: 4,4 +TX ACC: 5466 +RX: 4 +TX: 16,16 +TX ACC: 5482 +RX: 16 +TX: 64,64 +TX ACC: 5546 +RX: 64 +TX: 256,256 +TX ACC: 5802 +RX: 256 +TX: 1024,1024 +TX ACC: 6826 +RX: 164 +RX: 492 +RX: 368 +TX: 1366,1024 +TX ACC: 7850 +RX: 492 +RX: 492 +RX: 40 +TX: 2,2 +TX ACC: 7852 +RX: 2 +TX: 8,8 +TX ACC: 7860 +RX: 8 +TX: 32,32 +TX ACC: 7892 +RX: 32 +TX: 128,128 +TX ACC: 8020 +RX: 128 +TX: 172,172 +TX ACC: 8192 +RX: 172 + PASS - test_transmit_receive in 5.089 seconds +=================================================================== +START - test_transmit_receive +TX: 2,2 +TX ACC: 2 +RX: 2 +TX: 8,8 +TX ACC: 10 +RX: 8 +TX: 32,32 +TX ACC: 42 +RX: 32 +TX: 128,128 +TX ACC: 170 +RX: 128 +TX: 512,512 +TX ACC: 682 +RX: 492 +RX: 20 +TX: 2048,1024 +TX ACC: 1706 +RX: 492 +RX: 492 +RX: 40 +TX: 2,2 +TX ACC: 1708 +RX: 2 +TX: 8,8 +TX ACC: 1716 +RX: 8 +TX: 32,32 +TX ACC: 1748 +RX: 32 +TX: 128,128 +TX ACC: 1876 +RX: 128 +TX: 512,512 +TX ACC: 2388 +RX: 492 +RX: 20 +TX: 2048,1024 +TX ACC: 3412 +RX: 492 +RX: 492 +RX: 40 +TX: 2,2 +TX ACC: 3414 +RX: 2 +TX: 8,8 +TX ACC: 3422 +RX: 8 +TX: 32,32 +TX ACC: 3454 +RX: 32 +TX: 128,128 +TX ACC: 3582 +RX: 128 +TX: 512,512 +TX ACC: 4094 +RX: 492 +RX: 20 +TX: 2,2 +TX ACC: 4096 +RX: 2 +TX: 1,1 +TX ACC: 4097 +RX: 1 +TX: 4,4 +TX ACC: 4101 +RX: 4 +TX: 16,16 +TX ACC: 4117 +RX: 16 +TX: 64,64 +TX ACC: 4181 +RX: 64 +TX: 256,256 +TX ACC: 4437 +RX: 256 +TX: 1024,1024 +TX ACC: 5461 +RX: 164 +RX: 492 +RX: 368 +TX: 1,1 +TX ACC: 5462 +RX: 1 +TX: 4,4 +TX ACC: 5466 +RX: 4 +TX: 16,16 +TX ACC: 5482 +RX: 16 +TX: 64,64 +TX ACC: 5546 +RX: 64 +TX: 256,256 +TX ACC: 5802 +RX: 256 +TX: 1024,1024 +TX ACC: 6826 +RX: 164 +RX: 492 +RX: 368 +TX: 1366,1024 +TX ACC: 7850 +RX: 492 +RX: 492 +RX: 40 +TX: 2,2 +TX ACC: 7852 +RX: 2 +TX: 8,8 +TX ACC: 7860 +RX: 8 +TX: 32,32 +TX ACC: 7892 +RX: 32 +TX: 128,128 +TX ACC: 8020 +RX: 128 +TX: 172,172 +TX ACC: 8192 +RX: 172 + PASS - test_transmit_receive in 5.089 seconds +=================================================================== +TESTSUITE modem_backend_uart_suite succeeded +Running TESTSUITE modem_backend_uart_suite +=================================================================== +START - test_transmit_receive +TX: 2,2 +TX ACC: 2 +RX: 2 +TX: 8,8 +TX ACC: 10 +RX: 8 +TX: 32,32 +TX ACC: 42 +RX: 32 +TX: 128,128 +TX ACC: 170 +RX: 128 +TX: 512,512 +TX ACC: 682 +RX: 492 +RX: 20 +TX: 2048,1024 +TX ACC: 1706 +RX: 492 +RX: 492 +RX: 40 +TX: 2,2 +TX ACC: 1708 +RX: 2 +TX: 8,8 +TX ACC: 1716 +RX: 8 +TX: 32,32 +TX ACC: 1748 +RX: 32 +TX: 128,128 +TX ACC: 1876 +RX: 128 +TX: 512,512 +TX ACC: 2388 +RX: 492 +RX: 20 +TX: 2048,1024 +TX ACC: 3412 +RX: 492 +RX: 492 +RX: 40 +TX: 2,2 +TX ACC: 3414 +RX: 2 +TX: 8,8 +TX ACC: 3422 +RX: 8 +TX: 32,32 +TX ACC: 3454 +RX: 32 +TX: 128,128 +TX ACC: 3582 +RX: 128 +TX: 512,512 +TX ACC: 4094 +RX: 492 +RX: 20 +TX: 2,2 +TX ACC: 4096 +RX: 2 +TX: 1,1 +TX ACC: 4097 +RX: 1 +TX: 4,4 +TX ACC: 4101 +RX: 4 +TX: 16,16 +TX ACC: 4117 +RX: 16 +TX: 64,64 +TX ACC: 4181 +RX: 64 +TX: 256,256 +TX ACC: 4437 +RX: 256 +TX: 1024,1024 +TX ACC: 5461 +RX: 164 +RX: 492 +RX: 368 +TX: 1,1 +TX ACC: 5462 +RX: 1 +TX: 4,4 +TX ACC: 5466 +RX: 4 +TX: 16,16 +TX ACC: 5482 +RX: 16 +TX: 64,64 +TX ACC: 5546 +RX: 64 +TX: 256,256 +TX ACC: 5802 +RX: 256 +TX: 1024,1024 +TX ACC: 6826 +RX: 164 +RX: 492 +RX: 368 +TX: 1366,1024 +TX ACC: 7850 +RX: 492 +RX: 492 +RX: 40 +TX: 2,2 +TX ACC: 7852 +RX: 2 +TX: 8,8 +TX ACC: 7860 +RX: 8 +TX: 32,32 +TX ACC: 7892 +RX: 32 +TX: 128,128 +TX ACC: 8020 +RX: 128 +TX: 172,172 +TX ACC: 8192 +RX: 172 + PASS - test_transmit_receive in 5.089 seconds +=================================================================== +START - test_transmit_receive +TX: 2,2 +TX ACC: 2 +RX: 2 +TX: 8,8 +TX ACC: 10 +RX: 8 +TX: 32,32 +TX ACC: 42 +RX: 32 +TX: 128,128 +TX ACC: 170 +RX: 128 +TX: 512,512 +TX ACC: 682 +RX: 492 +RX: 20 +TX: 2048,1024 +TX ACC: 1706 +RX: 492 +RX: 492 +RX: 40 +TX: 2,2 +TX ACC: 1708 +RX: 2 +TX: 8,8 +TX ACC: 1716 +RX: 8 +TX: 32,32 +TX ACC: 1748 +RX: 32 +TX: 128,128 +TX ACC: 1876 +RX: 128 +TX: 512,512 +TX ACC: 2388 +RX: 492 +RX: 20 +TX: 2048,1024 +TX ACC: 3412 +RX: 492 +RX: 492 +RX: 40 +TX: 2,2 +TX ACC: 3414 +RX: 2 +TX: 8,8 +TX ACC: 3422 +RX: 8 +TX: 32,32 +TX ACC: 3454 +RX: 32 +TX: 128,128 +TX ACC: 3582 +RX: 128 +TX: 512,512 +TX ACC: 4094 +RX: 492 +RX: 20 +TX: 2,2 +TX ACC: 4096 +RX: 2 +TX: 1,1 +TX ACC: 4097 +RX: 1 +TX: 4,4 +TX ACC: 4101 +RX: 4 +TX: 16,16 +TX ACC: 4117 +RX: 16 +TX: 64,64 +TX ACC: 4181 +RX: 64 +TX: 256,256 +TX ACC: 4437 +RX: 256 +TX: 1024,1024 +TX ACC: 5461 +RX: 164 +RX: 492 +RX: 368 +TX: 1,1 +TX ACC: 5462 +RX: 1 +TX: 4,4 +TX ACC: 5466 +RX: 4 +TX: 16,16 +TX ACC: 5482 +RX: 16 +TX: 64,64 +TX ACC: 5546 +RX: 64 +TX: 256,256 +TX ACC: 5802 +RX: 256 +TX: 1024,1024 +TX ACC: 6826 +RX: 164 +RX: 492 +RX: 368 +TX: 1366,1024 +TX ACC: 7850 +RX: 492 +RX: 492 +RX: 40 +TX: 2,2 +TX ACC: 7852 +RX: 2 +TX: 8,8 +TX ACC: 7860 +RX: 8 +TX: 32,32 +TX ACC: 7892 +RX: 32 +TX: 128,128 +TX ACC: 8020 +RX: 128 +TX: 172,172 +TX ACC: 8192 +RX: 172 + PASS - test_transmit_receive in 5.089 seconds +=================================================================== +START - test_transmit_receive +TX: 2,2 +TX ACC: 2 +RX: 2 +TX: 8,8 +TX ACC: 10 +RX: 8 +TX: 32,32 +TX ACC: 42 +RX: 32 +TX: 128,128 +TX ACC: 170 +RX: 128 +TX: 512,512 +TX ACC: 682 +RX: 492 +RX: 20 +TX: 2048,1024 +TX ACC: 1706 +RX: 492 +RX: 492 +RX: 40 +TX: 2,2 +TX ACC: 1708 +RX: 2 +TX: 8,8 +TX ACC: 1716 +RX: 8 +TX: 32,32 +TX ACC: 1748 +RX: 32 +TX: 128,128 +TX ACC: 1876 +RX: 128 +TX: 512,512 +TX ACC: 2388 +RX: 492 +RX: 20 +TX: 2048,1024 +TX ACC: 3412 +RX: 492 +RX: 492 +RX: 40 +TX: 2,2 +TX ACC: 3414 +RX: 2 +TX: 8,8 +TX ACC: 3422 +RX: 8 +TX: 32,32 +TX ACC: 3454 +RX: 32 +TX: 128,128 +TX ACC: 3582 +RX: 128 +TX: 512,512 +TX ACC: 4094 +RX: 492 +RX: 20 +TX: 2,2 +TX ACC: 4096 +RX: 2 +TX: 1,1 +TX ACC: 4097 +RX: 1 +TX: 4,4 +TX ACC: 4101 +RX: 4 +TX: 16,16 +TX ACC: 4117 +RX: 16 +TX: 64,64 +TX ACC: 4181 +RX: 64 +TX: 256,256 +TX ACC: 4437 +RX: 256 +TX: 1024,1024 +TX ACC: 5461 +RX: 164 +RX: 492 +RX: 368 +TX: 1,1 +TX ACC: 5462 +RX: 1 +TX: 4,4 +TX ACC: 5466 +RX: 4 +TX: 16,16 +TX ACC: 5482 +RX: 16 +TX: 64,64 +TX ACC: 5546 +RX: 64 +TX: 256,256 +TX ACC: 5802 +RX: 256 +TX: 1024,1024 +TX ACC: 6826 +RX: 164 +RX: 492 +RX: 368 +TX: 1366,1024 +TX ACC: 7850 +RX: 492 +RX: 492 +RX: 40 +TX: 2,2 +TX ACC: 7852 +RX: 2 +TX: 8,8 +TX ACC: 7860 +RX: 8 +TX: 32,32 +TX ACC: 7892 +RX: 32 +TX: 128,128 +TX ACC: 8020 +RX: 128 +TX: 172,172 +TX ACC: 8192 +RX: 172 + PASS - test_transmit_receive in 5.089 seconds +=================================================================== +TESTSUITE modem_backend_uart_suite succeeded +Running TESTSUITE modem_backend_uart_suite +=================================================================== +START - test_transmit_receive +TX: 2,2 +TX ACC: 2 +RX: 2 +TX: 8,8 +TX ACC: 10 +RX: 8 +TX: 32,32 +TX ACC: 42 +RX: 32 +TX: 128,128 +TX ACC: 170 +RX: 128 +TX: 512,512 +TX ACC: 682 +RX: 492 +RX: 20 +TX: 2048,1024 +TX ACC: 1706 +RX: 492 +RX: 492 +RX: 40 +TX: 2,2 +TX ACC: 1708 +RX: 2 +TX: 8,8 +TX ACC: 1716 +RX: 8 +TX: 32,32 +TX ACC: 1748 +RX: 32 +TX: 128,128 +TX ACC: 1876 +RX: 128 +TX: 512,512 +TX ACC: 2388 +RX: 492 +RX: 20 +TX: 2048,1024 +TX ACC: 3412 +RX: 492 +RX: 492 +RX: 40 +TX: 2,2 +TX ACC: 3414 +RX: 2 +TX: 8,8 +TX ACC: 3422 +RX: 8 +TX: 32,32 +TX ACC: 3454 +RX: 32 +TX: 128,128 +TX ACC: 3582 +RX: 128 +TX: 512,512 +TX ACC: 4094 +RX: 492 +RX: 20 +TX: 2,2 +TX ACC: 4096 +RX: 2 +TX: 1,1 +TX ACC: 4097 +RX: 1 +TX: 4,4 +TX ACC: 4101 +RX: 4 +TX: 16,16 +TX ACC: 4117 +RX: 16 +TX: 64,64 +TX ACC: 4181 +RX: 64 +TX: 256,256 +TX ACC: 4437 +RX: 256 +TX: 1024,1024 +TX ACC: 5461 +RX: 164 +RX: 492 +RX: 368 +TX: 1,1 +TX ACC: 5462 +RX: 1 +TX: 4,4 +TX ACC: 5466 +RX: 4 +TX: 16,16 +TX ACC: 5482 +RX: 16 +TX: 64,64 +TX ACC: 5546 +RX: 64 +TX: 256,256 +TX ACC: 5802 +RX: 256 +TX: 1024,1024 +TX ACC: 6826 +RX: 164 +RX: 492 +RX: 368 +TX: 1366,1024 +TX ACC: 7850 +RX: 492 +RX: 492 +RX: 40 +TX: 2,2 +TX ACC: 7852 +RX: 2 +TX: 8,8 +TX ACC: 7860 +RX: 8 +TX: 32,32 +TX ACC: 7892 +RX: 32 +TX: 128,128 +TX ACC: 8020 +RX: 128 +TX: 172,172 +TX ACC: 8192 +RX: 172 + PASS - test_transmit_receive in 5.089 seconds +=================================================================== +START - test_transmit_receive +TX: 2,2 +TX ACC: 2 +RX: 2 +TX: 8,8 +TX ACC: 10 +RX: 8 +TX: 32,32 +TX ACC: 42 +RX: 32 +TX: 128,128 +TX ACC: 170 +RX: 128 +TX: 512,512 +TX ACC: 682 +RX: 492 +RX: 20 +TX: 2048,1024 +TX ACC: 1706 +RX: 492 +RX: 492 +RX: 40 +TX: 2,2 +TX ACC: 1708 +RX: 2 +TX: 8,8 +TX ACC: 1716 +RX: 8 +TX: 32,32 +TX ACC: 1748 +RX: 32 +TX: 128,128 +TX ACC: 1876 +RX: 128 +TX: 512,512 +TX ACC: 2388 +RX: 492 +RX: 20 +TX: 2048,1024 +TX ACC: 3412 +RX: 492 +RX: 492 +RX: 40 +TX: 2,2 +TX ACC: 3414 +RX: 2 +TX: 8,8 +TX ACC: 3422 +RX: 8 +TX: 32,32 +TX ACC: 3454 +RX: 32 +TX: 128,128 +TX ACC: 3582 +RX: 128 +TX: 512,512 +TX ACC: 4094 +RX: 492 +RX: 20 +TX: 2,2 +TX ACC: 4096 +RX: 2 +TX: 1,1 +TX ACC: 4097 +RX: 1 +TX: 4,4 +TX ACC: 4101 +RX: 4 +TX: 16,16 +TX ACC: 4117 +RX: 16 +TX: 64,64 +TX ACC: 4181 +RX: 64 +TX: 256,256 +TX ACC: 4437 +RX: 256 +TX: 1024,1024 +TX ACC: 5461 +RX: 164 +RX: 492 +RX: 368 +TX: 1,1 +TX ACC: 5462 +RX: 1 +TX: 4,4 +TX ACC: 5466 +RX: 4 +TX: 16,16 +TX ACC: 5482 +RX: 16 +TX: 64,64 +TX ACC: 5546 +RX: 64 +TX: 256,256 +TX ACC: 5802 +RX: 256 +TX: 1024,1024 +TX ACC: 6826 +RX: 164 +RX: 492 +RX: 368 +TX: 1366,1024 +TX ACC: 7850 +RX: 492 +RX: 492 +RX: 40 +TX: 2,2 +TX ACC: 7852 +RX: 2 +TX: 8,8 +TX ACC: 7860 +RX: 8 +TX: 32,32 +TX ACC: 7892 +RX: 32 +TX: 128,128 +TX ACC: 8020 +RX: 128 +TX: 172,172 +TX ACC: 8192 +RX: 172 + PASS - test_transmit_receive in 5.089 seconds +=================================================================== +START - test_transmit_receive +TX: 2,2 +TX ACC: 2 +RX: 2 +TX: 8,8 +TX ACC: 10 +RX: 8 +TX: 32,32 +TX ACC: 42 +RX: 32 +TX: 128,128 +TX ACC: 170 +RX: 128 +TX: 512,512 +TX ACC: 682 +RX: 492 +RX: 20 +TX: 2048,1024 +TX ACC: 1706 +RX: 492 +RX: 492 +RX: 40 +TX: 2,2 +TX ACC: 1708 +RX: 2 +TX: 8,8 +TX ACC: 1716 +RX: 8 +TX: 32,32 +TX ACC: 1748 +RX: 32 +TX: 128,128 +TX ACC: 1876 +RX: 128 +TX: 512,512 +TX ACC: 2388 +RX: 492 +RX: 20 +TX: 2048,1024 +TX ACC: 3412 +RX: 492 +RX: 492 +RX: 40 +TX: 2,2 +TX ACC: 3414 +RX: 2 +TX: 8,8 +TX ACC: 3422 +RX: 8 +TX: 32,32 +TX ACC: 3454 +RX: 32 +TX: 128,128 +TX ACC: 3582 +RX: 128 +TX: 512,512 +TX ACC: 4094 +RX: 492 +RX: 20 +TX: 2,2 +TX ACC: 4096 +RX: 2 +TX: 1,1 +TX ACC: 4097 +RX: 1 +TX: 4,4 +TX ACC: 4101 +RX: 4 +TX: 16,16 +TX ACC: 4117 +RX: 16 +TX: 64,64 +TX ACC: 4181 +RX: 64 +TX: 256,256 +TX ACC: 4437 +RX: 256 +TX: 1024,1024 +TX ACC: 5461 +RX: 164 +RX: 492 +RX: 368 +TX: 1,1 +TX ACC: 5462 +RX: 1 +TX: 4,4 +TX ACC: 5466 +RX: 4 +TX: 16,16 +TX ACC: 5482 +RX: 16 +TX: 64,64 +TX ACC: 5546 +RX: 64 +TX: 256,256 +TX ACC: 5802 +RX: 256 +TX: 1024,1024 +TX ACC: 6826 +RX: 164 +RX: 492 +RX: 368 +TX: 1366,1024 +TX ACC: 7850 +RX: 492 +RX: 492 +RX: 40 +TX: 2,2 +TX ACC: 7852 +RX: 2 +TX: 8,8 +TX ACC: 7860 +RX: 8 +TX: 32,32 +TX ACC: 7892 +RX: 32 +TX: 128,128 +TX ACC: 8020 +RX: 128 +TX: 172,172 +TX ACC: 8192 +RX: 172 + PASS - test_transmit_receive in 5.089 seconds +=================================================================== +TESTSUITE modem_backend_uart_suite succeeded + +------ TESTSUITE SUMMARY START ------ + +SUITE PASS - 100.00% [modem_backend_uart_suite]: pass = 1, fail = 0, skip = 0, total = 1 duration = 5.089 seconds + - PASS - [modem_backend_uart_suite.test_transmit_receive] duration = 5.089 seconds + +------ TESTSUITE SUMMARY END ------ + +=================================================================== +RunID: e49cc6efb29e72c3a38fb9b747f71a48 +PROJECT EXECUTION SUCCESSFUL diff --git a/tests/subsys/modem/backends/uart/src/main.c b/tests/subsys/modem/backends/uart/src/main.c index d28367948dfa6..0d9bc23a3c5e7 100644 --- a/tests/subsys/modem/backends/uart/src/main.c +++ b/tests/subsys/modem/backends/uart/src/main.c @@ -36,7 +36,7 @@ K_SEM_DEFINE(receive_ready_sem, 0, 1); /*************************************************************************************************/ /* Buffers */ /*************************************************************************************************/ -static uint8_t backend_receive_buffer[4096]; +static uint8_t backend_receive_buffer[512]; static uint8_t backend_transmit_buffer[4096]; RING_BUF_DECLARE(transmit_ring_buf, 4096); static uint8_t receive_buffer[4096]; @@ -134,6 +134,7 @@ static int receive_prng(void) int ret = 0; if (k_sem_take(&receive_ready_sem, K_NO_WAIT) == 0) { + k_sleep(K_MSEC(100)); ret = modem_pipe_receive(pipe, receive_buffer, sizeof(receive_buffer)); if (ret < 0) { return -EFAULT; @@ -157,7 +158,7 @@ static void *test_modem_backend_uart_setup(void) const struct modem_backend_uart_config config = { .uart = uart, .receive_buf = backend_receive_buffer, - .receive_buf_size = 1024, + .receive_buf_size = sizeof(backend_receive_buffer), .transmit_buf = backend_transmit_buffer, .transmit_buf_size = 1024, };