fixes for lane splitting in single plane

Signed-off-by: Alexander Maslennikov <amaslennikov@nvidia.com>

Author: almaslennikov

bindata/spectrum-x/RA2.1.yaml

@@ -28,27 +28,27 @@ breakout:
       mlxconfig: "LAG_RESOURCE_ALLOCATION"
     # CX8-specific parameters  
     - name: Lanes for Module 0 and Port 1
-      value: "0..7"
-      alternativeValue: "[0,1,2,3,4,5,6,7]"
+      value: "0..3"
+      alternativeValue: "[0,1,2,3]"
       valueType: string
       dmsPath: /nvidia/device/config/module[module-id=0]/port[port-id=1]/lanes
       deviceId: "1023"
     - name: Lanes for Module 0 and Port 255
-      value: "8..15"
-      alternativeValue: "[8,9,10,11,12,13,14,15]"
+      value: "4..15"
+      alternativeValue: "[4,5,6,7,8,9,10,11,12,13,14,15]"
       valueType: string
       dmsPath: /nvidia/device/config/module[module-id=0]/port[port-id=255]/lanes
       deviceId: "1023"
     # BF3-specific parameters  
     - name: Lanes for Module 0 and Port 1
-      value: "0..3"
-      alternativeValue: "[0,1,2,3]"
+      value: "0..1"
+      alternativeValue: "[0,1]"
       valueType: string
       dmsPath: /nvidia/device/config/module[module-id=0]/port[port-id=1]/lanes
       deviceId: "a2dc"
     - name: Lanes for Module 0 and Port 255
-      value: "4..7"
-      alternativeValue: "[4,5,6,7]"
+      value: "2..7"
+      alternativeValue: "[2,3,4,5,6,7]"
       valueType: string
       dmsPath: /nvidia/device/config/module[module-id=0]/port[port-id=255]/lanes
       deviceId: "a2dc"