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[RISCV][llvm] Remove custom legalization of fixed-length vector SPLAT_VECTOR (llvm#172870)
BUILD_VECTOR is combined to SPLAT_VECTOR if operation action of SPLAT_VECTOR is not Expand. However we already have custom handle of BUILD_VECTOR for fixed-length vector which has explicit constant VL instead of making it VLMAX if lowered through SPLAT_VECTOR.
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+13
-12
lines changed

2 files changed

+13
-12
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llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -91,10 +91,9 @@ static cl::opt<bool>
9191
static const unsigned ZvfbfaVPOps[] = {
9292
ISD::VP_FNEG, ISD::VP_FABS, ISD::VP_FCOPYSIGN};
9393
static const unsigned ZvfbfaOps[] = {
94-
ISD::FNEG, ISD::FABS, ISD::FCOPYSIGN, ISD::SPLAT_VECTOR,
95-
ISD::FADD, ISD::FSUB, ISD::FMUL, ISD::FMINNUM,
96-
ISD::FMAXNUM, ISD::FMINIMUMNUM, ISD::FMAXIMUMNUM, ISD::FMINIMUM,
97-
ISD::FMAXIMUM};
94+
ISD::FNEG, ISD::FABS, ISD::FCOPYSIGN, ISD::FADD,
95+
ISD::FSUB, ISD::FMUL, ISD::FMINNUM, ISD::FMAXNUM,
96+
ISD::FMINIMUMNUM, ISD::FMAXIMUMNUM, ISD::FMINIMUM, ISD::FMAXIMUM};
9897

9998
RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
10099
const RISCVSubtarget &STI)
@@ -4547,7 +4546,8 @@ static SDValue lowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG,
45474546
// Proper support for f16 requires Zvfh. bf16 always requires special
45484547
// handling. We need to cast the scalar to integer and create an integer
45494548
// build_vector.
4550-
if ((EltVT == MVT::f16 && !Subtarget.hasStdExtZvfh()) || EltVT == MVT::bf16) {
4549+
if ((EltVT == MVT::f16 && !Subtarget.hasStdExtZvfh()) ||
4550+
(EltVT == MVT::bf16 && !Subtarget.hasVInstructionsBF16())) {
45514551
MVT IVT = VT.changeVectorElementType(MVT::i16);
45524552
SmallVector<SDValue, 16> NewOps(Op.getNumOperands());
45534553
for (const auto &[I, U] : enumerate(Op->ops())) {

llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-splat-bf16.ll

Lines changed: 8 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -23,7 +23,7 @@ define <8 x bfloat> @splat_v8bf16(ptr %x, bfloat %y) {
2323
;
2424
; ZVFBFA-LABEL: splat_v8bf16:
2525
; ZVFBFA: # %bb.0:
26-
; ZVFBFA-NEXT: vsetvli a0, zero, e16alt, m1, ta, ma
26+
; ZVFBFA-NEXT: vsetivli zero, 8, e16alt, m1, ta, ma
2727
; ZVFBFA-NEXT: vfmv.v.f v8, fa0
2828
; ZVFBFA-NEXT: ret
2929
%a = insertelement <8 x bfloat> poison, bfloat %y, i32 0
@@ -48,7 +48,7 @@ define <16 x bfloat> @splat_16bf16(ptr %x, bfloat %y) {
4848
;
4949
; ZVFBFA-LABEL: splat_16bf16:
5050
; ZVFBFA: # %bb.0:
51-
; ZVFBFA-NEXT: vsetvli a0, zero, e16alt, m2, ta, ma
51+
; ZVFBFA-NEXT: vsetivli zero, 16, e16alt, m2, ta, ma
5252
; ZVFBFA-NEXT: vfmv.v.f v8, fa0
5353
; ZVFBFA-NEXT: ret
5454
%a = insertelement <16 x bfloat> poison, bfloat %y, i32 0
@@ -75,7 +75,8 @@ define <64 x bfloat> @splat_64bf16(ptr %x, bfloat %y) {
7575
;
7676
; ZVFBFA-LABEL: splat_64bf16:
7777
; ZVFBFA: # %bb.0:
78-
; ZVFBFA-NEXT: vsetvli a0, zero, e16alt, m8, ta, ma
78+
; ZVFBFA-NEXT: li a0, 64
79+
; ZVFBFA-NEXT: vsetvli zero, a0, e16alt, m8, ta, ma
7980
; ZVFBFA-NEXT: vfmv.v.f v8, fa0
8081
; ZVFBFA-NEXT: ret
8182
%a = insertelement <64 x bfloat> poison, bfloat %y, i32 0
@@ -98,7 +99,7 @@ define <8 x bfloat> @splat_zero_v8bf16(ptr %x) {
9899
;
99100
; ZVFBFA-LABEL: splat_zero_v8bf16:
100101
; ZVFBFA: # %bb.0:
101-
; ZVFBFA-NEXT: vsetvli a0, zero, e16, m1, ta, ma
102+
; ZVFBFA-NEXT: vsetivli zero, 8, e16, m1, ta, ma
102103
; ZVFBFA-NEXT: vmv.v.i v8, 0
103104
; ZVFBFA-NEXT: ret
104105
ret <8 x bfloat> splat (bfloat 0.0)
@@ -119,7 +120,7 @@ define <16 x bfloat> @splat_zero_16bf16(ptr %x) {
119120
;
120121
; ZVFBFA-LABEL: splat_zero_16bf16:
121122
; ZVFBFA: # %bb.0:
122-
; ZVFBFA-NEXT: vsetvli a0, zero, e16, m2, ta, ma
123+
; ZVFBFA-NEXT: vsetivli zero, 16, e16, m2, ta, ma
123124
; ZVFBFA-NEXT: vmv.v.i v8, 0
124125
; ZVFBFA-NEXT: ret
125126
ret <16 x bfloat> splat (bfloat 0.0)
@@ -143,7 +144,7 @@ define <8 x bfloat> @splat_negzero_v8bf16(ptr %x) {
143144
; ZVFBFA-LABEL: splat_negzero_v8bf16:
144145
; ZVFBFA: # %bb.0:
145146
; ZVFBFA-NEXT: lui a0, 1048568
146-
; ZVFBFA-NEXT: vsetvli a1, zero, e16, m1, ta, ma
147+
; ZVFBFA-NEXT: vsetivli zero, 8, e16, m1, ta, ma
147148
; ZVFBFA-NEXT: vmv.v.x v8, a0
148149
; ZVFBFA-NEXT: ret
149150
ret <8 x bfloat> splat (bfloat -0.0)
@@ -167,7 +168,7 @@ define <16 x bfloat> @splat_negzero_16bf16(ptr %x) {
167168
; ZVFBFA-LABEL: splat_negzero_16bf16:
168169
; ZVFBFA: # %bb.0:
169170
; ZVFBFA-NEXT: lui a0, 1048568
170-
; ZVFBFA-NEXT: vsetvli a1, zero, e16, m2, ta, ma
171+
; ZVFBFA-NEXT: vsetivli zero, 16, e16, m2, ta, ma
171172
; ZVFBFA-NEXT: vmv.v.x v8, a0
172173
; ZVFBFA-NEXT: ret
173174
ret <16 x bfloat> splat (bfloat -0.0)

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