-
-
Notifications
You must be signed in to change notification settings - Fork 47
Description
Hi
I recently contact JLCPCB service to produce PCBs for SDRAM XSD v2.5. I used this gerber file: https://github.com/MiSTer-devel/Hardware_MiSTer/blob/master/releases/sdram_xsd_2.5.zip
Unfortunately, they sent me an answer containing question and I am unable to reply to them because of lack of knowledge.
Please find below a copy of their message.
Hi Sir,
Well got your order with many thanks~
Sorry to bother you, but there is an issue that we want to confirm with you before proceeding.
As shown below, please kindly confirm that :
1.the top side is Tenting via holes
2.but the bottom side there is both "Enting Vias " and "oprning vias "
could ypu please kindky confirm that whether we can do your boards as your gerber file ??
Your early reply will be highly appreciated!
Thank you so much!
Please help me to write appropriate answer to JLCPCB service.
Thank you for your attention.

