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Description
There are transistor simulations of both PPU chips:
PPU1
https://www.qmtpro.com/~nes/chipimages/visual5c77/
Nodenames: https://www.qmtpro.com/~nes/chipimages/visual5c77/nodenames.js
PPU2
https://www.qmtpro.com/~nes/chipimages/visual5c78/
Nodenames: https://www.qmtpro.com/~nes/chipimages/visual5c78/nodenames.js
Not everything works correctly but we can find out a lot of the low level behavior of the chips.
Nodes that seems to be wrongly named or broken:
PPU1
_last_on_screen_line, _last_on_screen_line_not_fblankingThese seem to be first line of VBlank_spr_vpos_adder_sumThis adder seems to be_/oam_vpos + _opvctbut should be_/oam_vpos + _opvct + 1akaopvct - oam_vpos_spr_tile_vofsThis V offset is inverted- Sprite tile fetching always reads OAM sprite 127
wwarkreal-amano
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