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pcba: add KiCad schematic, project file, and BOM for breakout board
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‎pcba/BOM.md‎

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# Bill of Materials - FIR Accelerator Breakout Board
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| Ref | Value | Description | Footprint | Qty |
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|---|---|---|---|---|
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| U1 | Caravel SoC | SKY130A Caravel QFN-64 | QFN-64 | 1 |
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| R1 | 10k | RC filter resistor, GPIO[9] PWM output | R_0402 | 1 |
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| C1 | 100nF | RC filter capacitor, f_c=159Hz | C_0402 | 1 |
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| C2 | 100nF | Decoupling cap, VCCD | C_0402 | 1 |
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| C3 | 100nF | Decoupling cap, VDDA | C_0402 | 1 |
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| J1 | GPIO8_IN | Bitstream input header 2-pin | PinHeader_1x02_2.54mm | 1 |
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| J2 | ANALOG_OUT | RC-filtered analog output header | PinHeader_1x02_2.54mm | 1 |
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| J3 | UART_DEBUG | UART debug header 4-pin (VCC/TX/RX/GND) | PinHeader_1x04_2.54mm | 1 |
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| J4 | PWR_3V3 | Power input header (3.3V/GND) | PinHeader_1x02_2.54mm | 1 |
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## Notes
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- RC lowpass filter on GPIO[9]: R1=10kΩ, C1=100nF → f_c = 1/(2π×10k×100n) = 159 Hz
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- In LFSR test mode (CTRL[4]=1), no external input needed on GPIO[8]
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- UART header connects to Caravel management core for firmware debug
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- All decoupling caps should be placed as close to chip power pins as possible

‎pcba/fir_accel_breakout.kicad_pro‎

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{
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"board": {},
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"meta": {
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"filename": "fir_accel_breakout.kicad_pro",
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"version": 1
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},
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"schematic": {
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"legacy_lib_dir": "",
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"legacy_lib_list": []
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}
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}

‎pcba/fir_accel_breakout.kicad_sch‎

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(kicad_sch (version 20230121) (generator eeschema)
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(paper "A4")
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(title_block
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(title "FIR Accelerator Caravel SoC - Breakout Board")
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(date "2026-03-20")
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(rev "v1.0")
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(company "Mummana Jagadeesh")
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(comment 1 "SKY130A Caravel User Project")
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(comment 2 "GPIO[8]=Bitstream Input, GPIO[9]=PWM DAC Output")
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