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Reworked examles to support reproducible builds. (#38)
For each project in this repository: - Updated the vcpkg-configuration.json file. - Reworked the examle to support reproducible builds. - Added a compiler configuration file (cdefault.yml). - Updated the workflow. - Updated the README.md documentation file. --------- Co-authored-by: [email protected] <Eve07@Git>
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.github/workflows/CubeMX-CI.yml

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- name: Build project with AC6
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working-directory: ./CubeMX/
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run: cbuild CubeMX.csolution.yml --update-rte --packs --toolchain AC6 --rebuild
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run: cbuild CubeMX.csolution.yml --packs --toolchain AC6 --rebuild

.github/workflows/DualCore-CI.yml

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- name: Build HelloWorld with AC6 and all contexts
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working-directory: ./DualCore/
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run: cbuild HelloWorld.csolution.yml --update-rte --packs --toolchain AC6
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run: cbuild HelloWorld.csolution.yml --packs --toolchain AC6
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- name: Upload HelloWorld AC6 build Artifacts
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uses: actions/upload-artifact@v4

.github/workflows/SimpleTZ-CI.yml

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name: "SimpleTZ: Test Build and Execution"
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on:
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workflow_dispatch:
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pull_request:
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branches: [main]
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paths:
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- SimpleTrustZone/**
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- .github/workflows/SimpleTZ-CI.yml
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push:
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branches: [main]
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paths:
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- SimpleTrustZone/**
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- .github/workflows/SimpleTZ-CI.yml
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schedule:
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- cron: '00 20 * * 6'
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jobs:
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Build:
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strategy:
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matrix:
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compiler: [
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{name: AC6, ext: axf},
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{name: GCC, ext: elf}
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]
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build: [
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{type: Release},
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{type: Debug}
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]
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runs-on: ubuntu-latest
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steps:
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- name: Checkout repo
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uses: actions/checkout@v4
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- name: Install tools
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uses: ARM-software/cmsis-actions/vcpkg@v1
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with:
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config: ".ci/vcpkg-configuration.json"
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- name: Activate Arm tool license
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uses: ARM-software/cmsis-actions/armlm@v1
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- name: Build project CM33_s and CM33_ns for build-type ${{ matrix.build.type }} with ${{ matrix.compiler.name }}
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working-directory: ./SimpleTrustZone/
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run: cbuild SimpleTZ.csolution.yml --update-rte --packs --context .${{ matrix.build.type }}+CS300 --toolchain ${{ matrix.compiler.name }}
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- name: Execute project CM33_s and CM33_ns for build-type ${{ matrix.build.type }} with ${{ matrix.compiler.name }} using FVP_Corstone_SSE-300
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working-directory: ./SimpleTrustZone/
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run: |
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FVP_Corstone_SSE-300 \
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-a ./out/CM33_s/CS300/${{ matrix.build.type }}/CM33_s.${{ matrix.compiler.ext }} \
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-a ./out/CM33_ns/CS300/${{ matrix.build.type }}/CM33_ns.${{ matrix.compiler.ext }} \
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-f ./../FVP/FVP_Corstone_SSE-300/fvp_config.txt \
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-C mps3_board.uart0.out_file=./out/${{ matrix.compiler.name }}_${{ matrix.build.type }}_fvp_stdout.log \
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--simlimit 60 --stat
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echo " Show simulation UART output for project CM33_s and CM33_s"
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cat ./out/${{ matrix.compiler.name }}_${{ matrix.build.type }}_fvp_stdout.log
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name: "SimpleTZ: Test Build and Execution"
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on:
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workflow_dispatch:
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pull_request:
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branches: [main]
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paths:
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- SimpleTrustZone/**
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- .github/workflows/SimpleTZ-CI.yml
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push:
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branches: [main]
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paths:
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- SimpleTrustZone/**
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- .github/workflows/SimpleTZ-CI.yml
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schedule:
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- cron: '00 20 * * 6'
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jobs:
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Build:
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strategy:
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matrix:
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compiler: [
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{name: AC6, ext: axf}
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]
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build: [
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{type: Release},
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{type: Debug}
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]
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runs-on: ubuntu-latest
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steps:
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- name: Checkout repo
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uses: actions/checkout@v4
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- name: Install tools
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uses: ARM-software/cmsis-actions/vcpkg@v1
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with:
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config: ".ci/vcpkg-configuration.json"
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- name: Activate Arm tool license
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uses: ARM-software/cmsis-actions/armlm@v1
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- name: Build project CM33_s and CM33_ns for build-type ${{ matrix.build.type }} with ${{ matrix.compiler.name }}
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working-directory: ./SimpleTrustZone/
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run: cbuild SimpleTZ.csolution.yml --packs --context .${{ matrix.build.type }}+AVH --toolchain ${{ matrix.compiler.name }}
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- name: Execute project CM33_s and CM33_ns for build-type ${{ matrix.build.type }} with ${{ matrix.compiler.name }} using FVP_MPS2_Cortex-M33
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working-directory: ./SimpleTrustZone/
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run: |
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FVP_MPS2_Cortex-M33 \
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-a ./out/CM33_ns/AVH/${{ matrix.build.type }}/CM33_ns.${{ matrix.compiler.ext }} \
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-a ./out/CM33_s/AVH/${{ matrix.build.type }}/CM33_s.${{ matrix.compiler.ext }} \
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-f ./../FVP/FVP_MPS2_Cortex-M33/fvp_config.txt \
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--stat

CubeMX/CubeMX.cbuild-pack.yml

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cbuild-pack:
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resolved-packs:
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- resolved-pack: ARM::CMSIS@6.0.0
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- resolved-pack: ARM::CMSIS@6.1.0
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selected-by-pack:
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- resolved-pack: ARM::CMSIS-RTX@5.8.0
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- ARM::CMSIS@^6.0.0
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- resolved-pack: ARM::CMSIS-RTX@5.9.0
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selected-by-pack:
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- ARM::CMSIS-RTX
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- resolved-pack: Keil::[email protected]-dev0
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- ARM::CMSIS-RTX@^5.9.0
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- resolved-pack: Keil::[email protected]
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selected-by-pack:
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- Keil::B-U585I-IOT02A_BSP@>=2.0.0-0
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- resolved-pack: Keil::[email protected]-dev0
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- Keil::B-U585I-IOT02A_BSP@^2.0.0
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- resolved-pack: Keil::[email protected]
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selected-by-pack:
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- Keil::STM32U5xx_DFP@>=3.0.0-0
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- Keil::STM32U5xx_DFP@^3.0.0
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#ifndef REGIONS_B_U585I_IOT02A_H
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#define REGIONS_B_U585I_IOT02A_H
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//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
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//------ With VS Code: Open Preview for Configuration Wizard -------------------
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// <n> Auto-generated using information from packs
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// <i> Device Family Pack (DFP): Keil::[email protected]
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// <i> Board Support Pack (BSP): Keil::[email protected]
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// <h> ROM Configuration
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// =======================
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// <h> __ROM0 (is rx memory: Flash from DFP)
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// <o> Base address <0x0-0xFFFFFFFF:8>
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// <i> Defines base address of memory region. Default: 0x08000000
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// <i> Contains Startup and Vector Table
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#define __ROM0_BASE 0x08000000
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// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
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// <i> Defines size of memory region. Default: 0x00200000
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#define __ROM0_SIZE 0x00200000
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// </h>
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// <h> __ROM1 (unused)
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// <o> Base address <0x0-0xFFFFFFFF:8>
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// <i> Defines base address of memory region.
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#define __ROM1_BASE 0
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// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
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// <i> Defines size of memory region.
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#define __ROM1_SIZE 0
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// </h>
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// <h> __ROM2 (unused)
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// <o> Base address <0x0-0xFFFFFFFF:8>
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// <i> Defines base address of memory region.
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#define __ROM2_BASE 0
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// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
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// <i> Defines size of memory region.
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#define __ROM2_SIZE 0
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// </h>
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// <h> __ROM3 (unused)
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// <o> Base address <0x0-0xFFFFFFFF:8>
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// <i> Defines base address of memory region.
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#define __ROM3_BASE 0
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// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
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// <i> Defines size of memory region.
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#define __ROM3_SIZE 0
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// </h>
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// </h>
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// <h> RAM Configuration
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// =======================
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// <h> __RAM0 (is rwx memory: SRAM1_2 from DFP)
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// <o> Base address <0x0-0xFFFFFFFF:8>
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// <i> Defines base address of memory region. Default: 0x20000000
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// <i> Contains uninitialized RAM, Stack, and Heap
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#define __RAM0_BASE 0x20000000
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// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
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// <i> Defines size of memory region. Default: 0x00040000
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#define __RAM0_SIZE 0x00040000
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// </h>
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// <h> __RAM1 (unused)
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// <o> Base address <0x0-0xFFFFFFFF:8>
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// <i> Defines base address of memory region.
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#define __RAM1_BASE 0
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// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
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// <i> Defines size of memory region.
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#define __RAM1_SIZE 0
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// </h>
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// <h> __RAM2 (unused)
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// <o> Base address <0x0-0xFFFFFFFF:8>
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// <i> Defines base address of memory region.
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#define __RAM2_BASE 0
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// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
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// <i> Defines size of memory region.
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#define __RAM2_SIZE 0
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// </h>
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// <h> __RAM3 (unused)
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// <o> Base address <0x0-0xFFFFFFFF:8>
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// <i> Defines base address of memory region.
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#define __RAM3_BASE 0
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// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
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// <i> Defines size of memory region.
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#define __RAM3_SIZE 0
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// </h>
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// </h>
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// <h> Stack / Heap Configuration
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// <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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// <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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#define __STACK_SIZE 0x00000200
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#define __HEAP_SIZE 0x00000C00
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// </h>
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// <n> Resources that are not allocated to linker regions
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// <i> rwx RAM: SRAM3 from DFP: BASE: 0x20040000 SIZE: 0x00080000
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// <i> rwx RAM: RAM-External from BSP: BASE: 0x90000000 SIZE: 0x00800000
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// <i> rx ROM: Flash-External from BSP: BASE: 0x70000000 SIZE: 0x04000000
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#endif /* REGIONS_B_U585I_IOT02A_H */
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/*
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* CSOLUTION generated file: DO NOT EDIT!
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* Generated by: csolution version 2.6.0
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*
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* Project: 'CubeMX.Debug+MyBoard'
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* Target: 'Debug+MyBoard'
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*/
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#ifndef RTE_COMPONENTS_H
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#define RTE_COMPONENTS_H
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/* ARM::CMSIS:RTOS2:Keil RTX5&[email protected] */
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#define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
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#define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
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#define RTE_CMSIS_RTOS2_RTX5_SOURCE /* CMSIS-RTOS2 Keil RTX5 Source */
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/* Keil::Device:[email protected] */
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#define RTE_DEVICE_CUBE_MX
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#define CMSIS_device_header "stm32u5xx.h"
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#endif /* RTE_COMPONENTS_H */
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/*
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* CSOLUTION generated file: DO NOT EDIT!
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* Generated by: csolution version 2.6.0
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*
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* Project: 'CubeMX.Release+MyBoard'
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* Target: 'Release+MyBoard'
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*/
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#ifndef RTE_COMPONENTS_H
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#define RTE_COMPONENTS_H
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/* ARM::CMSIS:RTOS2:Keil RTX5&[email protected] */
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#define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
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#define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
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#define RTE_CMSIS_RTOS2_RTX5_SOURCE /* CMSIS-RTOS2 Keil RTX5 Source */
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/* Keil::Device:[email protected] */
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#define RTE_DEVICE_CUBE_MX
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#define CMSIS_device_header "stm32u5xx.h"
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#endif /* RTE_COMPONENTS_H */
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cbuild-pack:
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resolved-packs:
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- resolved-pack: ARM::[email protected]
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selected-by-pack:
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- ARM::CMSIS@^6.1.0
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- resolved-pack: ARM::[email protected]
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selected-by-pack:
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- ARM::CMSIS-Compiler@^2.1.0
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- resolved-pack: ARM::[email protected]
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selected-by-pack:
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- ARM::CMSIS-RTX@^5.9.0
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- resolved-pack: NXP::[email protected]
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selected-by-pack:
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- NXP::FRDM-K32L3A6_BSP@^19.0.0
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- resolved-pack: NXP::[email protected]
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selected-by-pack:
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- NXP::K32L3A60_DFP@^19.0.0

DualCore/README.md

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# Dual Core Example
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# Dual Core project
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## Generated Project
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This example generates **HelloWorld** executables for the **FRDM-K32L3A6** evaluation board. The used **K32L3** microcontroller is a dual-core MCU ([**Cortex-M0plus**](https://developer.arm.com/Processors/Cortex-M0-Plus) and [**Cortex-M4**](https://developer.arm.com/Processors/Cortex-M4))
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## Prerequisites
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### Tools
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- [CMSIS-Toolbox 2.6.0](https://github.com/Open-CMSIS-Pack/cmsis-toolbox/releases) or higher
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- Arm Compiler 6.22 or higher
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- GCC Compiler 13.2.1 or higher
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- Arm Virtual Hardware for Corstone-300 v11.26.11
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All these tools can be installed via [vcpkg](https://learn.arm.com/learning-paths/microcontrollers/vcpkg-tool-installation/)
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### Packs
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- Required packs are listed in the file [`HelloWorld.csolution.yml`](./HelloWorld.csolution.yml)
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## Project Structure
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The project is generated using the [CMSIS-Toolbox](https://github.com/Open-CMSIS-Pack/cmsis-toolbox/blob/main/docs/build-overview.md) and is defined in [`csolution`](https://github.com/Open-CMSIS-Pack/cmsis-toolbox/blob/main/docs/YML-Input-Format.md) format:
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- [`HelloWorld.csolution.yml`](./HelloWorld.csolution.yml) lists the required packs, defines, hardware targets, and the build-types (along with the compiler).
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- [`./cm0plus/HelloWorld_cm0plus.cproject.yml`](./cm0plus/HelloWorld_cm0plus.cproject.yml) defines the source files and the software components for the **Cortex-M0plus** core.
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- [`./cm4/HelloWorld_cm4.cproject.yml`](./cm4/HelloWorld_cm4.cproject.yml) defines the source files and the software components for the **Cortex-M4** core.
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## Generate the project binaries
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```txt
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> cbuild HelloWorld.csolution.yml --update-rte --packs --toolchain AC6
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> cbuild HelloWorld.csolution.yml --packs --toolchain AC6
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```
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# Notes:
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# Parameters:
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# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
4-
#---------------------------------------------------------------------------------------------------
5-
mps3_board.visualisation.disable-visualisation=1 # (bool , init-time) default = '0' : Enable/disable visualisation
6-
mps3_board.uart0.shutdown_on_eot=1 # (bool , init-time) default = '0' : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available)
7-
#---------------------------------------------------------------------------------------------------
3+
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
4+
#-----------------------------------------------------------------------------------------------------
5+
mps3_board.visualisation.disable-visualisation=1 # (bool , init-time) default = '0' : Enable/disable visualisation
6+
mps3_board.uart0.shutdown_on_eot=1 # (bool , init-time) default = '0' : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available)
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#-----------------------------------------------------------------------------------------------------

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