Description
Environment:
- CMSIS Solution extension: 1.67.1 (release)
- CMSIS Debugger extension: 1.6.0 (release)
- pyOCD: 0.44.0 (shipped with CMSIS Debugger 1.6.0)
I extended a generated *.cbuild-run.yml file for Alif DevKit-E8 with an additional APB-AP. See reproducer section below.
The device is ADIv6 based but I see the same problem with an ADIv5 based STM32H747I-DISCO.
For the STM32H747 I explicitly added the global debug and trace sub-system APB-AP to the debug-topology (with apid=2 and index=2).
Main difference is that for ADIv5 this can be worked around by just updating __ap with the right index in sequences. While ADIv6 AP access depends on declaring new apids in the debug-topology.
Steps to Reproduce
Reproducer *.cbuild-run.yml file for Alif DevKit-E8:
debug-topology:
debugports:
- dpid: 0
accessports:
- apid: 0
address: 0x00200000
- apid: 1
address: 0x00300000
# APSS <------------------------
- apid: 3
address: 0x00050000
processors:
- pname: M55_HP
apid: 0
- pname: M55_HE
apid: 1
When I start a debug session with pyOCD for ULINKplus, then I get an error after auto-detection.
I modified my auto-generated launch.json file to get more log output:
"target": {
"server": "pyocd",
"serverParameters": [
"gdbserver",
"--probe",
"cmsisdap:",
"--connect",
"attach",
"--persist",
"--semihosting",
"--cbuild-run",
"${command:cmsis-csolution.getCbuildRunFile}",
// ---------------->
//"--quiet",
"-vvv",
// <---------------
"--log",
"*.cbuild_run,*server=info"
],
The error output is
. . .
0001477 I 8 hardware breakpoints, 1 literal comparators [fpb]
0001477 D fpb has been disabled [fpb]
0001477 D Creating ITM component [discovery]
0001478 D Running task check_for_cores [sequencer]
0001478 D Running task halt_on_connect [sequencer]
0001478 D Running task post_connect [sequencer]
0001478 D Running task post_connect_hook [sequencer]
0001478 D Running task create_flash [sequencer]
0001478 D flash algo: [stack=0x1f620; 0x1f620 b] [b2=0x1fa20,+0x1fa20] [b1=0x1f620,+0x1f620] [code=0x1fe20,+0x1fe20,0x1e0 b] (ram=0x00000000, 0x20000 b) [flash_algo]
0001479 D Running task notify [sequencer]
0001479 D Setting vector catch to 0x00000001 [cortex_m]
0001480 D uninit session <pyocd.core.session.Session object at 0x0000028E59CEAFD0> [session]
0001480 D uninit board <pyocd.board.board.Board object at 0x0000028E5AE0B2D0> [board]
0001483 C Error: 'NoneType' object cannot be interpreted as an integer [__main__]
Traceback (most recent call last):
File "pyocd\__main__.py", line 163, in run
status = cmd.invoke()
^^^^^^^^^^^^
File "pyocd\subcommands\gdbserver_cmd.py", line 234, in invoke
gdb = GDBServer(session, core=core_number)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
File "pyocd\gdbserver\gdbserver.py", line 356, in __init__
self.listen_socket.init()
File "pyocd\utility\sockets.py", line 75, in init
self.listener.bind((self.host, self.port))
TypeError: 'NoneType' object cannot be interpreted as an integer
gdbserver exited with code 1
Expected Behavior
I can add additional access ports to the debug-topology. In this case even one that has been detected by pyOCD auto-detect:
. . .
0001416 I [0]<00010000:GPIO Control class=9 designer=43b:Arm part=9f0 devtype=00 archid=0000 devid=1:0:0> [rom_table]
0001416 I [1]<00020000:SDC-600 class=9 designer=43b:Arm part=9ef devtype=00 archid=0a57 devid=0:0:0> [rom_table]
0001417 I Enabled power to power domain #0 [rom_table]
0001418 I [2]<00030000:ROM class=9 designer=22b part=759 devtype=00 archid=0af7 devid=20:0:0 pwrid=0> [rom_table]
0001418 D cp=0 prr=1 sysmem=0 w=32 [rom_table]
0001418 I Root Component Class 0x9 ROM table #1 @ 0x030000 (designer=22b part=759) [rom_table]
0001419 I Enabled power to power domain #0 [rom_table]
0001420 I [0]<00040000:AHB-AP CS-600 class=9 designer=43b:Arm part=9e3 devtype=00 archid=0a17 devid=0:0:0 pwrid=0> [rom_table]
--------> 0001420 I [1]<00050000:APB-AP CS-600 class=9 designer=43b:Arm part=9e2 devtype=00 archid=0a17 devid=0:0:0> [rom_table]
0001421 I [2]<00060000:ROM class=9 designer=22b part=75b devtype=00 archid=0af7 devid=20:0:0> [rom_table]
0001421 D cp=0 prr=1 sysmem=0 w=32 [rom_table]
0001421 I Root Component Class 0x9 ROM table #2 @ 0x060000 (designer=22b part=75b) [rom_table]
0001423 I [0]<00070000:AXI-AP CS-600 class=9 designer=43b:Arm part=9e4 devtype=00 archid=0a17 devid=0:0:0> [rom_table]
0001423 I [3]<00100000:ATB Funnel CS-600 class=9 designer=43b:Arm part=9eb devtype=12 archid=0000 devid=33:0:0> [rom_table]
0001424 I [4]<00110000:ATB Replicator CS-600 class=9 designer=43b:Arm part=9ec devtype=22 archid=0000 devid=32:0:0> [rom_table]
0001425 I [5]<00120000:TPIU CS-600 class=9 designer=43b:Arm part=9e7 devtype=11 archid=0000 devid=20:0:0> [rom_table]
. . .
Additional Information
No response
Description
Environment:
I extended a generated *.cbuild-run.yml file for Alif DevKit-E8 with an additional APB-AP. See reproducer section below.
The device is ADIv6 based but I see the same problem with an ADIv5 based STM32H747I-DISCO.
For the STM32H747 I explicitly added the global debug and trace sub-system APB-AP to the
debug-topology(withapid=2andindex=2).Main difference is that for ADIv5 this can be worked around by just updating
__apwith the right index in sequences. While ADIv6 AP access depends on declaring newapids in thedebug-topology.Steps to Reproduce
Reproducer *.cbuild-run.yml file for Alif DevKit-E8:
When I start a debug session with pyOCD for ULINKplus, then I get an error after auto-detection.
I modified my auto-generated
launch.jsonfile to get more log output:The error output is
Expected Behavior
I can add additional access ports to the
debug-topology. In this case even one that has been detected by pyOCD auto-detect:Additional Information
No response