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sys/risc-v: Remove if that causes crash #252
1 parent ab6ef59 commit f0bb068

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2 files changed

+5
-9
lines changed

2 files changed

+5
-9
lines changed

vadl/main/vadl/ast/BehaviorLowering.java

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -574,8 +574,8 @@ public ExpressionNode visit(GroupedExpr expr) {
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@Override
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public ExpressionNode visit(IntegerLiteral expr) {
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return new ConstantNode(Constant.Value.fromInteger(expr.number,
578-
((ConstantType) expr.type()).closestBits()));
577+
// IntegerLiteral should never be reached as it should always be substituted by the typechecker.
578+
throw new IllegalStateException("IntegerLiteral should never be reached in the VIAM lowering.");
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}
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581581
@Override

vadl/test/resources/testSource/sys/risc-v/rvcsr.vadl

Lines changed: 3 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -230,13 +230,9 @@ processor Spike implements RV32IMZicsr = {
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// this processor has no zicsr extension: 0xf1402573 csrr a0, mhartid
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MEM<4>(0x1008) := 0x00000013 // addi x0, x0, 0
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233-
if MLen = 32 then {
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MEM<4>(0x100c) := 0x0202a583 // lw a1, 32(t0)
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MEM<4>(0x1010) := 0x0182a283 // lw t0, 24(t0)
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} else {
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MEM<4>(0x100c) := 0x0202b583 // ld a1, 32(t0)
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MEM<4>(0x1010) := 0x0182b283 // ld t0, 24(t0)
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}
233+
// 32-bit reset version
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MEM<4>(0x100c) := 0x0202a583 // lw a1, 32(t0)
235+
MEM<4>(0x1010) := 0x0182a283 // lw t0, 24(t0)
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MEM<4>(0x1014) := 0x00028067 // jr t0
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// store start_addr in memory (0x80000000)

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