Value prediction development roadmap

[zybzzz]

This is the roadmap for Value prediction development, refer to #181 for the general roadmap development of xs-gem5.

Value prediction roadmap

Benchmarks

1. general: SPEC06
2. specific: other domain-specific applications.

Evaluation Metrics

1. SPEC06 weighted score and IPC speedup
2. Value predictor accuracy rate
3. Value predictor coverage rate

Development Purpose

The current expectation is to integrate the value predictor without massive changes to the microarchitecture. The primary goal of the current development of the value predictor is to integrate the stride-base value predictor for pre-RTL architecture exploration for kunminghu v3.

Development Details

value predictors

• Stride based
  • Enhanced Stride ( ES, from 1st CVP )
• Context based
  • VTAGE ( from HPCA2014 )
• Hybrid

Prediction error strategy

• pipeline flushing.(current implementation)
• Add replay-buffer, re-issue from replay-buffer.

Develop branchs

1. valuepred-base as a main branch of value prediction development.
2. valuepred-(feature) develops different predictors as a downstream branch of valuepred-base.

Does valuepred-base need to be synchronized with the upstream branch xs-dev? Any ideas?

Future

1. co-design with prefetch
2. co-degisn with memory dependency prediction unit

[zybzzz]

@shinezyy @jensen-yan

Preliminary performance data for the value predictor is given, currently only overall scores are given, detailed data has not yet been analyzed. A 5KB stride predictor is given first, as there are still bugs associated with the current predictor design. In comparison, the performance yields a 42% miss, which is very bad. The exact reason for this is yet to be analyzed.

================ Overall baseline=================
Estimated overall score per GHz: 16.200665687457658
Estimated overall score @ 3.0GHz: 48.60199706237297

================ Overall with 5KB EStride VP=================
Estimated overall score per GHz: 9.19388382981961
Estimated overall score @ 3.0GHz: 27.581651489458828

[zybzzz]

The ideal model has passed all checkpoint tests on the server. Applying the ideal model to a 100% accurate stride predictor (for ALU operations) and a 100% accurate load value predictor (for load instructions) has yielded the following results:

baseline:
================ Overall =================
Estimated Int score per GHz: 12.964199185279856
Estimated Int score @ 3.0GHz: 38.89259755583957

stride:
================ Overall =================
Estimated Int score per GHz: 14.67008182376494
Estimated Int score @ 3.0GHz: 44.01024547129482

load value prediction:
================ Overall =================
Estimated Int score per GHz: 16.984080505046855
Estimated Int score @ 3.0GHz: 50.952241515140564

All checkpoints were compiled under the riscv64gcb configuration. Since the current value predictors only target integer instructions, the reported data focuses solely on the integer benchmark (int bench).

Under ideal conditions:

1. The stride predictor achieves a 13% performance improvement.
2. The load value predictor achieves a 31% performance improvement.

The ideal coverage analysis and top-down performance breakdown will be conducted after the code is merged upstream.

@jensen-yan