Merge branch 'master' into aes_hil_update

Author: theonlytruealex

.vscode/launch.json

@@ -28,6 +28,32 @@
             "configFiles": [
                 "${workspaceRoot}/boards/msp_exp432p401r/openocd.cfg",
             ]
-        }
+        },
+        {
+            // Add the following tools to path:
+            // - arm-none-eabi-gdb
+            // - openocd (from ModusToolboxProgtools)
+            "name": "PSC3",
+            // Install marus25.cortex-debug
+            "type": "cortex-debug", // probe-rs also works but has significantly worse debugging experience (fewer breakpoints possible, fewer variables visible)
+            "servertype": "openocd",
+            "request": "launch",
+            "executable": "${workspaceRoot}/target/thumbv8m.main-none-eabi/debug/psc3m5_evk-app.elf",
+            "cwd": "${workspaceRoot}",
+            // Add the OpenOCD binary from ModusToolboxProgtools to your PATH
+            // "serverpath": "/opt/ModusToolboxProgtools-1.7/openocd/bin/openocd",
+            "openOCDLaunchCommands": [
+                "init; reset init;"
+            ],
+            "overrideRestartCommands": [
+                "starti"
+            ],
+            "preLaunchTask": "build.psc3m5_evk",
+            "svdFile": "../psc3.svd",
+            "configFiles": [
+                "${workspaceRoot}/boards/psc3m5_evk/openocd.tcl",
+            ],
+            // "showDevDebugOutput": "raw"
+        },
     ]
 }

.vscode/settings.json

@@ -1,5 +1,6 @@
 {
     "files.insertFinalNewline": true,
+    "debug.onTaskErrors": "abort", // when build tasks fails, debugging is stopped
     "editor.defaultFormatter": "rust-lang.rust-analyzer",
     "editor.formatOnSave": true,
     "rust-analyzer.server.extraEnv": {

.vscode/tasks.json

@@ -0,0 +1,16 @@
+{
+    "version": "2.0.0",
+    "tasks": [
+        {
+            "label": "build.psc3m5_evk",
+            // edit "tock.app" in ~/.config/Code/User/settings.json
+            "command": "APP=${config:tock.app} DEBUG=1 make -C ${workspaceRoot}/boards/psc3m5_evk build-with-app",
+            "type": "shell",
+            "args": [],
+            "presentation": {
+                "reveal": "silent" // only show on errors
+            },
+            "group": "build"
+        },
+    ]
+}

Cargo.lock

@@ -1214,6 +1214,29 @@ dependencies = [
  "unicode-ident",
 ]
 
+[[package]]
+name = "psc3"
+version = "0.2.3-dev"
+dependencies = [
+ "cortexm33",
+ "enum_primitive",
+ "kernel",
+]
+
+[[package]]
+name = "psc3m5_evk"
+version = "0.2.3-dev"
+dependencies = [
+ "capsules-core",
+ "capsules-extra",
+ "capsules-system",
+ "components",
+ "cortexm33",
+ "kernel",
+ "psc3",
+ "tock_build_scripts",
+]
+
 [[package]]
 name = "psoc62xa"
 version = "0.2.3-dev"

Cargo.toml

@@ -49,6 +49,7 @@ members = [
     "boards/apollo3/redboard_artemis_atp",
     "boards/apollo3/redboard_artemis_nano",
     "boards/apollo3/lora_things_plus",
+    "boards/psc3m5_evk",
     "boards/redboard_redv",
     "boards/stm32f3discovery",
     "boards/stm32f412gdiscovery",
@@ -100,6 +101,7 @@ members = [
     "chips/pci-x86",
     "chips/x86_q35",
     "chips/qemu_rv32_virt_chip",
+    "chips/psc3",
     "chips/psoc62xa",
     "chips/rp2040",
     "chips/rp2350",
@@ -238,7 +240,6 @@ upper_case_acronyms = "allow"
 collapsible-match = "allow"
 
 missing_safety_doc = "allow"
-doc_lazy_continuation = "allow"
 
 
 # PERF
@@ -276,7 +277,6 @@ option_if_let_else = "allow"
 cognitive_complexity = "allow"
 
 
-unused_peekable = "allow"
 branches_sharing_code = "allow"
 
 

arch/cortex-m/src/lib.rs

@@ -195,11 +195,7 @@ pub unsafe extern "C" fn initialize_ram_jump_to_main() {
 }
 
 pub unsafe fn print_cortexm_state(writer: &mut dyn Write) {
-    let _ccr = syscall::SCB_REGISTERS[0];
-    let cfsr = syscall::SCB_REGISTERS[1];
-    let hfsr = syscall::SCB_REGISTERS[2];
-    let mmfar = syscall::SCB_REGISTERS[3];
-    let bfar = syscall::SCB_REGISTERS[4];
+    let (_ccr, cfsr, hfsr, mmfar, bfar) = crate::syscall::get_global_scb_registers();
 
     let iaccviol = (cfsr & 0x01) == 0x01;
     let daccviol = (cfsr & 0x02) == 0x02;

arch/cortex-m/src/nvic.rs

@@ -130,29 +130,29 @@ fn number_of_nvic_registers() -> usize {
 }
 
 /// Clear all pending interrupts
-pub unsafe fn clear_all_pending() {
+pub fn clear_all_pending() {
     for icpr in NVIC.icpr.iter().take(number_of_nvic_registers()) {
         icpr.set(!0)
     }
 }
 
 /// Enable all interrupts
-pub unsafe fn enable_all() {
+pub fn enable_all() {
     for icer in NVIC.iser.iter().take(number_of_nvic_registers()) {
         icer.set(!0)
     }
 }
 
 /// Disable all interrupts
-pub unsafe fn disable_all() {
+pub fn disable_all() {
     for icer in NVIC.icer.iter().take(number_of_nvic_registers()) {
         icer.set(!0)
     }
 }
 
 /// Get the index (0-240) the lowest number pending interrupt, or `None` if none
 /// are pending.
-pub unsafe fn next_pending() -> Option<u32> {
+pub fn next_pending() -> Option<u32> {
     for (block, ispr) in NVIC
         .ispr
         .iter()
@@ -178,7 +178,7 @@ pub unsafe fn next_pending() -> Option<u32> {
 /// Mask is defined as two `u128` fields,
 ///   `mask.0` has the bits corresponding to interrupts from 128 to 240.
 ///   `mask.1` has the bits corresponding to interrupts from 0 to 127.
-pub unsafe fn next_pending_with_mask(mask: (u128, u128)) -> Option<u32> {
+pub fn next_pending_with_mask(mask: (u128, u128)) -> Option<u32> {
     for (block, ispr) in NVIC
         .ispr
         .iter()
@@ -198,7 +198,7 @@ pub unsafe fn next_pending_with_mask(mask: (u128, u128)) -> Option<u32> {
     None
 }
 
-pub unsafe fn has_pending() -> bool {
+pub fn has_pending() -> bool {
     NVIC.ispr
         .iter()
         .take(number_of_nvic_registers())
@@ -212,7 +212,7 @@ pub unsafe fn has_pending() -> bool {
 /// Mask is defined as two `u128` fields,
 ///   `mask.0` has the bits corresponding to interrupts from 128 to 240.
 ///   `mask.1` has the bits corresponding to interrupts from 0 to 127.
-pub unsafe fn has_pending_with_mask(mask: (u128, u128)) -> bool {
+pub fn has_pending_with_mask(mask: (u128, u128)) -> bool {
     NVIC.ispr
         .iter()
         .take(number_of_nvic_registers())
@@ -232,10 +232,7 @@ pub struct Nvic(u32);
 
 impl Nvic {
     /// Creates a new `Nvic`.
-    ///
-    /// Marked unsafe because only chip/platform configuration code should be
-    /// able to create these.
-    pub const unsafe fn new(idx: u32) -> Nvic {
+    pub const fn new(idx: u32) -> Nvic {
         Nvic(idx)
     }