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1 parent 7a79a1d commit 876957bCopy full SHA for 876957b
1 file changed
arch/cortex-m33/src/mpu_v8m.rs
@@ -356,7 +356,8 @@ impl CortexMRegion {
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// Limit Address register
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let rlar_value = MPU_RLAR::ENABLE::SET
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- + MPU_RLAR::LIMIT.val((logical_end as u32) >> 5)
+ // RLAR::LIMIT is inclusive so `- 1` here to not have the region 32 bytes further.
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+ + MPU_RLAR::LIMIT.val(((logical_end - 1) as u32) >> 5)
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+ MPU_RLAR::PXN::Disable
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+ MPU_RLAR::ATTRINDX.val(0);
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