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chips: stm32wle5xx: add inter. handl. mask comment
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chips/stm32wle5xx/src/chip.rs

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@@ -115,6 +115,16 @@ impl<'a, I: InterruptService + 'a> Chip for Stm32wle5xx<'a, I> {
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fn service_pending_interrupts(&self) {
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unsafe {
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// We have a bit of a hacky solution here to deal with a peculiarity of the
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// stm32wle5xx's built in subghz radio (SX126x). The subghz radio
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// feeds directly into nvic which means we cannot configure it to
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// be rising edge triggered. To clear this interrupt, we must clear
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// the interrupt source on the internal SX126x radio via a SPI write
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// over the internal spi bus. This means that we need to mask this interrupt
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// here to prevent being stuck in the `service_pending_interrupts` loop.
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// After servicing all other pending interrupts, we then check if the subghz
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// radio interrupt is asserted (see comments in subghz_radio.rs for details
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// of handling).
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loop {
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if let Some(interrupt) =
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cortexm4::nvic::next_pending_with_mask((0, 1u128 << crate::nvic::RADIO_IRQ))

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