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fmt: cargo fmt
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-34
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1 file changed

+15
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src/lib.rs

Lines changed: 15 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -68,13 +68,13 @@ PRs for additional benchmarks are welcome.
6868
*/
6969
#![cfg_attr(nightly, feature(stdarch_aarch64_prefetch))]
7070
use core::alloc::Layout;
71-
use std::alloc::{alloc, dealloc, handle_alloc_error};
7271
use core::cell::UnsafeCell;
7372
use core::marker::PhantomData;
7473
use core::mem::MaybeUninit;
7574
use core::ptr;
76-
use std::sync::Arc;
7775
use core::sync::atomic::{AtomicUsize, Ordering};
76+
use std::alloc::{alloc, dealloc, handle_alloc_error};
77+
use std::sync::Arc;
7878

7979
/// Padding to prevent false sharing
8080
#[cfg_attr(
@@ -191,10 +191,9 @@ impl<T> FastQueue<T> {
191191
let capacity = capacity.next_power_of_two().max(2);
192192
let mask = capacity - 1;
193193

194-
let layout = Layout::from_size_align(
195-
capacity * size_of::<MaybeUninit<T>>(),
196-
CACHE_LINE_SIZE,
197-
).expect("layout");
194+
let layout =
195+
Layout::from_size_align(capacity * size_of::<MaybeUninit<T>>(), CACHE_LINE_SIZE)
196+
.expect("layout");
198197
let buffer = unsafe { alloc(layout) as *mut MaybeUninit<T> };
199198

200199
if buffer.is_null() {
@@ -247,7 +246,8 @@ impl<T> Drop for FastQueue<T> {
247246
let layout = Layout::from_size_align(
248247
self.capacity.0 * size_of::<MaybeUninit<T>>(),
249248
CACHE_LINE_SIZE,
250-
).expect("layout");
249+
)
250+
.expect("layout");
251251
dealloc(self.buffer.0 as *mut u8, layout);
252252
}
253253
}
@@ -369,36 +369,25 @@ impl<T> Producer<T> {
369369

370370
#[cfg(all(target_arch = "x86_64", target_feature = "sse"))]
371371
unsafe {
372-
core::arch::x86_64::_mm_prefetch(
373-
_slot as *const i8,
374-
core::arch::x86_64::_MM_HINT_T0,
375-
);
372+
core::arch::x86_64::_mm_prefetch(_slot as *const i8, core::arch::x86_64::_MM_HINT_T0);
376373
}
377374

378375
#[cfg(all(target_arch = "x86_64", target_feature = "prfchw"))]
379376
unsafe {
380-
core::arch::x86_64::_mm_prefetch(
381-
_slot as *const i8,
382-
core::arch::x86_64::_MM_HINT_ET0,
383-
);
377+
core::arch::x86_64::_mm_prefetch(_slot as *const i8, core::arch::x86_64::_MM_HINT_ET0);
384378
}
385379

386380
#[cfg(all(target_arch = "x86"))]
387381
unsafe {
388-
core::arch::x86::_mm_prefetch(
389-
_slot as *const i8,
390-
core::arch::x86::_MM_HINT_ET0,
391-
);
382+
core::arch::x86::_mm_prefetch(_slot as *const i8, core::arch::x86::_MM_HINT_ET0);
392383
}
393-
384+
394385
#[cfg(all(feature = "unstable", nightly, target_arch = "aarch64"))]
395386
unsafe {
396387
core::arch::aarch64::_prefetch::<
397388
{ core::arch::aarch64::_PREFETCH_WRITE },
398389
{ core::arch::aarch64::_PREFETCH_LOCALITY0 },
399-
>(
400-
_slot as *const i8,
401-
);
390+
>(_slot as *const i8);
402391
}
403392
}
404393
}
@@ -529,28 +518,20 @@ impl<T> Consumer<T> {
529518

530519
#[cfg(any(all(target_arch = "x86_64", target_feature = "sse")))]
531520
unsafe {
532-
core::arch::x86_64::_mm_prefetch(
533-
_slot as *const i8,
534-
core::arch::x86_64::_MM_HINT_T0,
535-
);
521+
core::arch::x86_64::_mm_prefetch(_slot as *const i8, core::arch::x86_64::_MM_HINT_T0);
536522
}
537523

538524
#[cfg(all(nightly, target_arch = "x86"))]
539525
unsafe {
540-
core::arch::x86::_mm_prefetch(
541-
_slot as *const i8,
542-
core::arch::x86::_MM_HINT_T0,
543-
);
526+
core::arch::x86::_mm_prefetch(_slot as *const i8, core::arch::x86::_MM_HINT_T0);
544527
}
545528

546529
#[cfg(all(feature = "unstable", nightly, target_arch = "aarch64"))]
547530
unsafe {
548531
core::arch::aarch64::_prefetch::<
549532
{ core::arch::aarch64::_PREFETCH_READ },
550533
{ core::arch::aarch64::_PREFETCH_LOCALITY0 },
551-
>(
552-
_slot as *const i8,
553-
);
534+
>(_slot as *const i8);
554535
}
555536
}
556537
}

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