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revert(history): drop the esp_tsdb fork pin — it changed nothing
Measured on the rig, before and after the single-fsync patch:
tsdb_write ok (sys 5135 ms, panels 15854 ms) # 2.3.0, 8 fsyncs
tsdb_write ok (sys 5349 ms, panels 17269 ms) # patched, 4 fsyncs
No improvement. The reasoning was wrong: removing the first fsync doesn't
remove flash work, it defers it to the trailing lfs_file_sync, which then
flushes the block and the header together. Same erases, same COW churn.
fsync cost tracks outstanding dirty work, not call count — the LD_PRELOAD
counter measured the wrong thing.
So the pin bought nothing and cost fork maintenance. Back to the registry
in the board YAML, the Config Builder and the deploy config. Upstream PR
retracted.
Also strips every claim built on that model: the "twice as fast" CHANGELOG
entry (deleted), "~10.5 s" in the header comment, "~10 s to commit" in the
build warning, and the docs' commit-duration figures — all back to the
measured ~21 s.
The 21 s is now explicitly documented as NOT understood, with both dead
theories named so the next person doesn't re-derive them: it is not
proportional to file size (1 MB and 192 KB DBs cost the same), and it is
not fsync count (halving it changed nothing). ~5.3 s per database, per
commit, cause unknown. Docs carry a caution box saying so.
Claude-Session: https://claude.ai/code/session_01RgSnMCa3JQigphGnPbazdw
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+1-2Lines changed: 1 addition & 2 deletions
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@@ -22,8 +22,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
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### Fixed
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-**Updating the firmware could crash the device.** The history writer is meant to stand down while an update is being written, since both are writing the same flash chip — but it only checked for an update at the moment it started a snapshot, and a snapshot takes ten to twenty seconds to write. An update beginning during one was ignored until it was too late, and the two collided. Starting an update now waits for any snapshot in progress to finish before transferring, so the collision can't happen. If you update at the wrong moment you'll see a short pause and a "waited N ms" message before the transfer begins; that's the wait working. An update is refused outright if a snapshot somehow doesn't finish within 45 seconds, rather than proceeding into a known crash.
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-**Saving history is twice as fast.** Each snapshot writes four databases, and every write was syncing to flash twice — once for the data, once for the record header — when the second sync already covered both. On LittleFS a sync is a full journal commit costing seconds, and that cost turned out to be per sync rather than per byte: a 1 MB database and a 192 KB one took the same time, whether appending or overwriting. Dropping the redundant sync takes a snapshot from about 21 seconds to about 10. That matters beyond the writing itself, because the device holds its history lock for the whole commit — so it's also how long a chart request could be stuck waiting. Sent upstream as [zakery292/esp_tsdb#5](https://github.com/zakery292/esp_tsdb/pull/5); until it lands in a release the firmware builds against a pinned fork.
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-**History pages no longer fail when a snapshot is being written.** Requests gave up after 15 seconds, which was less than a snapshot took, so any chart loaded at the wrong moment returned an error. They now wait up to 30 seconds and get their data.
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-**History pages no longer fail when a snapshot is being written.** Requests gave up after 15 seconds, which is less than a snapshot takes, so any chart loaded at the wrong moment returned an error. They now wait up to 30 seconds and get their data.
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- **The flash-write crash appears to be fixed, not just made rarer.** The device now executes from PSRAM (`execute_from_psram`), and firmware configures this itself — you don't have to know it exists. Every history commit takes an ESP-IDF lock that disables the instruction cache across both cores; with code running from flash, that stall raced the WiFi/BLE radio ISRs and faulted. ESP-IDF skips the cache-disable entirely when instructions and read-only data live in PSRAM instead, which removes the race rather than shrinking its window. Previous builds survived 13.5, 42.0 and 14.0 hours before faulting; the current one has run **142 hours and counting** with no movement in any memory watermark, and with the per-panel databases already at full size — so it has been running at the worst-case flash cost the whole time, not easing into it. Costs about 1.7 MB of the 8 MB PSRAM, which moves out of the heap to hold the relocated code. Applies to ESP32-S3 boards with PSRAM configured; the reference config and the Config Builder set the flag explicitly as well. Note that the 142-hour run was at the old hourly cadence, and the new default writes twice as often — so the fix now carries more load than the run that demonstrated it.
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